Impedance, Admittance Or Other Quantities Representative Of Electrical Stimulus/response Relationships Patents (Class 324/600)
  • Patent number: 7412346
    Abstract: Apparatuses, methods, and systems associated with and/or having components capable of, detecting a temperature of an integrated circuit in real time during testing are disclosed herein. In exemplary embodiments, an integrated circuit includes a register to store a temperature limit for the integrated circuit; a temperature sensor formed on the integrated circuit to sense a temperature of the integrated circuit, and output a signal indicative of the temperature sensed, based at least in part on the temperature sensed; and testing logic coupled to the register and the temperature sensor to record a temperature violation if at any time during a testing mode of operation the temperature sensed by the temperature sensor violates the stored temperature limit.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: August 12, 2008
    Assignee: Intel Corporation
    Inventors: Mo S. Bashir, Arun Krishnamoorthy
  • Patent number: 7412359
    Abstract: In a mutual immittance calculation apparatus, an input section inputs data of a model of an electric circuit apparatus, being a target for analysis of the electromagnetic-field strength and being divided into a plurality of patches. A mutual immittance calculation section calculates respective mutual immittance for combinations of patches corresponding to the main portion and to the additional portion. The mutual immittance calculation section uses a stored calculation result corresponding to the main portion when the model in which only the additional portion has been changed is calculated for a second time onward, and recalculates the mutual immittance corresponding to the changed additional portion.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: August 12, 2008
    Assignee: Fujitsu Limited
    Inventor: Kenji Nagase
  • Publication number: 20080169121
    Abstract: A through bore penetrates through a substrate. The through bore defines a space surrounded by an insulating wall surface. A lead terminal of an electronic component is received in the through bore. An electrically-conductive body is placed in the through bore to extend to an exposed portion at the surface of the substrate. An auxiliary electrically-conductive body is exposed in the space of the through bore for connection to the electrically-conductive body. The auxiliary electrically-conductive body extends to an exposed portion at the surface of the substrate. The lead terminal contacts with an electrically-conductive body in the through bore. Electrical conduction is detected between the lead terminal and the auxiliary electrically-conductive body for detecting the rising level of the electrically-conductive body. When such electric conduction is detected, the electrically-conductive body is supposed to reach the level of the auxiliary electrically-conductive body.
    Type: Application
    Filed: December 11, 2007
    Publication date: July 17, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Mitsuo Suehiro
  • Patent number: 7397252
    Abstract: A method for accurately measuring feature sizes and quantifying the beam spot size in a CDSEM at real time is provided. The inventive method is based on a scanning microscope and it works on both conductive and non-conductive features. The measurement of conductive feature includes first providing a conductive feature on a surface of a substrate (the substrate maybe an insulator, a semiconductor or a material stack thereof). The conductive feature is then connected to ground and thereafter an electron beam probe raster scans the sample. When the electron beam probe hits the conductive feature the spot will have a negative potential. The potential difference between the spot and the ground will induce an electrical current flow. When the electrical beam is off the conductive feature, there will be no current flow. Therefore, by measuring the current response to the location of the beam spot, the dimension of the conductive feature can be derived.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: July 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Lin Zhou, Eric P. Solecky
  • Patent number: 7391221
    Abstract: One exemplary device has a plurality of leads with termination impedances, and a standard impedance. Among the termination impedances are master impedances arranged to be calibrated by comparison with the standard impedance and slave impedances arranged to be calibrated in accordance with an associated master impedance.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: June 24, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jayen J. Desai, James M. Dewey, David Purvis
  • Patent number: 7383141
    Abstract: A system, method and program product for determining the integrity of a faraday system are disclosed. The invention uses a computer infrastructure to control an automatic determination of a faraday system integrity, when the faraday system is not in operation. The determination is based on the variations on an impedance of the faraday system. An impedance of a faraday system is determined based on the discharge characteristics of a capacitor that discharges through the faraday system.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: June 3, 2008
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Vinay Aggarwal, Joseph P. Dzengeleski
  • Publication number: 20080122448
    Abstract: A method and system for detecting transformer saturation in a communication interface is provided. The method may include detecting a change in impedance resulting from transformer saturation of at least one isolation transformer utilized in a network path of a network. The network may conform to an IEEE 802.3af specification where power may be delivered through the network. The method may further comprise generating a pulse at a one end of the network and measuring a reflection at that end to detect the transformer saturation. In response to the impedance change, a transmitter signal may be pre-distorted in order to compensate for the detected transformer saturation, or the power delivered over the network may be disabled.
    Type: Application
    Filed: November 27, 2006
    Publication date: May 29, 2008
    Inventor: Neven Pischl
  • Patent number: 7379016
    Abstract: A pulse detection system for expanded time radar, laser and TDR sensors detects specific cycles within bursts of cycles. A sensor transmits and receives short bursts of RF cycles. A transmit pulse detector triggers on a selected cycle of the detected transmit burst and starts a range counter. A receive detector triggers on a selected cycle within a received echo burst to stop the range counter, thereby indicating range. Cycle selection is enabled by an analysis window of time. The detection system can provide accuracies on the order of one picosecond and is well-suited to accurate ranging along an electromagnetic guide wire.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: May 27, 2008
    Assignee: McEwan Technologies, LLC
    Inventor: Thomas Edward McEwan
  • Patent number: 7352166
    Abstract: A digitizing ohmmeter system for providing a digital resistance ratio measurement includes a high impedance current source providing a DC excitation current to an impedance-varying input sensor and a reference resistor and an ADC circuit including a charge-balancing modulator and a digital post processing circuit. The same DC excitation current passes through both the input sensor and the reference resistor. The system utilizes a switched capacitor input stage to sample the voltage across the input sensor and the voltage across the reference resistor to generate an input voltage step and a reference voltage step which are coupled to the modulator of the ADC circuit. The digitizing ohmmeter system thereby realizes fully ratiometric operation such that neither a precise current source nor a precise voltage source is required for accurate resistance ratio measurements and only a stable known reference resistor is necessary for accurate absolute resistance measurements.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: April 1, 2008
    Assignee: National Semiconductor Corporation
    Inventor: Eric D. Blom
  • Patent number: 7340437
    Abstract: The circuit configuration according to the invention comprises an electrical signal line loop, several partial systems connected thereto, which evaluate the state of the signal line loop, wherein a first selectable switching means is looped in between a first end of the signal line loop and a first voltage connection and a second selectable switching means is looped in between a second end of the signal line loop and a second voltage connection, and a selection unit for selecting the first and second switching means. Use, e.g. in a fuel cell system.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: March 4, 2008
    Assignee: NuCellSys GmbH
    Inventors: Markus Aberle, Klaus Beutelschiess
  • Publication number: 20080010034
    Abstract: An adapter of unknown properties necessary for performing simple N-port calibration is prepared and simple N-port calibration is performed on a network analyzer using the adapter. Moreover, the open reference, short reference, and load reference are measured in succession, with the adapter in a disassembled state, at the test ports to which the adapter was connected during calibration. Finally, the calibration coefficient obtained by simple N-port calibration is corrected using the properties of the adapter found from the measured values of each reference. N is an integer of two or more.
    Type: Application
    Filed: June 20, 2007
    Publication date: January 10, 2008
    Inventor: Takashi Yamasaki
  • Patent number: 7292047
    Abstract: A high-frequency power source supplies high-frequency power to a load whose reflection characteristic for the power varies with time. The power source includes a frequency-variable power generator, a power detector for detecting the power into the load and the power from the load, a reflection coefficient calculator for calculating a reflection coefficient based on the detection of the power into and from the load, a frequency detector causing the power generator to generate high-frequency powers at various frequencies within a predetermined frequency range for obtaining the frequency that gives a minimum value to the calculated reflection coefficient, and a power supply controller for causing the power generator to generate a high-frequency power of the frequency obtained by the frequency detector and for supplying the high-frequency power to the load.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: November 6, 2007
    Assignee: Daihen Corporation
    Inventors: Ryohei Tanaka, Hiroshi Matoba
  • Publication number: 20070241759
    Abstract: A method for measuring a stability margin at a node of a polyphase power grid injects suppressed-carrier stimulus into a node of the power grid by low-level amplitude modulation of the output voltage of a pre-exiting generator connected to the node. Response signals are obtained and product demodulated on a per-phase basis and summed in three-phase groups. Demodulated and summed responses contain signals that represent the suppressed-carrier impedance upstream and downstream of the stimulus injection point, and are processed to determine the stability margin at the node.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 18, 2007
    Inventor: Michael Lamar Williams
  • Patent number: 7276206
    Abstract: Methods of identifying activators and inhibitors of voltage-gated ion channels are provided in which the methods employ electrical field stimulation of the cells in order to manipulate the open/close state transition of the voltage-gated ion channels. This allows for more convenient, more precise experimental manipulation of these transitions, and, coupled with efficient methods of detecting the result of ion flux through the channels, provides methods that are especially suitable for high throughput screening.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: October 2, 2007
    Assignee: Merck & Co., Inc.
    Inventors: Paul R. Augustine, Randal M. Bugianesi, Gary S. Kath, Owen B. McManus, Paul B. Bennett, Tina A. Garyantes, John P. Imredy
  • Publication number: 20070194797
    Abstract: A current detection printed board includes: a board having a penetration hole that penetrates the board; and at least one wire that is formed in a coiled shape having both ends by penetrating the board along the periphery of the penetration hole and alternately connecting a front surface layer and a rear surface layer of the board, wherein, when a conductor, in which an AC current flows, is disposed to pass through the inside of the penetration hole, a current flowing in the wire is output through electromagnetic induction.
    Type: Application
    Filed: January 26, 2007
    Publication date: August 23, 2007
    Applicant: DAIHEN CORPORATION
    Inventors: Yoshifumi IBUKI, Shigeki AMADATSU, Tomohiko KITANO, Shuji OMAE
  • Publication number: 20070170928
    Abstract: Apparatus and methods for measuring smooth muscles responses (relaxation and contraction), transepithelial potential difference, and/or transepithelial impedance of an intact trachea in vitro. In particular embodiments, the apparatus includes a perfusion device on which an extracted, intact trachea is mounted. The perfusion device and the trachea are immersed in an extraluminal bath, which is isolated from the perfusion liquid flowing through the trachea. A set of voltage-sensing electrodes is provided for measuring the transepithelial potential difference across the trachea wall. A set of current electrodes is provided for inducing an electrical current to flow across the trachea wall in order to determine transepithelial impedance.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 26, 2007
    Inventors: Jeffrey S. Fedan, Yi Jing, Michael Van Scott
  • Patent number: 7222034
    Abstract: An oscilloscope performs an in-circuit measurement of voltage across, and current through, a core winding of an inductor, and derives the actual B and H values with n number of turns, receives data indicative of the magnetic length of the circuit, and plots the B_H curve. The oscilloscope then derives the value of Saturation flux density (Bsat), Remnant flux density (Br), Permeability (?), and Coercivity (Hc) from this B-H plot. Characterizing the operating region of the magnetic component while it operates in a Switch Mode Power Supply (SMPS) under test, provides information concerning the stability of the power supply that was heretofore unavailable.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: May 22, 2007
    Assignee: Tektronix, Inc.
    Inventors: P. E. Ramesh, Godfree Coelho
  • Patent number: 7188038
    Abstract: A method of estimating an electrical capacitance of a circuit component is carried out by decomposing the capacitance into a sum of terms associated with respective contributions from a central part and peripheral parts of the component. A component to which the method can be applied comprises two rectangular conducting plates placed parallel to each other. One of the two plates is greater than the other. The component furthermore includes two different dielectrics. A first dielectric covers the large plate and separates the two plates, and a second dielectric surrounds the first plate and the first dielectric. A method of defining a dimension of a capacitor is also presented.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: March 6, 2007
    Assignee: STMicroelectronics SA
    Inventors: Eric Picollet, Michel Minondo
  • Patent number: 7161357
    Abstract: Provided is an apparatus for measuring a read range between a tag and a reader, which includes an electromagnetic anechoic chamber formed by connecting at least one unit cell in a row, the unit cell having an electromagnetic wave absorbent provided on an inner wall of each unit cell, an electromagnetic generation portion located at the unit cell at an end of the electromagnetic anechoic chamber and transmitting an electromagnetic wave through an antenna, and an electromagnetic measurement portion which measures a field strength of the electromagnetic wave transmitted from the electromagnetic generation portion using an electric field probe moving in the electromagnetic anechoic chamber.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: January 9, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Moon Lee, Nae Soo Kim, Cheol Sig Pyo, Jong Suk Chae
  • Patent number: 7109725
    Abstract: A method and apparatus for testing integrated circuits by subjecting the circuits to an electromagnetic disturbance. A probe is provided, equipped with a horn cover designed to be applied to a printed circuit on which an integrated circuit is mounted. Within this horn cover, a core shield channels the electrical field that is deployed in a zone in which connections from the integrated circuit to the printed circuit that it carries are situated. The effectiveness of the electromagnetic interference injected in the integrated circuit is increased to the point that a true measurement of the resistance of this integrated circuit to the electromagnetic interferences may be carried out.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: September 19, 2006
    Assignee: European Aeronautic Defence and Space Company Eads France and Eads CCR Groupement d'Interet Economique
    Inventor: Olivier Maurice
  • Patent number: 7043402
    Abstract: An on-line sensing system and method for monitoring in real-time thermal-oxidative breakdown, water contamination, and/or fuel dilution conditions in operational engine lubricating oils. The method of the invention includes an electrochemical impedance analysis technique specific to the particular oil to be monitored. Sensing devices having of at least two electrodes are configured for direct installation in an existing access port, or drain port, of a lubricating oil reservoir. An AC voltage waveform is applied to the sensing device (preferably less than 100 Hz) to produce voltage and current responses between the appropriate electrodes contacting the oil. The magnitude impedance |Z| and phase angle components of the complex impedance are used to characterize the quality and/or condition of the engine oil under test. The system also provides an electrical indication indicative of the percentage remaining useful life of the oil.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: May 9, 2006
    Assignee: The Precision Instrument Corp.
    Inventors: Alan D. Phillips, William J. Eggers, Robert S. Rodgers, Dean Pappas
  • Patent number: 7034548
    Abstract: A test system and method characterize a balanced device under test (DUT) with a vector network analyzer (VNA) measurement system using a differential or balanced stimulus signal and further calibrate the VNA using conventional calibration standards. An effect of errors introduced by an uncalibrated portion of the measurement system, such as test fixturing and hybrid junction coupling, is de-embedded from measured S-parameters for the DUT. The method includes calibrating the VNA, characterizing the uncalibrated portion, measuring S-parameters for the DUT with the calibrated VNA, and de-embedding the uncalibrated portion characterization from the S-parameter measurements. The test system includes a multiport VNA measurement system that includes a hybrid coupler, an optional test fixture, and a computer program. A processor executes the computer program. Instructions of the computer program implement the method.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: April 25, 2006
    Assignee: Agilent Technologies, Inc.
    Inventor: Keith F. Anderson
  • Patent number: 6975103
    Abstract: A digitizing ohmmeter system for providing a digital resistance ratio measurement includes a high impedance current source providing a DC excitation current to an impedance-varying input sensor and a reference resistor and an ADC circuit including a charge-balancing modulator and a digital post processing circuit. The same DC excitation current passes through both the input sensor and the reference resistor. The system utilizes a switched capacitor input stage to sample the voltage across the input sensor and the voltage across the reference resistor to generate an input voltage step and a reference voltage step which are coupled to the modulator of the ADC circuit. The digitizing ohmmeter system thereby realizes fully ratiometric operation such that neither a precise current source nor a precise voltage source is required for accurate resistance ratio measurements and only a stable known reference resistor is necessary for accurate absolute resistance measurements.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: December 13, 2005
    Assignee: National Semiconductor Corporation
    Inventor: Eric D. Blom
  • Patent number: 6965838
    Abstract: A computing system includes a semiconductor which sources current to load components within the system, a controllable load coupled to the semiconductor and having an on-state in which a predetermined current load is drawn from the semiconductor in addition to the load components, and a controller which couples the semiconductor and the controllable load. In this configuration, the controller senses the voltage across the semiconductor on at least three points in time. The controller activates the on-state of the controllable load during one of the three points in time and derives a first calculated voltage as a function of the three voltages sensed. The controller calculates the on-resistance of the semiconductor by dividing the first calculated voltage by the predetermined current.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: November 15, 2005
    Assignee: International Business Machines Corporation
    Inventor: Justin Potok Bandholz
  • Patent number: 6965837
    Abstract: A method and an arrangement for detecting impedance mismatch between an output of a radio frequency amplifier (200, 901, 911, 921, 1101) which has an amplifying component (201, 301, Q46, 701, 801) and an input of a load (203, 302) coupled to the output of the radio frequency amplifier having: first monitoring means (401) to monitor a measurable electric effect (311) at a side of the amplifying component (201, 301, Q46, 701, 801) other than the load (203, 302) and to produce a first measurement signal (411). Second monitoring means (402) monitor a measurable electric effect (312) between the amplifying component (201, 301, Q46, 701, 801) and the load (203, 302) and produce a second measurement signal (412). Decision-making means (204, 902, 912, 923, 1102) receive said first (411) and second (412) measurement signals and decide, whether said first and second measurement signals together indicate impedance mismatch.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: November 15, 2005
    Assignee: Nokia Corporation
    Inventor: Ville Vintola
  • Patent number: 6946847
    Abstract: An impedance matching device is provided, for which the electric characteristics at an output terminal are accurately analyzed. The matching device is provided with an input detector for detecting RF voltage and current at the input terminal, and an output detector for detecting RF voltage outputted from the output terminal. The matching device also includes a controller for achieving impedance matching between a high frequency power source connected to the input terminal and a load connected to the output terminal. The impedance matching is performed by adjusting variable capacitors based on the detection data supplied from the input detector. When the impedance of the power source is matched to that of the load, the controller calculates the output impedance, RF voltage and RF current at the output terminal, based on the adjusted capacitances of the capacitors, a pre-obtained reactance-impedance data and the detection data supplied from the output detector.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: September 20, 2005
    Assignee: Daihen Corporation
    Inventors: Yasuhiro Nishimori, Shuji Omae, Masakatsu Mito, Yuji Ishida, Koji Itadani
  • Patent number: 6931334
    Abstract: An electromagnetic field intensity calculation apparatus calculates a virtual current vector from a voltage vector and a mutual immittance matrix of an object including a wave source where a wave source power is applied. The voltage vector and the mutual immittance use a wave voltage of the wave source as a unit voltage. The apparatus also calculates an input impedance of the wave source based on a virtual wave source current of the virtual current vector and a unit voltage of the wave source, and calculates the wave source voltage based on the input impedance and the wave source power. The apparatus further calculates a current vector based on the wave source voltage calculated and the virtual current vector, and calculates an electromagnetic field intensity around the wave source which is determined based on the current vector.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: August 16, 2005
    Assignees: Fujitsu Limited, Fujitsu Ten Limited
    Inventors: Hiroshi Yoshida, Masamichi Ohtake, Yasuhiro Hayakawa, Yasuo Matsubara, Kenji Nagase, Takashi Yamagajo
  • Patent number: 6876207
    Abstract: A device testing system that has automated test equipment (ATE), which interfaces to a device under test (DUT). The device testing system selects a test set of data including a plurality of test pairs, indicative of DUT parameter values. The system, selects a subset of the plurality of test pairs from the test set of data tests the DUT via the ATE with a portion of the selected subset based upon the test results of at least one of the test pairs.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: April 5, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Benjamin Joseph Haass, Douglas Shelborn Stirrett, James Kwok-Yue Wai
  • Patent number: 6876936
    Abstract: A method and apparatus for measuring inductance. The method and apparatus include processing current and voltage waveform data associated with an inductive device to determine edge and slope parameters for each of a plurality of current waveform data cycles. Furthermore, proportional magnetic flux and proportional magnetic current is determined from the acquired current waveform data and the voltage waveform data proximate determined edge regions of the waveform data. An inductance value of the inductive device may then be calculated from the proportional magnetic flux and proportional magnetic current.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: April 5, 2005
    Assignee: Tektronix, Inc.
    Inventors: P. E. Ramesh, Srikrishna Nadig
  • Patent number: 6871111
    Abstract: A plasma processing apparatus has a plasma processing chamber having a plasma excitation electrode, a radiofrequency generator connected to the plasma excitation electrode, and a matching circuit for matching the impedance between the plasma processing chamber and the radiofrequency generator. The loss capacitance CX1 at a later time t1 after delivery is measured between the plasma excitation electrode and ground potential positions which are grounded. The performance is evaluated by whether or not the loss capacitance CX1 is less than 26 times the plasma electrode capacitance Ce1 at the later time t1 between the plasma excitation electrode and a counter electrode which cooperate with each other.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: March 22, 2005
    Assignees: Alps Electric Co., Ltd.
    Inventors: Akira Nakano, Tadahiro Ohmi
  • Patent number: 6847267
    Abstract: Systems and methods are described for transmitting a waveform having a controllable attenuation and propagation velocity. An exemplary method comprises: generating an exponential waveform, the exponential waveform (a) being characterized by the equation Vin=De?ASD(x?vSDt), where D is a magnitude, Vin is a voltage, t is time, ASD is an attenuation coefficient, and VSD is a propagation velocity; and (b) being truncated at a maximum value. An exemplary apparatus comprises: an exponential waveform generator; an input recorder coupled to an output of the exponential waveform generator; a transmission line under test coupled to the output of the exponential waveform generator; an output recorder coupled to the transmission line under test; an additional transmission line coupled to the transmission line under test; and a termination impedance coupled to the additional transmission line and to a ground.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: January 25, 2005
    Assignee: Board of Regents, The University of Texas System
    Inventors: Robert H. Flake, John F. Biskup
  • Publication number: 20040201383
    Abstract: A test system and method characterize a balanced device under test (DUT) with a vector network analyzer (VNA) measurement system using a differential or balanced stimulus signal and further calibrate the VNA using conventional calibration standards. An effect of errors introduced by an uncalibrated portion of the measurement system, such as test fixturing and hybrid junction coupling, is de-embedded from measured S-parameters for the DUT. The method includes calibrating the VNA, characterizing the uncalibrated portion, measuring S-parameters for the DUT with the calibrated VNA, and de-embedding the uncalibrated portion characterization from the S-parameter measurements. The test system includes a multiport VNA measurement system that includes a hybrid coupler, an optional test fixture, and a computer program. A processor executes the computer program. Instructions of the computer program implement the method.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 14, 2004
    Inventor: Keith F. Anderson
  • Patent number: 6791338
    Abstract: A gated nanoscale switch operates as a resonant tunneling device. A conductive channel is formed of a pair of conductive molecular wires and a conductive nanoparticle. Each molecular wire is bound, at one end, to the conductive nanoparticle and, at the opposed end, to one of a pair of electrodes. The structure is located upon a dielectric layer that overlies a conductive substrate. The device may be arranged to operate as a switch with the conductive substrate acting as a gate electrode. Alternatively, the device may be employed to measure the electrical (current versus voltage) characteristics of the molecular wires.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: September 14, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Alexandre Bratkovski, Yong Chen, Theodore I Kamins
  • Publication number: 20040145375
    Abstract: An input-output circuit sending and/or receiving a signal to and/or from an electronic device includes a driver for supplying a signal to the electronic device, a comparator provided parallel to the driver for receiving a signal from the electronic device, a relaying circuit provided between the comparator the electronic device in series with the comparator and the electronic device, a first transmission line for coupling the comparator and the relaying circuit electrically and a first switch for selecting either of short or open-circuited state of the first transmission line and the electronic device, wherein the impedance of the relaying circuit is larger than the impedance of the first transmission line.
    Type: Application
    Filed: January 14, 2004
    Publication date: July 29, 2004
    Inventor: Takashi Sekino
  • Patent number: 6756790
    Abstract: A second operational amplifier (11) of a core unit (1) shorts an inverting input terminal and an output terminal. A signal line (19) is connected to a non-inverting input terminal. A capacitive sensor (18) is connected to the signal line (19). A first operational amplifier (12) earths the non-inverting input terminal. One end of a first resistance (15) and one end of a second resistance (16) are respectively connected to the inverting input terminal. The other end of the first resistance (15) is connected to an alternate current voltage generator (14). The other end of the second resistance (16) is connected to the output terminal of the first operational amplifier (11). A signal output terminal (21) of the core unit (1) is connected to an inverting amplification device (2). An alternate output terminal (22) of the core unit (1) and an inverting output terminal (42) of the inverting amplification device (2) are connected to an addition device (3).
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: June 29, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Masami Yakabe, Toshiyuki Matsumoto, Yoshihiro Hirota, Kouichi Nakano
  • Patent number: 6745070
    Abstract: A method of imaging an object contained in a medium, having a specific impedance which is different from the specific impedance of the medium, comprising applying current to the medium at various locations at a surface of the medium, extracting current at other locations, detecting voltages produced by the current which has passed through the medium from the surface of the medium at various other locations, successively determining a location and shape and conductivity of the object with increasing accuracy by processing values of the detected voltages, determining a region in the medium in which the object is located from values of the detected voltages which are within upper and lower threshold values, applying acceleration procedures to the conductivities within the region in the course of iterative refinement of these values in the course of an imaging procedure, subsequently restricting further determination of the location of the object with increasing accuracy to voltages obtained from the region of th
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: June 1, 2004
    Assignee: Tasc Ltd.
    Inventors: Alvin Wexler, Zhen Mu, Rajen Manicon Murugan, Guye S. Strobel
  • Patent number: 6700390
    Abstract: A adjustment and calibration system for reducing an impedance of a power supply path of an integrated circuit is provided. The power supply path includes a first power supply line and a second power supply line to provide power to the integrated circuit. At least a digital potentiometer connected between the first power supply line and the second power supply line is adjusted to reduce the impedance of the power supply path. Control information, representative of a desired value for the digital potentiometer, is stored in a storage device. The control information stored in the storage device is subsequently selectively read out in order to adjust the digital potentiometer to a state corresponding to the control information.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: March 2, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Brian W. Amick
  • Patent number: 6700387
    Abstract: The present invention synthesizes a prescribed impedance. The impedance is synthesized by generating a current having a value substantially equal to a voltage divided by a prescribed impedance. Sensing the line voltage and converting that sensed line voltage to its digital equivalent accomplish this first step. The digital line voltage is processed by a factor related to the prescribed impedance to produce an output voltage that has a value substantially equal to the sensed voltage divided by the prescribed impedance. The output voltage controls a voltage to current converter that generates the appropriate current across the points or terminals where the line voltage was measured. Thus, the prescribed impedance is generated across these points or terminals because the line voltage divided by the generated current is substantially equal to the prescribed impedance.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: March 2, 2004
    Assignee: 3Com Corporation
    Inventors: Spiro Poulis, John Evans, Shayne Messerly
  • Patent number: 6686747
    Abstract: A programmable voltage divider has normal and test modes of operation. The divider includes first and second supply nodes, a divider node that provides a data value, and a first divider element that is coupled between the first supply node and the divider node. The divider also includes a controlled node, a second divider element that has a selectable resistivity and that is coupled between the divider node and the controlled node, and a test circuit that is coupled between the controlled node and the second supply node. During the normal mode of operation, the first and second divider elements generate the data value having a first logic level when the second divider element has a first resistivity, and generate the data value having a second logic level when the second divider element has a second resistivity. The test circuit generates a first voltage at the controlled node during the normal mode of operation, and generates a second voltage at the controlled node during the test mode of operation.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: February 3, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Donald M. Morgan
  • Patent number: 6675117
    Abstract: An apparatus and method for deskewing single-ended signals from different driver circuits of an automatic test system provides enough of a reduction in skew to allow differential signals to cross at or near their 50%-points. In accordance with this technique, first and second driver circuits are respectively coupled to first and second inputs of a measurement circuit through pathways having known and preferably equal propagation delays. The first and second driver circuits each generate an edge that propagates toward the DUT, and reflects back when it reaches a respective unmatched load at the location of the DUT. In response to the edge and its reflection, the first and second inputs of the measurement circuit each see a first voltage step and a second voltage step. The interval between the first and second voltage steps is then measured for each input of the measurement circuit.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: January 6, 2004
    Assignee: Teradyne, Inc.
    Inventors: Sean P. Adam, William J. Bowhers
  • Patent number: 6657439
    Abstract: A sheet resistance meter includes a sensor head for generating a magnetic field; and an amplifier for, when a semiconductor wafer, an object to be measured, is placed at a predetermined distance from the sensor head, detecting a variation in the magnetic field generated by the sensor head as the sheet resistance of a thin film formed on the semiconductor substrate, wherein the sensor head is disposed opposing only one of two sides of the semiconductor wafer. In this manner, a sheet resistance meter is offered that can be readily accommodated into an existent manufacturing line so as to enable in-line measurement of the sheet resistance of a thin film and suitable control of the properties of a thin film.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: December 2, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshinori Harada
  • Patent number: 6632534
    Abstract: A probe adapted for use with a time domain reflectrometry device in primarily measuring the moisture content in soils and other mediums. This probe can however be used in may differing measurement applications involving materials of specific dielectric constants as well as apparent dielectric constants that are derived from a matrix of several differing dielectrics. In the probe according to the present invention, the inner core of the probe is composed of an inner conductive element, a conductor that is used to transmit a broadband pulse. A dielectric liquid, solid or gel surrounds this inner conductive core, and assists in retaining broadband signal strength. The dielectric material is then encased in a metallic outer shell that serves as a protective housing for the probe. This outer shell is electronically transparent to the electromagnetic pulse transmitted by the active inner conductive core and surrounding dielectric.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: October 14, 2003
    Assignee: Soilmoisture Equipment Corp.
    Inventors: Whitney Skaling, Laszlo Rudolics
  • Publication number: 20030184312
    Abstract: An impedance network. The network includes a plurality of impedance elements, at least one end terminal, and a wiper terminal. The network also includes a first plurality of switching elements selectively providing tap positions to the at least one end terminal, selectable at a first specified increment of impedance elements in the plurality of impedance elements. The network further includes a second plurality of switching elements selectively providing a tap positions to the wiper terminal, selectable at a second specified increment of impedance elements in the plurality of impedance elements.
    Type: Application
    Filed: April 1, 2002
    Publication date: October 2, 2003
    Inventors: Chun-Mai Liu, Hagop A. Nazarian
  • Patent number: 6597182
    Abstract: In an electroplating machine having a number of cathode electrodes which are simultaneously brought into contact with a silicon wafer to be electroplated in a semiconductor device fabricating process, a detector for detecting a contact resistance anomaly in a number of cathode electrodes includes a testing wafer which is formed of a circular silicon wafer and which has a number of metal film strips formed on one surface of the circular silicon wafer, separately from each other, so that the number of cathode electrodes can be individually brought into contact with the number of metal film strips, respectively. When the cathode electrodes are individually brought into contact with the metal film strips, respectively, a measuring tool is used to measure a contact resistance between each of the number of cathode electrodes and a corresponding one of the number of metal film strips.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: July 22, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Hiroaki Tachibana
  • Patent number: 6598003
    Abstract: The power and environmental condition monitoring system monitors the quality of power provided to a site as well as other environmental conditions that might affect the operation of electronic equipment at the site. The system detects and records power events, such as spikes, sags, surges, and other transients, records power conditions, such as voltage level, RMS volts, phase differential, A/C frequency, current, and impedance, and records environmental conditions, such as temperature, vibration, and humidity. The system includes an analog signal receiver that receives analog signals from measurement devices and converts the analog signals into digital signal data. At least some of the channels on the analog boards are high frequency channels capable of receiving and converting high frequency voltage event signals. The system also includes a digital signal processor (DSP) for reading the raw digital signal data from the analog signal receiver and for processing the raw digital signal data.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: July 22, 2003
    Assignee: RX Monitoring Services, LLC
    Inventors: Todd V. Heino, Erik J. Kindseth, Robert T. Thomas
  • Patent number: 6594594
    Abstract: A method of uniquely extracting both intrinsic and parasitic components from a single set of measured S-parameters is useful for extracting a single set of measured S-parameters for the development of non-linear Field Effect Transistor (FET) models. Competitive extraction where multiple trial solutions are attempted spanning a region or space of feedback impedances is used. Extraction is followed by optimization that reduces the extracted values to a model that better fits measured S-parameters. Optimization can be achieved by further evaluating the speed of convergence in an error metric.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: July 15, 2003
    Assignee: Northrop Grumman Corporation
    Inventor: Roger Su-Tsung Tsai
  • Patent number: 6587792
    Abstract: Methods and devices for determining the nuclear packing efficiency (NPE) of a cell nucleus and other biological particles. An NPE can be determined by correlating at least one biochemical component, such as DNA content, to nuclear volume using a variety of mathematical techniques. Flow cytometry is particularly useful for measuring nuclear volume in terms of the electronic nuclear volume (ENV). The NPE can then be used to characterize individual cells and cell populations in terms of species and tissue source, sexing, stage of the cell division cycle, differentiation and apoptosis, as well as differentiating among benign, malignant and metastatic states to diagnose cancer.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: July 1, 2003
    Inventor: Richard A. Thomas
  • Patent number: 6581016
    Abstract: An apparatus for measuring an impedance produces an alternating current from digital codes representative of a sine wave, and converts an ac voltage due to an alternating current flowing into an object to a digital signal; a multiplier successively multiplies the binary values of the digital signal by the binary values of the digital codes representing the sine wave and a cosine wave, an accumulator successively adds the products, and a microcomputer calculates the impedance of the object on the basis of the sums of products, thereby improving the accuracy of the calculating result.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: June 17, 2003
    Assignee: NEC Electronics Corporation
    Inventor: Akira Yukawa
  • Patent number: 6577139
    Abstract: An impedance converter module has a phase reversal circuit to receive a 2-wire excitation signal at first and second terminals, and to provide a polarized excitation signal with a predetermined polarity based on the 2-wire excitation signal. A series current path has a sense resistor connected in series with a variable impedance source. The polarized excitation signal is applied across the series current path. An output-voltage-sense circuit provides an output-voltage-sense signal based on a voltage across the series current path. A current mirror provides a drive signal to a ratiometric device based on current flowing through the series current path. Differential amplifiers receive a ratiometric response signal from the ratiometric device, and output measurement signals based on the ratiometric signal. A summing node combines the measurement signals to provide a single-ended ratiometric signal.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: June 10, 2003
    Assignee: Keystone Thermometrics
    Inventor: Frank G. Cooper
  • Patent number: 6573729
    Abstract: The present invention synthesizes a prescribed impedance. The impedance is synthesized by generating a current having a value substantially equal to a voltage divided by a prescribed impedance. Sensing the line voltage and converting that sensed line voltage to its digital equivalent accomplish this first step. The digital line voltage is processed by a factor related to the prescribed impedance to produce an output voltage that has a value substantially equal to the sensed voltage divided by the prescribed impedance. The output voltage controls a voltage to current converter that generates the appropriate current across the points or terminals where the line voltage was measured. Thus, the prescribed impedance is generated across these points or terminals because the line voltage divided by the generated current is substantially equal to the prescribed impedance.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: June 3, 2003
    Assignee: 3Com Corporation
    Inventors: Spiro Poulis, John Evans, Shayne Messerly