Mechanical Patents (Class 324/754.13)
  • Patent number: 11454667
    Abstract: An inspection apparatus includes: a plurality of inspection devices configured to respectively inspect electronic devices of inspection objects on a plurality of chuck tops; a measurement device configured to measure height positions of a plurality of points on a surface of each of the plurality of chuck tops, which are respectively disposed to correspond to the plurality of inspection devices, or to measure distances in a height direction from a measurement reference point to the plurality of points; a calculation device configured to calculate adjustment amounts in the height direction at the plurality of points of each chuck top, based on the height positions of the plurality of points or the distances in the height direction from the measurement reference point to the plurality of points; and an adjustment mechanism configured to adjust, for each chuck top, an angle of the respective chuck top based on the adjustment amounts.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: September 27, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Tomoya Endo
  • Patent number: 10247771
    Abstract: A testing device for testing an electronic device includes a base, a testing mechanism, a pushing mechanism, and a fastening mechanism. The testing mechanism is rotatably fastened to the base and can be rotated from a first position to a second position. The fastening mechanism is mounted on the base. The pushing mechanism is rotatably mounted on the testing mechanism. When the testing mechanism is rotated from the first position to the second position, the pushing mechanism is rotated and pushes against the testing mechanism. The testing mechanism is connected to an electronic device. The testing mechanism is positioned in the second position via the fastening mechanism.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: April 2, 2019
    Assignees: Fu Tai Hua Industry (Shenzhen) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Xing Duan
  • Patent number: 9541577
    Abstract: Provided is a current application device capable of applying a test current of a magnitude necessary for testing of a semiconductor element without any trouble. A current application device 1 is configured to have a contacting section having a plurality of projections 21 for contacting a contact region 24 inside an active region 23 of a semiconductor element 22 and applying the test current thereto, and a pressing section 3 which presses the contacting section 2 against the semiconductor element 22 such that each projection 21 contacts the contact region 24. A plurality of the projections 21 are arranged such that an arrangement density of outside projections 21 is larger than the arrangement density of inside projections 21.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: January 10, 2017
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Satoshi Hasegawa, Shigeto Akahori, Shinya Maita, Hitoshi Saito, Yoko Yamaji
  • Patent number: 9501733
    Abstract: The method of manufacturing a functional inlay comprises the steps of: —) providing a support layer with at least a first and a second side —) embedding a wire antenna in said support layer —) processing said support layer with said embedded wire antenna to a connection station in which —) said support layer is approached on said first side by a holding device holding a chip with a surface comprising connection pads; —) said support layer is approached on said second side by a connection device; and —) said antenna wire is connected to said connection pads by means of a reciprocal pressure exerted between said holding device and said connection device.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: November 22, 2016
    Assignee: ASSA ABLOY AB
    Inventors: Stephane Ayala, Urs Furter, Laurent Pellanda
  • Patent number: 9494642
    Abstract: A test pusher assembly, useful in association with a thermal control unit used to maintain a set point temperature on an integrated circuit device under test, is provided with ejection mechanisms configured to facilitate the disengagement of the DUT at the end of the test. One example of the ejection mechanisms is to provide the substrate pusher assembly with spring-loaded pins that can push the substrate of the DUT away from the pedestal at the end of the test. Another example of the ejection mechanisms is to use a pressurized fluid that can push the substrate of the DUT away from the pedestal at the end of the test.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: November 15, 2016
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Patent number: 8994390
    Abstract: A probe apparatus has probe wires with a contact pattern on one side. The contact pattern is for contacting a respective contact pattern on another test equipment or component, such as a circuit board. The probe wires have tips that probe a device desired for testing. Signals are transmitted through the probe wires from the probe card, for example, through a circuit board to other diagnostic equipment. The contact of the probe card with the circuit board allows signals to be transferred through the probe wires to the other diagnostic equipment. On another side of the probe card is a connector structure. The connector structure includes a retainer that can allow the probe card to be replaced from a test system, such as allowing it to be connected and disconnected from a holder.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: March 31, 2015
    Assignee: Celadon Systems, Inc.
    Inventors: Bryan J. Root, William A. Funk, John L. Dunklee
  • Patent number: 8912811
    Abstract: A test fixture (120) is disclosed for electrically testing a device under test (130) by forming a plurality of temporary mechanical and electrical connections between terminals (131) on the device under test (130) and contact pads (161) on the load board (160). The test fixture (120) has a replaceable membrane (150) that includes vias (151), with each via (151) being associated with a terminal (131) on the device under test (130) and a contact pad (161) on the load board (160). In some cases, each via (151) has an electrically conducting wall for conducting current between the terminal (131) and the contact pad (161). In some cases, each via (151) includes a spring (152) that provides a mechanical resisting force to the terminal (131) when the device under test (130) is engaged with the test fixture (120).
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: December 16, 2014
    Assignee: Johnstech International Corporation
    Inventors: Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian K. Warwick
  • Patent number: 8847618
    Abstract: A circuit board tester and method that precisely aligns the probe plate and circuit board is disclosed. With a circuit board and probe plate mounting within a housing having a top and bottom, hinged together, at closure there may be slight misalignments of the two. By making one of the two plates floating, or laterally slideable with respect to each other, it is possible to make final alignment at closure. One of the two plates can be provided with a pin and the other with a pin receiving alignment block. With the lateral slideability, the pin and block can insure proper probe alignment. Additional systems for correcting misaligned pins or blocks are also disclosed.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: September 30, 2014
    Assignee: Circuit Check, Inc.
    Inventors: Gregory J. Michalko, Stuart K. Eickhoff, Jon A. Hample, Russell G. Carter
  • Patent number: 8841931
    Abstract: The present disclosure provides a probe card for wafer level testing. The probe card includes a space transformer having first power/ground lines and first signal lines embedded therein, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch; a printed circuit board bonded to the first surface of the space transformer, wherein the printed circuit board includes second power/ground lines and second signal lines embedded in the printed circuit board and coupled to the first power/ground and signal lines; and conductive lines configured to a surface of the printed circuit board remote to the first surface of the space transformer, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end coupled to a different location of the printed circuit board.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: September 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Hsin Kuo, Wensen Hung
  • Patent number: 8659311
    Abstract: Provided is a test apparatus for testing a plurality of devices under test formed on a semiconductor wafer, including: a probe card to be connected to respective contacts of the plurality of the devices under test on a connection surface to be overlapped on the semiconductor wafer, the probe card being provided with a plurality of corresponding contacts on a rear surface of the connection surface; and a test head that tests the plurality of devices under test on the semiconductor wafer by sequentially connecting to each part of the plurality of contacts of the probe card.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: February 25, 2014
    Assignee: Advantest Corporation
    Inventors: Hiroshi Sakata, Ken Miyata
  • Patent number: 8451015
    Abstract: A method of testing an electrical component includes coupling the electrical component to at least a first probe, a second probe, and a third probe. The probes are in communication with a test control module. Furthermore, the method includes confirming that the probes are in sufficient electrical connection with the electrical component by allowing the test control module to supply a current through the electrical component via the first probe and the third probe, and simultaneously detecting a potential difference across the electrical component by the second probe and the third probe. Furthermore, the method includes testing a performance characteristic of the electrical component by supplying a redundant signal to the electrical component via at least two of the first probe, the second probe, and the third probe.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: May 28, 2013
    Assignee: Medtronic, Inc.
    Inventors: Christian S. Nielsen, Timothy T. Bomstad
  • Patent number: 8102184
    Abstract: A test fixture (120) is disclosed for electrically testing a device under test (130) by forming a plurality of temporary mechanical and electrical connections between terminals (131) on the device under test (130) and contact pads (161) on the load board (160). The test fixture (120) has a replaceable membrane (150) that includes vias (151), with each via (151) being associated with a terminal (131) on the device under test (130) and a contact pad (161) on the load board (160). In some cases, each via (151) has an electrically conducting wall for conducting current between the terminal (131) and the contact pad (161). In some cases, each via (151) includes a spring (152) that provides a mechanical resisting force to the terminal (131) when the device under test (130) is engaged with the test fixture (120).
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: January 24, 2012
    Assignee: Johnstech International
    Inventors: Jeffrey C. Sherry, Patrick J. Alladio, Russell F. Oberg, Brian K. Warwick
  • Patent number: 8008938
    Abstract: A testing system module for testing printed circuit board (PCB) includes at least one robot having a pogo pin for moving to a testing point of the PCB; a pressure detecting unit for detecting a current pressure value on the printed circuit board; and a control system for keeping the pogo pin to contact with the PCB with constant pressure.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: August 30, 2011
    Assignee: King Yuan Electronics Co., Ltd.
    Inventor: Cheng-Chin Ni
  • Patent number: 7969175
    Abstract: The invention relates to an apparatus for testing an integrated circuit of an electronic device.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: June 28, 2011
    Assignee: Aehr Test Systems
    Inventors: David S. Hendrickson, Jovan Jovanovic, Donald P. Richmond, II, William D. Barraclough
  • Publication number: 20110084719
    Abstract: There is provided a printed circuit board (“PCB”) test fixture comprising a support, an electrical tester, and a pusher. The support is for supporting a PCB being tested in a PCB test position, The electrical tester is positioned with respect to the PCB test position such that, when a PCB is supported by the support in the PCB test position, the electrical tester is disposed in electrical contact with a circuit on the PCB supported by the support in the PCB test position during PCB testing.
    Type: Application
    Filed: October 9, 2009
    Publication date: April 14, 2011
    Inventor: Hongjun JIANG