Optical Beam Patents (Class 324/754.23)
  • Patent number: 11973154
    Abstract: Example embodiments relate to controlling detection time in photodetectors. An example embodiment includes a device. The device includes a substrate. The device also includes a photodetector coupled to the substrate. The photodetector is arranged to detect light emitted from a light source that irradiates a top surface of the device. A depth of the substrate is at most 100 times a diffusion length of a minority carrier within the substrate so as to mitigate dark current arising from minority carriers photoexcited in the substrate based on the light emitted from the light source.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: April 30, 2024
    Assignee: Waymo LLC
    Inventors: Caner Onal, Simon Verghese, Pierre-Yves Droz
  • Patent number: 11946950
    Abstract: An electro-optical circuit board can provide probe card functionality. The electro-optical circuit board includes at least one electrical conductor track and at least one optical beam path.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 2, 2024
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Philipp Huebner, Stefan Richter
  • Patent number: 11940485
    Abstract: In an inspection apparatus for inspecting an inspection target device formed on an inspection object, the inspection target device is a back-illuminated imaging device into which light is incident from a rear surface opposite to a side of a wiring layer. The inspection apparatus includes a stage having the inspection object placed such that the inspection object faces the rear surface. The stage includes a light transmitter made of a light-transmissive material. The inspection object is placed on the light transmitter below which a light illuminator is disposed. The light illuminator includes a flat light guide plate having a facing surface facing the inspection object. A light source is provided laterally outside the light guide plate configured to diffuse light emitted from the light source incident from a side end surface of the light guide plate, and to emit the light as planar light from the facing surface.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 26, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Naoki Akiyama, Susumu Saito, Hiroyuki Nakayama, Shigeru Kasai
  • Patent number: 11921156
    Abstract: A structure and method for the wafer level testing of interposer-based photonic integrated circuits is described that includes the formation of an upturned mirror structure and the method of utilizing the interposer-based mirror structure for electrical and optical testing of optoelectrical circuits that include emitting components such as lasers, detecting components such as photodetectors, and both emitting and detecting components. Electrical activation of the optoelectrical emitting or sending devices and the subsequent detection and measurement of the optical signals in detecting or receiving devices provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: March 5, 2024
    Inventors: Lucas Soldano, Jing Yang, Yong Meng Lee, Suresh Venkatesan
  • Patent number: 11906579
    Abstract: A method for the testing of optoelectronic chips which are arranged on a wafer and have electrical interfaces in the form of contact pads and optical interfaces which are arranged to be fixed relative thereto in the form of optical deflection elements, e.g., grating couplers, with a specific coupling angle. The wafer is adjusted in three adjustment steps with one of the chips relative to a contacting module such that the electrical interfaces of the chip and contacting module contact one another, and the optical interfaces of the chip and contacting module occupy a maximum position of the optical coupling.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: February 20, 2024
    Assignee: JENOPTIK GmbH
    Inventors: Tobias Gnausch, Armin Grundmann, Thomas Kaden, Norik Janunts, Robert Buettner, Christian Karras
  • Patent number: 11848225
    Abstract: Methods and apparatus for pre-treating semiconductor wafers before edge trimming to enhance wafer edge quality prior to thinning the semiconductor wafers from an initial thickness, and increasing yield post-thinning of the pre-treated, edge trimmed semiconductor wafers. An apparatus includes a stage configured to receive one of a device wafer or a carrier wafer having a device wafer mounted thereto thereon, a laser tool located above the stage and oriented to direct a laser beam downwardly toward the stage, and a vertically movable blade rotatable about a horizontal axis along a radius from a vertical axis at a center of the device wafer and positionable proximate to and radially inward of an outer periphery of the device wafer.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Jing-Cheng Lin
  • Patent number: 11594650
    Abstract: Example embodiments relate to controlling detection time in photodetectors. An example embodiment includes a device. The device includes a substrate. The device also includes a photodetector coupled to the substrate. The photodetector is arranged to detect light emitted from a light source that irradiates a top surface of the device. A depth of the substrate is at most 100 times a diffusion length of a minority carrier within the substrate so as to mitigate dark current arising from minority carriers photoexcited in the substrate based on the light emitted from the light source.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: February 28, 2023
    Assignee: Waymo LLC
    Inventors: Caner Onal, Simon Verghese, Pierre-Yves Droz
  • Patent number: 11536768
    Abstract: An inspection apparatus includes a stage on which a substrate is placed, a cooler, a probe card, a light irradiator and a controller. The cooler cools the substrate placed on the stage. The probe card has probes to be in contact with the substrate to supply electric power. The light irradiator irradiates light to an upper surface of the substrate, opposite to a bottom surface of the substrate placed on the stage. Further, the controller controls the light irradiator.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: December 27, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Hiroyuki Nakayama
  • Patent number: 11525856
    Abstract: An inspection apparatus for inspecting a backside irradiation type imaging device formed on an inspection object includes: a stage on which the inspection object is mounted such that the stage faces a rear surface of the backside irradiation type imaging device, wherein the stage includes: a transmitter including a flat plate formed of a light transmitting material, and configured to mount the inspection object on the transmitter; and a light emitter disposed at a location facing the inspection object with the transmitter interposed between the light emitter and the inspection object, and configured to emit light toward the transmitter, and wherein the transmitter transmits the light from the light emitter while diffusing the light.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: December 13, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Naoki Akiyama, Susumu Saito, Hiroyuki Nakayama, Shigeru Kasai
  • Patent number: 11509083
    Abstract: The present invention suggests an electrical connection device having a noise blocking and damage preventing structure by comprising: a receptacle consisting of a plurality of conductive terminals and a plurality of conductive members; and a connector comprising a plurality of connector terminals corresponding to the plurality of conductive terminals.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: November 22, 2022
    Inventors: Inha Lee, Yongjin Lee, Hanseok Mun, Jaeryong Han
  • Patent number: 11422204
    Abstract: The present invention discloses a method for detecting open phase of a startup/standby transformer based on optical CT. A startup/standby transformer in a power plant is in a no-load condition for a long time as a standby power supply. Once a single-phase open phase fault occurs, there is no significant change in the voltage phasor and voltage sequence component of each side. If not found in time, the defect may pose a great threat to the safe operation of the power plant. In the present invention, the optical CT is used to detect a three-phase current of the high-voltage side of the startup/standby transformer. If the current satisfies an open phase criterion, it is determined that an open phase fault occurs, and then, an alarm signal is given after a delay and an operator is informed to handle the fault in time. Therefore, the operation reliability of the startup/standby transformer system in the power plant is enhanced.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: August 23, 2022
    Assignee: NR ELECTRIC CO., LTD
    Inventors: Jiasheng Chen, Guang Wang, Kai Wang, Yao Wang, Jun Chen, Qixue Zhang, Zigang Guo, Huazhong Li
  • Patent number: 11340284
    Abstract: A first light source is directed at an outer surface of a workpiece in an inspection module. The light from the first light source that is reflected from the outer surface of the workpiece is directed to the camera via a first pathway. The light from the first light source transmitted through the workpiece is directed to the camera via a second pathway. A second light source is directed at the outer surface of the workpiece 180° from that of the first light source. The light from the second light source that is reflected from the outer surface of the workpiece is directed to the camera via the second pathway. The light from the second light source transmitted through the workpiece is directed to the camera via the first pathway.
    Type: Grant
    Filed: July 12, 2020
    Date of Patent: May 24, 2022
    Assignee: KLA Corporation
    Inventors: Kristiaan Van Rossen, Christophe Wouters
  • Patent number: 11307250
    Abstract: A Scanning Time-Resolved Emission (S-TRE) microscope or system includes an optical system configured to collect light from emissions of light generated by a device under test (DUT). A scanning system is configured to permit the emissions of light to be collected from positions across the DUT in accordance with a scan pattern. A timing photodetector is configured to detect a single photon or photons of the emissions of light from the particular positions across the DUT such that the emissions of light are correlated to the positions to create a time-dependent map of the emissions of light across the DUT. The scanning system is configured to update the time-dependent map of the emissions based on combinations of the emissions of light at certain locations.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: April 19, 2022
    Assignee: International Business Machines Corporation
    Inventors: Franco Stellari, Peilin Song
  • Patent number: 11280751
    Abstract: There are provided a system and a method of use thereof for executing a manufacturing process. For example, a method can include executing, by a system configured to drive the manufacturing process, a set of manufacturing functions based on a digital model of a first part. The method can include fetching, by the system, from an in-field scoring system, performance data relating to a second part. The method can further include constructing the digital model based on the performance data relating to the second part. The method can further include generating, based on the digital model, a forecast representative of a performance of the first part and generating the set of manufacturing functions based on the digital model and the forecast. The method further includes manufacturing the first part according to the set of manufacturing functions.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: March 22, 2022
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Eric John Ruggiero, James Tallman
  • Patent number: 11237110
    Abstract: A method for photoluminescence measurement of a sample that includes a front face and a rear face linked by a contour, the sample resting, via the rear face of same, on a receiving face of an active base. The sample also includes a first region partially delimited by the contour and that emits a photoluminescence signal of an intensity, referred to as the first intensity, that is lower at any point to the average intensity of the photoluminescence signal of the sample, referred to as the reference intensity, the active base emitting a photoluminescence signal of an intensity, referred to as the secondary intensity, that is at least equal to the reference intensity. The active base includes an edge that is set apart from the contour by an overlap distance and that delimits, with said contour, a peripheral section of the active base.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: February 1, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Renaud Varache
  • Patent number: 11187730
    Abstract: The present invention provides an electrically isolated acquisition of a measurement signal by means of a measurement probe. For this purpose, a probe arrangement is provided with a probe head for electrically measuring a signal. The probe head is coupled to a probe coupler via optical links. In particular, optical links are used for power supply of the probe head and for forwarding optical signals corresponding to the measured electrical signal.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 30, 2021
    Assignee: ROHDE & SCHWARZ GMBH & CO. KG
    Inventors: Andreas Ziegler, Dirk Gehrke, Reiner Franke, Martin Peschke, Roland Krimmer
  • Patent number: 11187613
    Abstract: An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 30, 2021
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Grosse, Patrick Le Maitre, Jean-Francois Carpentier
  • Patent number: 11175350
    Abstract: A battery connection unit includes a first branch with a first branch switch adapted to connect a first battery to at least one of a second battery and a vehicle load; and a second branch with a second branch switch connected in parallel with the first branch. A first measurement switch is connected between the first branch and a storage element to enable/disable charging. A second measurement switch is connected between the second branch and the storage element. A processor is programmed to: disable at least one of the first branch and the second branch; enable at least one of the first measurement switch and the second measurement switch to charge the storage element with leakage current; and generate an output signal indicative of a switch fault in response to a storage element voltage associated with the leakage current exceeding a reference voltage within a predetermined time period.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: November 16, 2021
    Assignee: Lear Corporation
    Inventors: Antoni Ferre Fabregas, Carlos Fernandez Pueyo
  • Patent number: 11169202
    Abstract: A reflectometer for allowing a test of a device. The reflectometer comprises a source of pulsed radiation, a first photoconductive element configured to output a pulse in response to irradiation from the pulsed source, a second photoconductive element configured to receive a pulse, a transmission line arrangement configured to direct the pulse from the first photoconductive element to the device under test and to direct the pulse reflected from the device under test to the second photoconductive element, and a termination resistance provided for the transmission line configured to match the impedance of the transmission line.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: November 9, 2021
    Assignee: TeraView Limited
    Inventor: Bryan Edward Cole
  • Patent number: 11143692
    Abstract: An LED wafer, an LED wafer detection device and an LED wafer detection method are provided. The LED wafer includes a wafer base, a plurality of LED chips, a plurality of positive test circuit layers, a plurality negative test circuit layers, a plurality of positive test contacts, and a plurality of negative test contacts. Each LED chip has a positive contact and a negative contact respectively electrically connected to the corresponding positive test circuit layer and the corresponding negative test circuit layer. The positive test contacts are respectively electrically connected to the positive test circuit layers, and the negative test contacts are respectively electrically connected to the negative test circuit layers. Whereby, when inputting an electric current into the positive test contacts, and then outputting the electric current from the negative test contacts, each LED chip is excited to generate a light source.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: October 12, 2021
    Assignee: ASTI GLOBAL INC., TAIWAN
    Inventors: Chien-Shou Liao, Te-Fu Chang, Chun-An Lu
  • Patent number: 11099063
    Abstract: Methods and apparatus (100) for profiling a beam of a light emitting semiconductor device. The apparatus comprises a light emitting semiconductor device (102) comprising an active region (108) formed on a substrate (104) and configured to generate light when a suitable electrical current is applied to contacts on an upper surface of the device and a light emitting surface (110) defined by a lower surface of the substrate opposite the contacts. The apparatus further comprises a transmission medium (112) comprising a first surface (114) in contact with at least part of the light emitting surface of the semiconductor device and a diffusion surface (116), opposite the first surface, and configured to diffuse light emitted from the micro-LED and transmitted through the transmission medium.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: August 24, 2021
    Assignee: Facebook Technologies, LLC
    Inventors: Christopher Percival, Vincent Brennan
  • Patent number: 11061063
    Abstract: A method for characterizing an integrated circuit that selecting at least two devices from an integrated circuit for measuring light emission, wherein each of the at least two devices have experienced a different level of stress, applying power to the integrated circuit, and measuring the light emission from the at least two devices. The method also includes comparing the light emission that is measured from the at least two devices, wherein a difference between the light emission that is measured from the at least two devices greater than a predetermined ratio indicates that at least one of the devices from the at least two devices has a below specification performance.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Raphael P. Robertazzi, Peilin Song, Franco Stellari
  • Patent number: 11047806
    Abstract: Methods and systems for discovery of defects of interest (DOI) buried within three dimensional semiconductor structures and recipe optimization are described herein. The volume of a semiconductor wafer subject to defect discovery and verification is reduced by storing images associated with a subset of the total depth of the semiconductor structures under measurement. Image patches associated with defect locations at one or more focus planes or focus ranges are recorded. The number of optical modes under consideration is reduced based on any of a comparison of one or more measured wafer level defect signatures and one or more expected wafer level defect signatures, measured defect signal to noise ratio, and defects verified without de-processing. Furthermore, verified defects and recorded images are employed to train a nuisance filter and optimize the measurement recipe. The trained nuisance filter is applied to defect images to select the optimal optical mode for production.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: June 29, 2021
    Assignee: KLA-Tencor Corporation
    Inventors: Santosh Bhattacharyya, Devashish Sharma, Christopher Maher, Bo Hua, Philip Measor, Robert M. Danen
  • Patent number: 11009531
    Abstract: An image generating device is an apparatus for acquiring an image which shows a direction of an electric current flowing through a semiconductor device. The image generating device comprises a signal application unit configured to apply a stimulation signal to the semiconductor device, a magnetic detection unit configured to output a detection signal based on a magnetism generated by an application of the stimulation signal, and an image generation unit configured to generate phase image data comprising a phase component which indicates a phase difference based on the phase difference between the detection signal and a reference signal which is generated based on the stimulation signal and generate an electric current direction image which shows the direction of the electric current based on the phase image data.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 18, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Akihiro Otaka, Tomonori Nakamura
  • Patent number: 10972097
    Abstract: In accordance with an embodiment of the present invention, an optical switch includes a photoconductor body including a first edge and an opposite second edge, a first end and an opposite second end. The first edge is configured to receive an electrical input signal and the second edge is configured to deliver an electrical output signal. The photoconductor body is configured to have an electrically ON state that is activated by an optical signal and an electrically OFF state that is activated by an absence of the optical signal. A direction from the first end to the second end defines a longitudinal direction. The direction from the first edge to the second edge defines a first direction that is orthogonal to the longitudinal direction. A first dimension between the first edge and the second edge along the first direction decreases from the first end to the second end.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: April 6, 2021
    Assignee: STMICROELECTRONICS SA
    Inventors: Hanae Zegmout, Denis Pache, Stephane Le Tual, Jean-François Roux, Jean-Louis Coutaz
  • Patent number: 10955459
    Abstract: A method includes loading the semiconductor structure on a stage; providing a detector disposed above the semiconductor structure and the stage; applying a voltage to the semiconductor structure; identifying a portion of the semiconductor structure at a temperature substantially greater than a predetermined threshold by the detector; rotating the stage and recording a rotation of the stage after identifying the portion of the semiconductor structure; and deriving a position of the portion of the semiconductor structure based upon the rotation of the stage.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi Min Liu, Chien-Yi Chen, Yian-Liang Kuo
  • Patent number: 10818030
    Abstract: A three-dimensional measurement apparatus includes: projecting means for projecting, onto a measurement target, patterned light having a two-dimensionally coded pattern in which a plurality of types of words each having a different two-dimensional structure and being distinguishable from each other are two-dimensionally arranged; capturing means for capturing the measurement target onto which the patterned light is projected; and calculating means for calculating a three-dimensional position of a target pixel of the image from an image captured by the capturing means, and the two-dimensionally coded pattern is two-fold symmetrical. The two-dimensionally coded pattern is a pattern in which a predetermined word is repeated in the column direction for each column.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: October 27, 2020
    Assignee: OMRON Corporation
    Inventors: Xingdou Fu, Masaki Suwa, Yuki Hasegawa
  • Patent number: 10797640
    Abstract: A system and method for assessing performance of a plurality of perovskite optoelectronic devices are disclosed. The system comprises a chamber, a light source, a switch board for allowing selection of a device among a plurality of devices in the chamber for measurement; a DC voltage supply for applying voltage to the device, a source/measure unit (SMU) for measuring current of the device; and a computer implemented with a software program including computer executable instructions to control at least the SMU, the DC voltage supply, the switch board, and the light source. The computer-implemented method for the performance assessment by using the system includes obtaining at least one of first current-versus-voltage (I-V) data according to a first procedure and second I-V data according to a second procedure for analyzing hysteresis behavior of the device.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: October 6, 2020
    Assignee: OKINAWA INSTITUTE OF SCIENCE AND TECHNOLOGY SCHOOL CORPORATION
    Inventors: Yabing Qi, Luis Katsuya Ono, Mikas Remeika, Sonia Ruiz Raga
  • Patent number: 10797421
    Abstract: A reader suitable for reading data from a printed memory device attached to a curved surface includes a flexible wiring assembly that can be repositioned from a first position having a first profile into a second position having a second profile. In the first position, electrical contacts of the reader do not electrically couple with contact pads of the printed memory device, while in the second position the electrical contacts of the reader electrically couple to the contact pads of the printed memory. In one implementation, the flexible wiring assembly includes a flexible underlayer that supports the plurality of electrical contacts. In another implementation, the flexible wiring assembly includes a rigid first portion and a rigid second portion that pivot about a pivot point.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: October 6, 2020
    Assignee: XEROX CORPORATION
    Inventors: Michael A. Doody, Jeffrey M. Fowler
  • Patent number: 10712380
    Abstract: A method for fabricating a semiconductor structure includes when a chip under test releases an ESD current, detecting position information of photons emitted from the chip under test due to releasing of the ESD current; acquiring an image of an ESD path based on the detected position information of the photons; and determining whether the ESD path corresponding to the chip under test is normal based on the image of the ESD path and a layout image of the chip under test.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: July 14, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Jun Wang, Gang Ning Wang, Mi Tang, Xian Yong Pu, Chengyu Zhu
  • Patent number: 10613152
    Abstract: Provided is a battery monitoring device for a battery including a plurality of battery stacks. The battery monitoring device includes a plurality of monitoring modules, a power supply device, and a determination module. The power supply device includes a plurality of first power lines, a first switch, a first capacitor, a second power line, a plurality of second switches, and a plurality of second capacitors. The determination module is configured to determine a state of power supply from the power supply device to the monitoring modules. Each of the first power lines includes a first positive electrode line and a first negative electrode line, and is connected to the monitoring modules so as to supply power to the monitoring modules. The second power line includes a second positive electrode line and a second negative electrode line, and is configured to receive a predetermined amount of power.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: April 7, 2020
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Hidenori Matsutou
  • Patent number: 10613131
    Abstract: Various approaches to can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: April 7, 2020
    Assignee: FemtoMetrix, Inc.
    Inventors: Viktor Koldiaev, Marc Kryger, John Changala
  • Patent number: 10589860
    Abstract: An infrared (IR) emitter projects a spherical IR pattern. The IR emitter may include one or more IR lasers to produce two IR laser beams, two beam expanders, two diffraction screens to each produce diffracted radiation, a top wide angle lens, and a bottom wide angle lens. The wide angle lenses may each receive diffracted radiation from a respective one of the diffractions screens and may emit a spherical IR pattern including a plurality of longitudinal lines, each longitudinal line including a first portion of the spherical IR pattern emitted from the top wide angle lens and a second portion of the spherical IR pattern from the bottom wide angle lens. The IR emitter may be part of an object detection system in an aerial vehicle.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: March 17, 2020
    Assignee: GoPro, Inc.
    Inventors: Scott Patrick Campbell, Gary Fong
  • Patent number: 10591859
    Abstract: The invention achieves uniform image quality for every transfer regardless of a moisture content on a surface of a paper sheet when a plurality of transfer processes is to be made on a single paper. A copier (1A) is provided with a optical sensor (20) which includes at least one light source, illuminates a paper sheet (P) with light, receives the light reflected from the paper sheet (P), and measures the received light intensity. Before each of a plurality of transfer processes, the copier (1A) calculates a moisture content on a surface of the paper sheet (P) from the light intensity measured by the optical sensor (20), and sets a transfer condition of a transfer device (15) based on the calculated moisture content on the surface of the paper sheet (P).
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: March 17, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Kyohko Matsuda
  • Patent number: 10564215
    Abstract: A system for characterizing a semiconductor sample is disclosed. The system comprises a measurement subsystem, a data analysis subsystem, and a statistical analysis subsystem coupled to each other via an interconnection. The measurement subsystem excites a semiconductor sample by shining light on one or more points in the semiconductor sample to generate electron hole pairs, which creates a change in conductivity of the semiconductor sample. The measurement subsystem measures one or more voltage decay curves corresponding to the one or more points in the semiconductor sample based on the changes in conductivity, and transmits the measured voltage decay curves to the data analysis subsystem. The data analysis subsystem extracts one or more normalized decay curves from the transmitted measured voltage decay curves, which the data analysis subsystem then transmits to the statistical analysis subsystem. The statistical analysis subsystem analyzes the transmitted normalized decay curves.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: February 18, 2020
    Assignee: RAJA TECHNOLOGIES INC.
    Inventor: Ramesh Rajaduray
  • Patent number: 10551325
    Abstract: Semiconductor metrology systems based on directing radiation on a wafer, detecting second harmonic generated (SHG) radiation from the wafer and correlating the second harmonic generated (SHG) signal to one or more electrical properties of the wafer are disclosed. The disclosure also includes parsing the SHG signal to remove contribution to the SHG signal from one or more material properties of the sample such as thickness. Systems and methods described herein include machine learning methodologies to automatically classify obtained SHG signal data from the wafer based on an electrical property of the wafer.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: February 4, 2020
    Assignee: FemtoMetrix, Inc.
    Inventors: Viktor Koldiaev, Marc Christopher Kryger, John Paul Changala, Jianing Shi
  • Patent number: 10473694
    Abstract: A system for atomic force microscopy in which a sharp electrode tip of an flexing probe cantilever is positioned closely adjacent a sample being probed for its electrical characteristics. An optical beam irradiates a portion of the sample surrounding the probe tips and is modulated at a radio or lower modulation frequency. In one embodiment, a reference microwave signal is incident to the electrode tip. Microwave circuitry receives a microwave signal from the probe tip, which may be the reflection of the incident signal. Electronic circuitry processes the received signal with reference to the modulation frequency to produce one or more demodulated signals indicative of the electronic or atomic properties of the sample. Alternatively, the optical beam is pulsed and the demodulated signal is analyzed for its temporal characteristics. The beam may non-linearly produce the microwave signal. Two source lasers may have optical frequencies differing by the microwave frequency.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: November 12, 2019
    Assignee: Primenano, Inc.
    Inventors: Stuart L. Friedman, Michael M. Kelly
  • Patent number: 10347872
    Abstract: This disclosure provides techniques for assessing quality of a deposited film layer of an organic light emitting diode (“OLED”) device. An image is captured and filtered to identify a deposited layer that is to be analyzed. Image data representing this layer can be optionally converted to brightness (grayscale) data. A gradient function is then applied to emphasize discontinuities in the deposited layer. Discontinuities are then compared to one or more thresholds and used to ascertain quality of the deposited layer, with optional remedial measures then being applied. The disclosed techniques can be applied in situ, to quickly identify potential defects such as delamination before ensuing manufacturing steps are applied. In optional embodiments, remedial measures can be taken dependent on whether defects are determined to exist.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 9, 2019
    Assignee: Kateeva, Inc.
    Inventor: Christopher Cocca
  • Patent number: 10330614
    Abstract: Methods and systems using low temperature thermo-luminescence to measure donor ionization energies in luminescence semiconductors are described.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: June 25, 2019
    Assignee: Bowling Green State University
    Inventor: Farida Selim
  • Patent number: 10161993
    Abstract: Automated test equipment capable of performing a high-speed test of semiconductor devices is presented. The automated test equipment apparatus comprises a computer system comprising a tester processor, wherein the tester processor is communicatively coupled to a plurality of FPGA components. Each of the plurality of FPGA components is coupled to a memory module and comprises: an upstream port operable to receive commands and data from the tester processor; a downstream port operable to communicate with a respective DUT from a plurality of DUTs; and a plurality of hardware accelerator circuits, wherein each of the accelerator circuits is configured to communicate with one of the plurality of DUTs. Each of the plurality of hardware accelerator circuits comprises a pattern generator circuit configurable to automatically generate test pattern data and a comparator circuit configured to compare data.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: December 25, 2018
    Assignee: Advantest Corporation
    Inventors: John Frediani, Andrew Niemic
  • Patent number: 10139447
    Abstract: An image generation apparatus is an image generation apparatus that generates an image based on measurement light from the semiconductor device, and the image generation apparatus includes an optical sensor that detects the measurement light, an optical sensor power supply that applies a constant voltage to the optical sensor to supply a current to the optical sensor, a current detector that generates a pattern signal according to magnitude of the current supplied to the optical sensor by the optical sensor power supply, and a control device that generates a pattern image based on the pattern signal.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: November 27, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomonori Nakamura, Mitsunori Nishizawa
  • Patent number: 10006960
    Abstract: A reflectometer for allowing a test of a device, the reflectometer comprising: a source of pulsed radiation; a first photoconductive element configured to output a pulse in response to irradiation from said pulsed source; a second photoconductive element configured to receive a pulse; a transmission line arrangement configured to direct the pulse from the first photoconductive element to the device under test and to direct the pulse reflected from the device under test to the second photoconductive element; and a termination resistance provided for said transmission line configured to match the impedance of the transmission line.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: June 26, 2018
    Assignee: TeraView Limited
    Inventor: Bryan Edward Cole
  • Patent number: 10001441
    Abstract: There is provided a technique for easily inspecting the modification state of a film in a semiconductor substrate. A modification processing device modifies a film by irradiating a semiconductor substrate with pulsed light emitted from a light irradiation part. The modification processing device includes an electromagnetic wave detection part for detecting an electromagnetic wave pulse including a millimeter wave or a terahertz wave radiated from the semiconductor substrate in response to the irradiation with the pulsed light. The modification processing device further includes a modification determination part for determining the modification state, based on the intensity of the electromagnetic wave pulse.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: June 19, 2018
    Assignees: SCREEN HOLDINGS CO., LTD., OSAKA UNIVERSITY
    Inventors: Hidetoshi Nakanishi, Akira Ito, Iwao Kawayama, Masayoshi Tonouchi, Yuji Sakai
  • Patent number: 9893131
    Abstract: The present application discloses an array substrate having a plurality of semiconductor elements and a plurality of test electrodes. Each of the plurality of semiconductor elements comprises a plurality of terminals, each of which is electrically connected to a different test electrode. At least one of the plurality of test electrodes is electrically connected to at least two different semiconductor elements.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: February 13, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yucheng Chan, Shuai Zhang
  • Patent number: 9774810
    Abstract: An image sensor includes a readout unit having a plurality of circuit blocks. At least a part of each of the plurality of circuit blocks is arranged in each of a plurality of regions electrically isolated from each other. When latchup has occurred in a circuit block of the plurality of circuit blocks, the voltage supply unit shuts off supply of a power supply voltage to the region in which the part is arranged, and then performs the supply of the power supply voltage to the region in which the part is arranged, and the voltage supply unit supplies the power supply voltage to the region in which the circuit block without latchup is arranged, while shutting off the supply of the power supply voltage to the region in which the part is arranged.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: September 26, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuaki Tashiro, Takashi Moriyama, Tatsuhito Goden, Toshiaki Ono
  • Patent number: 9739831
    Abstract: A test system and method for testing integrated circuits with improved defect localization is disclosed. A laser is used to perturb a device under test (DUT) at a test location. A tester tests the DUT with a test pattern and compares test results with compare vectors in a prior failure log. When a failure signature is matched, a failure signal is generated, indicating that the test location is a failed location. Comparing the test results with the compare vectors in the prior failure log and generating the failure signal when the failure signature is detected reduces artifacts from testing, shortening debug turnaround time.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: August 22, 2017
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Szu Huat Goh, Yin Hong Chan, Boon Lian Yeoh, Jeffrey Chor Keung Lam
  • Patent number: 9699035
    Abstract: Techniques are described for determining the topology of an optical network. A computing device receives a message on a data communication network after a first device in an optical network receives an optical pulse pattern on an optical fiber in the optical network. The computing device generates topology data using the message. The topology data indicates that a second device is physically connected in the optical network to the first device when the received optical pulse pattern matches an optical pulse pattern sent by the second device.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: July 4, 2017
    Assignee: Juniper Networks, Inc.
    Inventor: Gert Grammel
  • Patent number: 9647283
    Abstract: A measurement device for measuring voltages along a linear array of voltage sources, such as a fuel cell stack, includes at least one movable contact or non-contact voltage probe that measures a voltage of an array element.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: May 9, 2017
    Assignee: BLOOM ENERGY CORPORATION
    Inventors: John Matthew Fisher, Ian Russell, Chad Pearson, Robert Hintz, Nathan Ben Erlin, David Edmonston, Stephen Couse, Michael Dubuk
  • Patent number: 9618550
    Abstract: A semiconductor device testing apparatus 1A includes a tester unit 16 that generates an operational pulse signal, an optical sensor 10 that outputs a detection signal as a response to the operational pulse signal, a pulse generator 17 that generates a reference signal containing a plurality of harmonics for the operational pulse signal in synchronization with the operational pulse signal, a spectrum analyzer 13 that receives the detection signal and acquires a phase and amplitude of the detection signal at a detection frequency, a spectrum analyzer 14 that receives the reference signal and acquires a phase of the reference signal at a detection frequency, and an analysis control unit 18 that acquires a time waveform of the detection signal based on the phase and the amplitude of the detection signal acquired by the spectrum analyzer 13 and the phase of the reference signal acquired by the spectrum analyzer 14.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: April 11, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomonori Nakamura, Akihiro Otaka, Mitsunori Nishizawa
  • Patent number: 9568530
    Abstract: Embodiments of the present disclosure provide configurations for testing arrangements for testing multi-lane active cables. In one embodiment, a testing arrangement may comprise a testing module comprising a pattern generator to be coupled with an active cable having a plurality of lanes to generate a test pattern to be transmitted over the active cable, wherein the test pattern is to be transmitted at least over two or more lanes of the active cable that are concatenated, and a processing unit to be coupled with the active cable to process a result of the transmission of the test pattern over the active cable. The arrangement may further include a plurality of testing cables to concatenate two or more of the lanes of the active cable, to enable the transmission of the test pattern over the concatenated lanes of the active cable. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: February 14, 2017
    Assignee: INTEL CORPORATION
    Inventors: Ehud Udi Shoor, Dror Lazar, Adee O. Ran