Non-contact Probe Patents (Class 324/754.21)
  • Patent number: 10740262
    Abstract: An input/output (I/O) block for a semiconductor integrated circuit (IC), which includes: at least one I/O buffer, configured to define at least one signal path in respect of a connection to a remote I/O block via a communication channel, each signal path causing a respective signal edge slope; and an I/O sensor, coupled to the at least one signal path and configured to generate an output signal indicative of one or both of: (a) a timing difference between the signal edge for a first signal path and the signal edge for a second signal path, and (b) an eye pattern parameter for one or more of the at least one signal path.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: August 11, 2020
    Assignee: PROTEANTECS LTD.
    Inventors: Eyal Fayneh, Evelyn Landman, Shai Cohen, Guy Redler, Inbar Weintrob
  • Patent number: 10691855
    Abstract: Devices, methods, and computer program products for detecting Points Of Failures in an integrated circuit (IC) are provided. The integrated circuit device is described by a structural description (2) comprising a plurality of elements, the elements representing cells and wires interconnecting the cells, the structural description further comprising portions representing a set of sensitive functional blocks (16), each sensitive functional block comprising one or more inputs, at least one sensitive output, and a set of elements interconnected such that the value of the sensitive output is a Boolean function of the input values of the sensitive functional block.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: June 23, 2020
    Assignee: SECURE-IC SAS
    Inventors: Sylvain Guilley, Théophile Boue
  • Patent number: 10663504
    Abstract: Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and/or magnetic field biases can be applied to the sample to provide additional information.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: May 26, 2020
    Assignee: FemtoMetrix, Inc.
    Inventors: Viktor Koldiaev, Marc Kryger, John Changala
  • Patent number: 10641821
    Abstract: An integrated circuit is fabricated on a semiconductor material die and adapted to be at least partly tested wirelessly. Circuitry for setting a selected radio communication frequency to be used for the wireless test of the integrated circuit is integrated on the semiconductor material die.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: May 5, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 10607531
    Abstract: The disclosure discloses a display driving circuit, a driving method thereof and a display apparatus. A signal receiving antenna detects the degree of noise coupling of a pair of differential data transmission lines, and transmits to a signal compensation controller a voltage value of a coupling signal. The signal compensation controller transmits to a timer controller and/or a source IC a correction signal corresponding to the voltage value of the coupling signal, which is used to adjust differential data signals transmitted over the pair of differential data transmission lines.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: March 31, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Fei Shang, Sijun Lei, Liang Gao, Guohao Li, Yong Long, Yuxu Geng, Qian Qian, Xu Lu
  • Patent number: 10317446
    Abstract: A radiated emission measuring device includes: an electric field measuring device and an arithmetic processing unit. The arithmetic processing unit performs: a first arithmetic process of creating at least one of an electric field distribution and an electric field strength distribution of the plurality of measurement points measured by the electric field measuring device and inputting zero to at least one of an electric field and electric field strengths at a certain point between two neighboring measurement points; a second arithmetic process of applying a digital low pass filter to at least one of the electric field distribution and the electric field strength distribution obtained in the first arithmetic process; and a third arithmetic process of specifying a position at a maximum electric field strength from at least one of an electric field distribution and an electric field strength distribution obtained in the second arithmetic process.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: June 11, 2019
    Assignee: TDK CORPORATION
    Inventors: Masataka Midori, Hiroshi Kurihara
  • Patent number: 10274369
    Abstract: Systems and methods are provided for a UV-VIS spectrophotometer, such as a UV-VIS detector unit included in a high-performance liquid chromatography system. In one example, a system for the UV-VIS detector unit may include a first light source, a signal detector, a flow path positioned intermediate the first light source and the signal detector, a second light source, and a reference detector. The first light source, the signal detector, and the flow path may be aligned along a first axis, and the second light source and the reference detector may be aligned along a second axis, different than the first axis.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: April 30, 2019
    Assignee: Phoseon Technology, Inc.
    Inventors: Lowell Brunson, John Christopher Freitag, Theresa Thompson
  • Patent number: 10097016
    Abstract: A system for measuring a current from a battery with a Hall Effect sensor, the current powering a primary load and a secondary load. The system to calculate a status of the battery based on the measured current, then compare the status of the battery to a predetermined value. The system to activate a relay when the status of the battery is below a predetermined value, activation of the relay to prevent the current from powering the secondary load.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: October 9, 2018
    Assignee: Littelfuse, Inc.
    Inventors: Andrew Menzer, Armando Zacarias
  • Patent number: 9784787
    Abstract: An electric field sensor includes sense and reference cells. The sense cell produces a resistance that varies relative to an intensity of an electric field, and the reference cell produces a resistance that is invariable relative to the intensity of the electric field. An output signal indicative of the intensity of the electric field is determined using the difference between the resistances. A system includes an electric field source that outputs a digital test program as an electric field signal. The system further includes the electric field sensor formed with IC dies on a wafer. The electric field sensor receives the electric field signal. The received electric field signal is converted to the test program, and the test program is stored in memory on the wafer. The electric field source does not physically contact the dies, but can flood an entire surface of the wafer with the electric field signal.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: October 10, 2017
    Assignee: NXP USA, Inc.
    Inventors: Lianjun Liu, Philippe Bernard Roland Lance, David Joseph Monk, Babak A Taheri
  • Patent number: 9671460
    Abstract: The present invention provides a detecting apparatus and a detecting method. The detecting apparatus comprises: a base, a light source module, an image generating unit and a detecting unit. The light source module is configured to generate detecting light and cause the detecting light to irradiate towards the image generating unit after passing through an area of a shorting bar circuit in a panel. The image generating unit is configured to receive the detecting light irradiating thereon, and generate a detecting image of the area of the shorting bar circuit. The detecting unit is configured to detect whether the shorting bar circuit in the panel is cut off based on the detecting image. As the detecting light passing through the panel lasts for a longer time and is of higher brightness, the detecting image generated by the image generating unit is clearer.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: June 6, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Chuanbing Wei, Xiaoming Zhang, Song Wu
  • Patent number: 9470713
    Abstract: A method for determining scattering parameters using a calibration substrate having at least one calibration standard with at least two electrical connection points, each for one measurement gate of a vector network analyzer. At least one electrical connection point is formed of at least one calibration standard having a switch, wherein the switch has a first electrical contact electrically connected to an electrical connection point of the calibration standard, a second electrical contact designed for electrically connecting to a measurement gate of the vector network analyzer, and a third electrical contact, wherein the switch is designed such that an electrical contact is established either between the first and third electrical contact or between the first and second electrical contact.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: October 18, 2016
    Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KG
    Inventors: Thomas Zelder, Bernd Geck
  • Patent number: 9372228
    Abstract: Electronic device structures such as structures containing antennas, connectors, welds, electronic device components, conductive housing structures, and other structures can be tested for faults using a non-contact test system. The test system may include a vector network analyzer or other test unit that generates radio-frequency tests signals in a range of frequencies. The radio-frequency test signals may be transmitted to electronic device structures under test using an antenna probe that has one or more test antennas. The antenna probe may receive corresponding radio-frequency signals. The transmitted and received radio-frequency test signals may be analyzed to determine whether the electronic device structures under test contain a fault.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: June 21, 2016
    Assignee: Apple Inc.
    Inventors: Joshua G. Nickel, Jonathan P. G. Gavin
  • Patent number: 9236220
    Abstract: An automatic setting method of an observation condition to facilitate analysis of an image and a sample observation method by automatic setting in an observation method of a structure of a sample by the electronic microscope and an electronic microscope having an automatic setting function are provided. The method includes a step of irradiating a fixed position in an observation region with an intermittent pulsed electron beam; a step of detecting a time change of an emission electron from the sample by the intermittent electron beam; and a step of setting the observation condition of the electronic microscope from the time change of the emission electron.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: January 12, 2016
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Natsuki Tsuno, Hideyuki Kazumi, Takafumi Miwa, Yoshinobu Kimura, Hajime Kawano
  • Publication number: 20150091598
    Abstract: The transformer fault detection apparatus includes an integrated sensor unit for sensing signals through a plurality of sensors located on each of upper and lower drain valves in a transformer. A first possible discharge area calculation unit calculates a first possible discharge area estimated to be a location of a partial discharge source of the transformer, based on arrival times of signals sensed by different sensors located on the upper drain valve. A second possible discharge area calculation unit calculates a second possible discharge area estimated to be the location of the partial discharge source, based on arrival times of signals sensed by different sensors located on the lower drain valve. A final possible discharge area calculation unit calculates a final possible discharge area, based on an overlapping area between the first and second possible discharge areas.
    Type: Application
    Filed: August 12, 2014
    Publication date: April 2, 2015
    Inventors: Kison HAN, Jinyul YOON, Hyungjun JU, Kijung ANN
  • Publication number: 20150091594
    Abstract: A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.
    Type: Application
    Filed: June 24, 2014
    Publication date: April 2, 2015
    Inventor: Brett J Hamilton
  • Patent number: 8970233
    Abstract: A controller for use with a nondestructive inspection system communicates with the nondestructive inspection system and with a robot for moving an inspection probe of the nondestructive inspection system relative to an object under inspection. The controller is configured to periodically generate estimated position information of the probe moving relative to the object under inspection and communicate the estimated position information to the nondestructive inspection system as the nondestructive inspection system collects inspection data from the probe. The controller receives actual position information from the robot, the actual position information indicating an actual position of the probe, and corrects the estimated position information based on the actual position information.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: March 3, 2015
    Assignee: Spirit AeroSystems, Inc.
    Inventors: Adam Joseph Donar, W. Robert Nelson, Gregorio Balandran
  • Patent number: 8941401
    Abstract: A test circuit is described of a circuit integrated on wafer of the type comprising at least one antenna of the embedded type comprising at least one test antenna associated with said at least one embedded antenna that realizes its connection of the wireless loopback type creating a wireless channel for said at least one embedded antenna and allows its electric test, transforming an electromagnetic signal of communication between said at least one embedded antenna and said at least one test antenna into an electric signal that can be read by a test apparatus.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: January 27, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 8922234
    Abstract: A probe card for conducting an electrical test on a test subject includes a substrate body including a first surface, which faces toward the test subject, and a second surface, which is opposite to the first surface. A through electrode extends through the substrate body between the first surface and the second surface. A contact bump is formed in correspondence with the electrode pad and electrically connected to the through electrode. An elastic body is filled in an accommodating portion, which is formed in the substrate body extending from the first surface toward the second surface. The contact bump is formed on the elastic body.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 30, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Hideaki Sakaguchi, Mitsutoshi Higashi
  • Patent number: 8907691
    Abstract: A system and method are provided for testing an integrated circuit (IC) using thermally induced noise analysis. The method provides an IC die and supplies electrical power to the IC die. The IC die surface is scanned with a laser, and the laser beam irradiated locations on the IC die surface are tracked. The laser scanning heats active electrical elements underlying the scanned IC die surface. A frequency response of an IC die electrical interface is measured and correlated to irradiated locations. IC die defect regions are determined in response to identifying location-correlated frequency measurements exceeding a noise threshold. For example, a frequency measurement may be correlated to a die surface location, and if frequency measurement exceeds the noise threshold, then circuitry underlying that surface area may be identified as defective. Typically, die defect regions are associated with measurements in the frequency range between about 1 Hertz and 10 kilohertz.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: December 9, 2014
    Assignee: Applied Micro Circuits Corporation
    Inventor: Joseph Martin Patterson
  • Patent number: 8847617
    Abstract: Electronic device structures such as structures containing antennas, connectors, welds, electronic device components, conductive housing structures, and other structures can be tested for faults using a non-contact test system. The test system may include a vector network analyzer or other test unit that generates radio-frequency tests signals in a range of frequencies. The radio-frequency test signals may be transmitted to electronic device structures under test using an antenna probe that has one or more test antennas. The antenna probe may receive corresponding radio-frequency signals. The transmitted and received radio-frequency test signals may be analyzed to determine whether the electronic device structures under test contain a fault.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: September 30, 2014
    Assignee: Apple Inc.
    Inventors: Joshua G. Nickel, Jonathan P. G. Gavin
  • Patent number: 8803538
    Abstract: A contactless measuring system having at least one test probe forming part of a coupling structure for the contactless decoupling of a signal running on a signal waveguide, wherein the signal waveguide is designed as a conductor of the electric circuit on a circuit board and as part of an electric circuit. To this end, at least one contact structure is configured and disposed on the circuit board such that said contact structure is galvanically separated from the signal waveguide, forms part of the coupling structure, is displaced completely within the near field of the signal waveguide, and has at least one contact point, which may be electrically contacted by a contact of the test probe.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: August 12, 2014
    Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KG
    Inventor: Thomas Zelder
  • Patent number: 8779752
    Abstract: A device for allowing an electrical worker to use a non-contact voltage detector to check for the presence or absence of voltage inside a closed electrical panel is provided. The device includes an assembly having a front side and an opposite back side, a plurality of posts extending outwardly from the back side of and configured to hold wires in a fixed position within the closed electrical panel, and a plurality of indentations in the front side which form protrusions on the back side and are positioned to allow for positioning the non-contact voltage detector proximate the wires for testing with the non-contact voltage detector.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: July 15, 2014
    Assignee: Grace Engineered Products, Inc.
    Inventor: Philip Brown Allen, Jr.
  • Patent number: 8760184
    Abstract: A measuring probe, particularly for a non-contacting vector network analysis system, having a housing and at least one coupling structure disposed on the housing and designed for coupling an HF signal from a signal line, such that at least one additional signal probe is disposed on the housing for coupling an electrical signal into the signal line.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: June 24, 2014
    Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KG
    Inventors: Thomas Zelder, Bernd Geck
  • Publication number: 20140159759
    Abstract: A wiring fault detection method according to an embodiment of the present invention is capable of determining that, in a case where a temperature rise value of a faulty portion exceeds a temperature rise threshold within a preset threshold of the number of frames, a corresponding pixel has a fault. A wiring fault detection apparatus according to the present invention includes a temperature measurement imaging unit that measure a temperature of a semiconductor substrate and forms an image thereof.
    Type: Application
    Filed: August 30, 2012
    Publication date: June 12, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Yuji Karita
  • Patent number: 8686748
    Abstract: An apparatus for providing modulation mapping is disclosed. The apparatus includes a laser source, a motion mechanism providing relative motion between the laser beam and the DUT, signal collection mechanism, which include a photodetector and appropriate electronics for collecting modulated laser light reflected from the DUT, and a display mechanism for displaying a spatial modulation map which consists of the collected modulated laser light over a selected time period and a selected area of the IC.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: April 1, 2014
    Assignee: DCG Systems, Inc.
    Inventor: Steven Kasapi
  • Publication number: 20140070833
    Abstract: A power circuit configured to generate and distribute DC electrical power, the power circuit includes a photovoltaic (PV) system that includes an array of PV modules electrically coupled to a combiner box, and an inverter positioned to receive DC electrical power from the array of PV modules and output AC electrical power. The PV system also includes a signal generator coupled to a first portion of the PV system, and a signal detector coupled to a second portion of the PV system, the signal detector configured to detect secondary signals generated at a loose connection of an electrical joint in the PV system, wherein the secondary signals result from a signal generated by the signal generator.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 13, 2014
    Inventors: Charles John Luebke, Xin Zhou, John J. Shea, Birger Pahl, B. Thomas Pier
  • Patent number: 8659312
    Abstract: A probe card has a thin film substrate having projection electrodes on a first surface facing the semiconductor wafer and at a position facing the pad electrodes, a non-contact electrode, and first electrodes provided a second surface opposite to the first surface; and a wiring substrate having second electrodes disposed at a side opposite to the semiconductor wafer in the thin film substrate and at a position facing the first electrodes. The wiring substrate and the thin film substrate form a first sealed space and the thin film substrate and the semiconductor wafer form a second sealed space. By reducing the pressure in the first and the second sealed space, the first and the second electrodes are brought into close contact with each other and the pad electrodes and the projection electrodes are brought into close contact with each other, and the pressure of each of the first and second sealed space can be independently adjusted.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: February 25, 2014
    Assignee: Panasonic Corporation
    Inventors: Yoshirou Nakata, Naomi Miyake
  • Publication number: 20130293253
    Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes an inductive or capacitive wireless communication structure located on a die region of the integrated circuit. This wireless communication structure is configured to wirelessly receive a test stimulus vector to test circuitry on the die region. The integrated circuit also includes a landing region having a size and location suitable to allow a conductive needle or conductive probe to come into direct physical and electrical contact with the landing region. The landing region provides a DC power supply to the circuitry on the die region while the test stimulus vector is wirelessly received.
    Type: Application
    Filed: May 7, 2012
    Publication date: November 7, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Hsin Kuo, Po-Yi Huang
  • Publication number: 20130207681
    Abstract: A method and apparatus for interrogating an electronic component, includes a body having an interface for an interrogating device to use as a conduit in reliably performing multiple discrete interrogations of the electronic component without the interrogating device physically touching the electronic component.
    Type: Application
    Filed: January 30, 2013
    Publication date: August 15, 2013
    Inventors: Steven Slupsky, Christopher Sellathamby
  • Publication number: 20130162277
    Abstract: A uniform field area (UFA) testing apparatus, used for an UFA test, including a testing rack and a plurality of field strength probes. The plurality of field strength probes are mounted on the testing rack. The plurality of field strength probes are positioned on a vertical plane and forms a probe grid array corresponding to the testing points of the UFA test, the grid spacing of the probe grid array corresponds to the distance of the neighboring testing points of the UFA test.
    Type: Application
    Filed: December 18, 2012
    Publication date: June 27, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
  • Patent number: 8471580
    Abstract: An apparatus comprises: a first signal source; a dopant profile measurement module (DPPM) configured to receive a portion of the signal from the signal source; a probe tip connected to the reflective coupler; a load connected in parallel with the probe tip; and a second signal source connected to a load, wherein the signal source is configured to provide an amplitude-modulated (AM) signal to the probe tip. A method is also described.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: June 25, 2013
    Assignee: Agilent Technologies, Inc.
    Inventors: Hassan Tanbakuchi, Roger B. Stancliff, Timothy M. Graham, Wenhai Han
  • Patent number: 8421491
    Abstract: Provided is an active non-contact probe card including a carrier, a support base, a piezoelectric material layer, an active sensor array chip and a control circuit. The support base is disposed on the carrier. The piezoelectric material layer is connected with the support base. The position of the active sensor array chip with respect to the carrier is determined according to the thicknesses of the support base and the thicknesses of the piezoelectric material layer. A control circuit provides a control voltage to the piezoelectric material layer to control the thickness of the piezoelectric material layer, so as to adjust the position of the active sensor array chip with respect to the carrier.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: April 16, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Kun Chen, Yi-Lung Lin
  • Patent number: 8410805
    Abstract: An electric field detection probe includes a cable including an internal conductor line, an insulating layer that coats a surface of the internal conductor line and exposes a tip end of the internal conductor line, an external conductor layer that coats a surface of the insulating layer and exposes the tip end, and an electric field diaphragm wherein the electric field diaphragm is electrically coupled to the external conductor layer, covers the tip end surface of the cable except for an opening.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: April 2, 2013
    Assignee: Fujitsu Limited
    Inventors: Daisuke Uchida, Shinichi Wakana
  • Patent number: 8400175
    Abstract: A scanning/imaging system wherein an external stimulus is used for exciting a device under test (DUT). A stimulus source is included for providing a stationary stimulus with a controllable spot size to a device under test (DUT), the controllable spot size covering a portion of the DUT for excitation by the stationary stimulus. A sensor is operable for capturing at least one of a functional response signal and an optical image signal emanating from the DUT portion. A linear positioning device is operable to facilitate scanning of remaining portions of the DUT until a predetermined area thereof has been traversed. A controller is operably coupled to the linear positioning device, stimulus source and the sensor for providing the overall control thereof.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: March 19, 2013
    Inventor: James B. Colvin
  • Patent number: 8400181
    Abstract: A wafer is disclosed that includes a plurality of pipeline interconnected integrated circuit dies that form a plurality of pipelines. A plurality of dies in each pipeline is connected to receive scanned output test data from a neighboring die in a pipeline. A wafer level test access mechanism (TAM) transceiver circuitry, located outside the plurality of pipeline interconnected IC dies, is connected in common to each of the pipelines to provide input test data in a parallel fashion to the plurality of pipelines. The wafer level test access mechanism transceiver circuitry also provides output test results from each of the pipelines for evaluation by a computerized test system. In one embodiment, the wafer level test access mechanism transceiver circuitry is wireless so that it wirelessly receives test data to be passed through the multiple pipelines on a wafer and also includes wireless transmit circuitry to transmit test results from each of the pipelines.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: March 19, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Sravan Kumar Bhaskarani
  • Patent number: 8378702
    Abstract: Apparatus and methods for non-contact testing of electronic components printed on a substrate (3) are provided. Test circuits (11) are printed on the substrate (3) at the same time as the desired electronic component. The test circuits (11) are all optical and include a first portion (13) for providing electrical energy for the test circuit (11) and a second portion (15) for generating a detectable optical signal that is indicative of at least one electrical property of the electronic component. The test circuits are used in real time and minimize the production of unusable scrap in the printing of such products as ePaper.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: February 19, 2013
    Assignee: Corning Incorporated
    Inventors: Robert Addison Boudreau, Douglas Edward Brackley, Kevin Thomas Gahagan, Gary Edward Merz, Leon Robert Zoeller, III
  • Patent number: 8378701
    Abstract: A non-contact voltage contrast (VC) method of determining TSV joint integrity after partial assembly. A TSV die is provided including TSVs that extend from a frontside of the TSV die to TSV tips on a bottomside of the TSV die. At least some TSVs (contacting TSVs) are attached to pads on a top surface of a multilayer (ML) package substrate. The ML package substrate is on a substrate carrier that blocks electrical access to the frontside of the TSV die. Two or more nets including groups of contacting TSVs are tied common within the ML substrate. A charged particle reference beam is directed to a selected TSV within a first net and a charged particle primary beam is then rastered across the TSVs in the first net. VC signals emitted are detected, and joint integrity for the contacting TSVs to pads of the ML package substrate is determined from the VC signals.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: February 19, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Jeffrey A. West
  • Publication number: 20130027071
    Abstract: A testing apparatus includes a tester and a probe card system that includes a probe card connected to the tester, and an active interposer connected to the probe card and wirelessly coupled with a device to be tested. The active interposer includes pads positioned on its free surface facing the device. The pads are positioned with respect to pads of the device so that each pad of the active interposer faces a pad of the device and is separated therefrom by a dielectric. Each pair of facing pads forms an elementary wireless coupling element which allows a wireless transmission between the active interposer and the device. The active interposer also includes an amplifier circuit configured to amplify wireless signals from the device before forwarding them to the tester. The probe card system includes a transmission element able to transmit a power voltage from the tester to the device.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 31, 2013
    Applicant: STMicroelectonics S.r.I.
    Inventors: Roberto Canegallo, Mauro Scandiuzzo, Roberto Cardu, Eleonora Franchi Scarselli, Alberto Pagani
  • Patent number: 8310256
    Abstract: An improved system for capacitive testing electrical connections in a low signal environment. The system includes features that increase sensitivity of a capacitive probe. One feature is a spacer positioned to allow the probe to be partially inserted into the component without contacting the pins. The spacer may be a collar on the probe that contacts the housing of the component, contacts the substrate of the circuit assembly, or both. In some other embodiments, the spacer may be a riser extending beyond the surface of the sense plate that contacts the component, a riser portion of the component, or a combination of both. The spacer improves sensitivity by establishing a small gap between a sense plate of the probe and pins under test without risk of damage to the pins. A second feature is a guard plate of the probe with reduced capacitance to a sense plate of the probe. Reducing capacitance also increases the sensitivity of the probe.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 13, 2012
    Assignee: Teradyne, Inc.
    Inventor: Anthony J. Suto
  • Patent number: 8305100
    Abstract: The apparatus (1) for checking the operational condition of an electronic sensor element (3) which measures a physical quantity comprises testing means for providing a test deflection, corresponding to a specific change in the measured physical quantity, in the measurement signal produced by the sensor element and by a measuring circuit (2) connected thereto. According to the invention, the testing means comprise a testing circuit (4) which is galvanically separated from the measuring circuit and includes a light source (5a, 5b), and a light-sensitive component (6a, 6b) connected to the measuring circuit for receiving a light signal (7a, 7b) emitted by the light source and for further providing in the measurement signal a test deflection proportional to the light signal.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: November 6, 2012
    Inventor: Risto Hedman
  • Patent number: 8278959
    Abstract: A method and system for measuring laser induced phenomena changes of at least one of a resistance, a capacitance and an inductance in a semiconductor device. The method comprises applying a biasing voltage from an emitter-follower circuit to a device under test (DUT); inducing said changes in the DUT; and measuring a voltage change in a collector portion of the emitter-follower circuit as a measure for said changes.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: October 2, 2012
    Assignee: Semicaps Pte Ltd
    Inventors: Choon Meng Chua, Lian Ser Koh, Soon Huat Tan, Wah Pheng Chua, Chee Hong Jacob Phang
  • Patent number: 8253431
    Abstract: The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: August 28, 2012
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Shao Lai, Tsung-Yueh Tsai, Ming-Kun Chen, I. L. Lin, Ken Juang, Ming-Hsiang Cheng
  • Patent number: 8093920
    Abstract: Surface photo-voltage measurements are used to accurately determine very long steady state diffusion length of minority carriers and to determine iron contaminant concentrations and other recombination centers in very pure wafers. Disclosed methods use multiple (e.g., at least two) non-steady state surface photovoltage measurements of diffusion length done at multiple (e.g., at least two) modulation frequencies. The measured diffusion lengths are then used to obtain a steady state diffusion length with an algorithm extrapolating diffusion length to zero frequency. The iron contaminant concentration is obtained from near steady state measurement of diffusion length at elevated frequency before and after iron activation. The concentration of other recombination centers can then be determined from the steady state diffusion length and the iron concentration measured at elevated frequency.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: January 10, 2012
    Assignee: Semiconductor Diagnostics, Inc.
    Inventors: Jacek Lagowski, Alexandre Savtchouk, Marshall D. Wilson
  • Publication number: 20110267086
    Abstract: A test circuit is described of a circuit integrated on wafer of the type comprising at least one antenna of the embedded type comprising at least one test antenna associated with said at least one embedded antenna that realizes its connection of the wireless loopback type creating a wireless channel for said at least one embedded antenna and allows its electric test, transforming an electromagnetic signal of communication between said at least one embedded antenna and said at least one test antenna into an electric signal that can be read by a test apparatus.
    Type: Application
    Filed: April 25, 2011
    Publication date: November 3, 2011
    Applicant: STMICROELECTRONICS S.R.L.
    Inventor: Alberto Pagani
  • Patent number: 8026736
    Abstract: A charged device model (CDM) electrostatic discharge (ESD) testing is carried out at wafer level. Wafer CDM pulses are repeatedly applied and monitored. The wafer CDM (WCDM) pulses are accomplished with a probe-mounted printed-circuit board and a high-frequency transformer that captures fast CDM pulses. Modeling of CDM and WCDM in the time and frequency domain illustrates the dominant effects, and shows that WCDM can reproduce all the major phenomena of package-level CDM testing.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: September 27, 2011
    Assignee: Intel Corporation
    Inventors: Timothy J. Maloney, Bruce Chou
  • Patent number: 8022718
    Abstract: A method of inspecting an electrostatic chuck (ESC) is provided. The ESC has a dielectric support surface for a semiconductor wafer. The dielectric support surface is scanned with a Kelvin probe to obtain a surface potential map. The surface potential map is compared with a reference Kelvin probe surface potential map to determine if the ESC passes inspection.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: September 20, 2011
    Assignee: Lam Research Corporation
    Inventors: Armen Avoyan, Hong Shih, John Daugherty
  • Patent number: 7990167
    Abstract: An apparatus for providing modulation mapping is disclosed. The apparatus includes a laser source, a motion mechanism providing relative motion between the laser beam and the DUT, signal collection mechanism, which include a photodetector and appropriate electronics for collecting modulated laser light reflected from the DUT, and a display mechanism for displaying a spatial modulation map which consists of the collected modulated laser light over a selected time period and a selected area of the IC.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: August 2, 2011
    Assignee: DCG Systems, Inc.
    Inventor: Steven Kasapi
  • Patent number: 7982479
    Abstract: The present invention relates to methods for inspection of defects in an electrophoretic display and related devices. The method may be carried out with one or more testing electrodes. The method comprises applying a voltage difference to two testing electrodes which are in contact with the display panel, or applying a voltage difference to a testing electrode and a electrode layer. The methods may be applied in in-line or off-line inspection of a display panel.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: July 19, 2011
    Assignee: SiPix Imaging, Inc.
    Inventors: Wanheng Wang, Yi-Shung Chaug, Yajuan Chen, Gary Yih-Ming Kang, Jimmy Yen
  • Patent number: 7982457
    Abstract: The present invention is a method and an eddy current system for non-contact determination of the resistance between the current lead stripe and the coating during continuous fabrication of chemical power sources such as batteries, supercapacitors, photovoltaic modules and the like. Both the method and the non-destructive test system for practicing the method are described. The method includes placing of an integrated measuring transducer containing two strap-type eddy current probes above the surface of the coating applied to the metallic current lead stripe in the region of the shaft guiding the stripe movement, so that all the points of the operating surface of the transducer being at an equal distance from the stripe surface coating so that the two probes would take measurements on the same area of the coating.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: July 19, 2011
    Assignee: Enerize Corporation
    Inventors: Volodymyr I. Redko, Volodymyr Khandetskyy, Elena M. Shembel, Oxana V. Redko, Peter Novak
  • Publication number: 20110163773
    Abstract: A measuring probe, particularly for a non-contacting vector network analysis system, having a housing and at least one coupling structure disposed on the housing and designed for coupling an HF signal from a signal line, such that at least one additional signal probe is disposed on the housing for coupling an electrical signal into the signal line.
    Type: Application
    Filed: June 23, 2009
    Publication date: July 7, 2011
    Applicant: ROSENBERGER HOCHFREQUENZTECHNIK GMBH & CO. KG
    Inventors: Thomas Zelder, Bernd Geck