Abstract: One embodiment of the present invention relates to a waveform generator that includes a first pair of capacitors, a second pair of capacitors, an op amp and control logic. The op amp has inputs and provides a differential triangular waveform at its outputs as an output signal. The control logic includes capacitor control logic, ramp control logic, reset control logic and charge control logic. The capacitor control logic connects a current pair of the first and second capacitors to the inputs of the op amp. The ramp control logic provides ramp currents to the current pair. The reset control logic resets capacitors of a next pair to selected voltage(s), such as zero. The charge control logic charges the next pair of capacitors, typically after the next pair of capacitors has been driven to the selected voltage(s).

Abstract: A clock generator with comparator error compensation includes an amplifier which develops an error voltage based on a difference between a sample voltage of a charge voltage and a predetermined reference voltage. The charge voltage develops a clock signal, such as a sawtooth waveform. A comparator compares the charge voltage with the error voltage to develop a compare signal. A sample and discharge control network is operative to develop the sample voltage in response to the compare signal, and then to switch between charging and discharging of the charge voltage. The amplifier develops the error voltage to ensure that the charge voltage switches at a level of the reference voltage to eliminate comparator errors, such as switching delay or input offset voltage. A second comparator and another amplifier may be provided to control switching in both directions, such as for developing a triangular waveform or the like.

Abstract: Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.

Abstract: The invention includes a method for transmitting and detecting high speed Ultra Wideband pulses across a wireless interface. The transmitter includes a serializer and pulse generator. The receiver comprises a fixed delay line, multiplier, local serializer (with a sequence matching the transmitter), digital delay lines, low noise amplifier and logic fan-out buffer along with an array of D flip-flop pairs. Each flip-flop pair is enabled, at fixed time increments, to detect signals at a precise time; the timing is controlled by the pseudo-random sequence generated by the local serializer. A local tunable oscillator is controlled by detecting the phase change of the incoming signal and applying compensation to maintain the phase alignment and clock synchronization of the receiver to the clock reference of the transmitter. The invention uses a pair of pulses with a fixed delay and then relies on mixing the two to provide better noise immunity.

Abstract: A method and apparatus to drive a load using a pulse-width modulated (PWM) signal and spread a spectrum of the PWM signal across a plurality of frequencies while maintaining a constant duty cycle for the load.

Abstract: New methods for generating through-zero pulse-width modulation are disclosed. In one approach, a periodic reference signal varies over time over at least one portion of the period. A pulse-width control signal varies linearly with time over at least one portion of the reference signal. The reference signal is compared with the pulse-width control value to produce a first pulse waveform. The value of a function of the control value is subtracted from the first pulse waveform to produce through-zero pulse-width modulation. In another approach, the difference in value between two ramp or sawtooth periodic waveforms is computed to produce a pulse waveform with a time-varying DC offset that varies linearly in time. The time-varying offset-term is retained with the pulse waveform, producing through-zero pulse-width modulation.

Abstract: System and method for generating one or more ramp signals. The method includes an oscillator configured to generate at least a clock signal, and a ramp signal generator configured to receive at least the clock signal and generate a first ramp signal. Additionally, the ramp signal generator is coupled to a first resistor including a first terminal and a second terminal. The first resistor is configured to receive an input voltage at the first terminal and is coupled to the ramp signal generator at the second terminal. Moreover, the first resistor is associated with a first resistance value. Also, the clock signal is associated with at least a predetermined frequency. The predetermined frequency does not change if the input voltage changes from a first magnitude to a second magnitude. The first magnitude is different from the second magnitude.

Abstract: A ramp signal generation circuit comprises a first input terminal that receives a clock signal, a plurality of second input terminals that receive high-level or low-level signals, and a discharge and charge circuit that discharges and charges the capacitor and that outputs a ramp signal corresponding to a voltage generated by the capacitor. The discharge and charge circuit comprises a discharge circuit that discharges the capacitor, and a charge circuit that is configured with a plurality of paired resistors and rectifying elements connected between the capacitor and the plurality of second input terminals. The discharge and charge circuit selects at least one of the plurality of second input terminals so as to change a current value for charging the capacitor by inputting the high-level signal to the selected one of the plurality of second input terminals.

Abstract: A triangular waveform generator includes a square waveform clock circuit and an integrating circuit. The integration circuit receives input from the square waveform clock circuit and generates a triangular waveform output. A feedback circuit is operatively connected to the integrating circuit to reduce the audio band noise content in the triangular waveform output. The feedback circuit acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.

Abstract: System and method for generating one or more ramp signals. The method includes an oscillator configured to generate at least a clock signal, and a ramp signal generator configured to receive at least the clock signal and generate a first ramp signal. Additionally, the ramp signal generator is coupled to a first resistor including a first terminal and a second terminal. The first resistor is configured to receive an input voltage at the first terminal and is coupled to the ramp signal generator at the second terminal. Moreover, the first resistor is associated with a first resistance value. Also, the clock signal is associated with at least a predetermined frequency. The predetermined frequency does not change if the input voltage changes from a first magnitude to a second magnitude. The first magnitude is different from the second magnitude.

Abstract: Systems and methods source a heating resistor to control temperature. For example, a sensor block assembly (SBA) heater controls the temperature of a MEMS device in a sensor block assembly. An exemplary embodiment generates a root mean square (RMS) pulse width modulation (PWM) control signal based upon an input voltage from a power source, controls a switch in accordance with the RMS PWM control signal; and sources a heater resistor from the power source in accordance with the controlling of the switch. Power to the heating resistor is controlled by the switch to provide a substantially constant value of power to the heating resistor for varying values of the input voltage.

Abstract: An electronic load for a semiconductor element is provided. The electronic load includes at least two slope generating circuits, each of which generates a current according to a current for the electronic load corresponding to an output voltage of a power supply. Each slope generating circuit comprises at least a first slope generating circuit that simulates a first slope when the output voltage of the power supply is between 0V to a rated voltage, and a second slope generating circuit that simulates a second slope when the output voltage of the power supply is higher than the conducting state voltage of the semiconductor element by subtracting the forward bias voltage from the output voltage of the power supply.

Abstract: Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.

Abstract: A sawtooth generator circuit comprises a first triangular waveform generator with equal ramp up and ramp down rates and a second triangular waveform generator with equal ramp up and ramp down rates and which are equal to the ramp up and ramp down rates of the first triangular waveform generator. The first and second triangular waveform generators are controlled to be 180 degrees out of phase. A switching arrangement alternately switches the increasing or decreasing ramps of the first and second triangular waveform generators to an output of the sawtooth generator circuit. The invention provides a sawtooth generator circuit which is suitable for high frequency applications, with low current consumption and low ground bounce. A very fast falling edge can be obtained.

Abstract: A circuit includes a level-crossing detector to generate a level-crossing detection signal when an input signal crosses a predetermined voltage level. A first stage set of capacitors is operatively coupled to the level-crossing detector. A ramp circuit is operatively coupled to the set of series-connected capacitors. A second stage set of capacitors is operatively coupled to the first stage set of capacitors and the ramp circuit. The ramp circuit includes a feedback capacitor and a preset switch to provide a linear ramp output.

Abstract: A charge-discharge circuit charges or discharges a capacitor having a fixed electric potential at one end. A first comparator compares an output voltage of the capacitor with a first threshold voltage and outputs a first comparison signal in accordance with a comparison result. An edge detecting circuit detects an edge of a synchronization signal input from the outside and having a frequency of about ½ of a triangular-wave signal generated by the triangular-wave generating circuit, and outputs an edge detection signal that will be at a predetermined level for each of the detected edges. A charge-discharge controller receives the first comparison signal that is output from the first comparator and the edge detection signal that is output from the edge detecting circuit, and switches between a charge state and a discharge state of the charge-discharge circuit in accordance with a level transition of these signals. A voltage of the capacitor is output as a triangular-wave signal.

Abstract: A temperature detecting apparatus includes a temperature detecting circuit configured to output a first pulse signal according to a temperature detected by a temperature sensor, and an insulating transformer configured to transmit the first pulse signal to an integrated circuit which is operated by an operation voltage different from that of the temperature detecting circuit. The insulating transformer is installed between the temperature detecting circuit and the integrated circuit. The temperature detecting circuit and the insulating transformer are mounted on a common substrate.

Abstract: A backlight controller for driving multiple light emitting diode (LED) strings includes feedback circuitry, phase array circuitry, and encoder circuitry. The feedback circuitry generates multiple feedback signals indicative of currents flowing through the LED strings respectively. The encoder circuitry generates a code signal indicative of a total number of operative LED strings among the multiple LED strings based on the feedback signals. The phase array circuitry generates multiple saw tooth signals according to the code signal. A phase shift amount between two adjacent signals of the saw tooth signals is determined by the total number of the operative LED strings. The phase array circuitry compares each of the saw tooth signals with a dimming control signal to generate multiple phase shift signals so as to respectively control the operative LED strings.

Abstract: In accordance with an embodiment, a modulator includes a comparator and ramp generating circuitry. A first comparison signal is generated in response to comparing a first input signal with a compensation signal. A second comparison signal is generated in response to comparing a second input signal with the compensation signal. A first latch signal is generated in response to the first comparison signal and a second latch signal is generated in response to the second comparison signal.

Abstract: An oscillator circuit increases and reduces signal levels of first and second oscillation signals in a complementary manner in response to a transition of a signal level of a reference clock. An oscillation control circuit compares each of the signal levels of the first and second oscillation signals to a comparison voltage, and causes the signal level of the reference clock to transition according to results of the comparison. A reference control circuit increases or reduces the comparison voltage so that a difference between a signal level of an intermediate signal which is proportional to respective swings of the first and second oscillation signals and a reference voltage is reduced.

Abstract: Provided is an analog-to-digital (A/D) converter that may be used in an image sensor and a ramp signal generator that is used in an A/D converter. The ramp signal generator may generate a ramp signal and a reference voltage signal that include noise that has same noise characteristics that are input into the ramp signal, such that the signal to noise ratio (SNR) is improved and the image quality is also improved.

Abstract: A triangular waveform generator includes a square waveform clock circuit and an active integrator. The active integrator receives input from the square waveform clock circuit and generates a triangular waveform output. An active feedback network is operatively added to the active integrator to reduce the audio band noise content in the triangular waveform output. The feedback network acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.

Abstract: A waveform generation circuit includes: a waveform generation block configured to generate a waveform signal corresponding to a driving control signal; and a control signal generation block configured to generate a driving control signal for compensating the waveform signal for an environmental factor reflected into the waveform generation circuit.

Abstract: An integrated circuit (IC) type voltage signal converter is provided for integrating with other ICs. The signal converter includes a first chopper circuit module, a second chopper circuit module, a full wave combining module, and a zero point detecting circuit module. Each of the circuit modules may be formed by an IC module. The first and second chopper circuit modules are composed of differential operational amplifiers for converting a high voltage signal into first and second low voltage half wave signals. The full wave combining module combines the first and second low voltage half wave signals to obtain a full wave signal. The zero point detecting circuit module converts the first and second low voltage half wave signals into a square wave having the same frequency of the high voltage signal.

Abstract: An apparatus is provided. The apparatus comprises a first current source and a second current source that charge and discharge a capacitor. Coupled between the capacitor and the second current source is a switch that can be actuated and deactuated by a controller. Preferably, the controller is coupled to the capacitor and receives a first threshold voltage and a second threshold voltage so that it can actuate the switch if the voltage across the capacitor is greater than the first threshold voltage and deactuate the switch if the voltage across the capacitor is less than the second threshold voltage. Additionally, there is a comparator that is coupled to the capacitor that compares the voltage across the capacitor to a reference voltage, and there is a a multiplexer that is coupled to the capacitor and that is coupled to the comparator.

Abstract: The frequency characteristic of a voltage-feedback class-D amplifier circuit for driving an output load is improved. A triangular-wave correction circuit which compensates a gradient of a triangular wave is provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal. In an area where a duty of a command value for an output circuit drive becomes about 50%, a slew rate (gradient) of the triangular wave is decreased.

Abstract: A high-voltage sawtooth current driving circuit and a memory device including the same are described. In the high-voltage sawtooth current driving circuit includes a charge pump circuit configured to output a first voltage, a regulating circuit configured to regulate a second voltage using the first voltage output from the charge pump circuit, and a sawtooth current driver configured to generate a sawtooth current in response to the second voltage regulated by the regulating circuit.

Abstract: A spread spectrum clock generator includes a triangular wave generator, a digital wave modulator, a sigma delta modulator, and a selector. The triangular wave generator transforms one of the input clock signals into an original triangular wave signal, in which the input clock signals have the same frequency and phases different from each other. The digital wave modulator adjusts the waveform of the original triangular wave signal to generate an adjusted triangular wave signal and a first square wave signal according to an inputted control signal. The sigma delta modulator, electrically connected to the digital wave modulator, accumulates magnitude values of the adjusted triangular wave signal to generate a second square wave signal. The selector selects one of the input clock signals as an output clock signal based on voltage levels of the first square wave signal and the second square wave signal.

Abstract: A spread spectrum clock generator includes a triangular wave generator, a digital wave modulator, a sigma delta modulator, and a selector. The triangular wave generator transforms one of the input clock signals into an original triangular wave signal, in which the input clock signals have the same frequency and phases different from each other. The digital wave modulator adjusts the waveform of the original triangular wave signal to generate an adjusted triangular wave signal and a first square wave signal according to an inputted control signal. The sigma delta modulator, electrically connected to the digital wave modulator, accumulates magnitude values of the adjusted triangular wave signal to generate a second square wave signal. The selector selects one of the input clock signals as an output clock signal based on voltage levels of the first square wave signal and the second square wave signal.

Abstract: System and method for generating one or more ramp signals. The method includes an oscillator configured to generate at least a clock signal, and a ramp signal generator configured to receive at least the clock signal and generate a first ramp signal. Additionally, the ramp signal generator is coupled to a first resistor including a first terminal and a second terminal. The first resistor is configured to receive an input voltage at the first terminal and is coupled to the ramp signal generator at the second terminal. Moreover, the first resistor is associated with a first resistance value. Also, the clock signal is associated with at least a predetermined frequency. The predetermined frequency does not change if the input voltage changes from a first magnitude to a second magnitude. The first magnitude is different from the second magnitude.

Abstract: A triangular waveform generator is converted to a free running oscillator controlled by a calibration code. The free running oscillator can be synchronized to an external clock signal by comparing the external clock frequency to the frequency of the triangular waveform and adjusting the calibration code until the discrepancy in frequency is minimized.

Abstract: A triangle wave generating circuit comprising: a pulse generating circuit configured to generate a plurality of pulse signals with the same period and with phases different from one another; and a plurality of charge/discharge circuits configured to be supplied with the plurality of pulse signals, respectively, the plurality of charge/discharge circuits each including: a current supply circuit configured to supply to a capacitor a first current for charging at a predetermined current value or a second current for discharging at a predetermined current value; and a charge/discharge control circuit configured to switch between the first current and the second current when the pulse signals are supplied thereto and when a voltage across the capacitor reaches a predetermined reference voltage, the first current and the second current supplied from the current supply circuit to the capacitor.

Abstract: An oscillator generates a triangular wave signal whose inclination for charging a capacitor and inclination for discharging the same are the same and which is used to turn on/off FETs Qp1 and Qn1. A signal generation part generates first drive signal in a period shorter than a half period of the triangular wave signal to drive the Qp1, and generates a second drive signal having a pulse width substantially equal to that of the first drive signal and a phase difference of about 180 degrees with respect to the first drive signal, to drive the Qn1 and provide a current to the discharge tube in a direction opposite to the current driven by the first drive signal. Furthermore a pulse current generation circuit converts a synchronization pulse voltage signal into a pulse current that alternates between positive and negative current values.

Abstract: A sawtooth generator adapted to produce a sawtooth voltage, a method of operating the same, and a power converter employing the sawtooth generator and method. In one embodiment, the sawtooth generator includes a current source, coupled to a clock with a clock frequency, configured to produce a reference current proportional to the clock frequency. The sawtooth generator also includes an active network including a switch and a capacitor coupled to the current source and configured to provide a sawtooth voltage with a waveform slope produced across the capacitor substantially proportional to the reference current.

Abstract: A triangular waveform generator includes a square waveform clock circuit and an active integrator. The active integrator receives input from the square waveform clock circuit and generates a triangular waveform output. An active feedback network is operatively added to the active integrator to reduce the audio band noise content in the triangular waveform output. The feedback network acts as a DC balance without significant sacrifice in the linearity of the triangular waveform output.

Abstract: A first comparator compares an output voltage Vout appearing at a capacitor with a maximum threshold voltage Vmax. A second comparator compares the output voltage Vout with a minimum threshold voltage Vmin. An edge detection circuit detects an edge of a synchronization signal SYNC having approximately ½ of frequency of the output voltage Vout and outputs an edge detection signal SE. A charge-discharge control unit refers to the first and the second comparison signal, and sets the charge-discharge circuit to a discharging state when the output voltage Vout becomes higher than the maximum threshold voltage Vmax and sets the charge-discharge circuit to a charging state when the output voltage Vout becomes lower than the minimum threshold voltage Vmin. When the edge signal SE becomes the predetermined level, the charge-discharge control unit switches the charging state and the discharging state of the charge-discharge circuit.

Abstract: An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node.

Abstract: This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops.

Abstract: A triangle waveform generator is set forth that comprises a capacitive element, a regulator, and a control circuit. The regulator is configured to charge the capacitive element in responsive to a first control signal and to discharge the capacitive element in response to a second control signal. The control circuit is responsive to a reference waveform to generate the first and second control signals. In one example, the control circuit generates the first and second control signals in response to the amplitude, frequency, phase, and symmetry of the reference waveform.

Abstract: A correlated double sampling circuit includes a first capacitor and a comparator. The first capacitor may be configured to receive a ramp signal via a first end. The comparator may be configured to receive the ramp signal and an output signal of a unit pixel circuit via a differential amplifier included in the comparator. The comparator may be also be configured to compare the output signal with the ramp signal and may be configured to directly receive the output signal of the unit pixel circuit at a first input terminal of the differential amplifier. A second input terminal of the differential amplifier is connected to a second end of the first capacitor.

Abstract: A plasma display apparatus and a method of driving the same are disclosed. The plasma display apparatus includes a plasma display panel including a scan electrode, and a scan driver that supplies a setup pulse to the scan electrode. The setup pulse gradually rises to a first voltage level with a first slope, rises from the first voltage level to a second voltage level with a second slope smaller than the first slope, and rises from the second voltage level to a third voltage level with a third slope different from the second slope.

Abstract: An integrated oscillator (10), for an integrated circuit, comprises i) first (CI1) and second (CI2) compensated inverters mounted in series and each comprising first (PI11;PI21) and second (PI12;PI22) plain inverters mounted in parallel and comprising transistors having channel lengths respectively shorter and longer than an optimal channel length, the first compensated inverter (CI1) having input and output terminals respectively connected to first (N1) and second (N2) nodes and the second compensated inverter (CI2) having input and output terminals respectively connected to the second node (N2) and to a third node (N3), ii) a resistor (R) having a chosen resistance value and comprising first and second terminals connected respectively to the first (N1) and second (N2) nodes, and iii) a capacitor (C) comprising first and second terminals connected respectively to the first (N1) and third (N3) nodes, and having a chosen capacitance value to charge and discharge oneself in order to periodically deliver a clock

Abstract: An oscillator includes a first comparator circuit, a second comparator circuit, an oscillation signal generator circuit, and a frequency voltage generator circuit. The first comparator circuit generates a first pulse when a frequency voltage reaches a first reference voltage, and the second comparator circuit generates a second pulse when the frequency voltage reaches a second reference voltage. The oscillation signal generator circuit generates an oscillation signal by latching a first voltage in response to the first pulse and latching a second voltage in response to the second pulse. The frequency voltage generator circuit raises or lowers the frequency voltage in response to the oscillation signal. The driving capability of the first comparator circuit is reduced at the latching of the first voltage and is restored at the latching of the second voltage.

Abstract: A circuit includes a pulse transformer having primary and secondary windings. An oscillating waveform is applied to the primary winding to induce an oscillating waveform at the secondary winding. A transistor in series with a first resistor is coupled between the secondary winding and the ground. An R-C network formed by a second and a third resistor and a capacitor is coupled to a base junction of the transistor. The R-C network causes a slow, tapered linear pinch off of the transistor's conductance to enable the circuit to output a triangular waveform, which is characterized by a relatively short linear rise time followed by a substantially long linear fall time. The R-C network is coupled to the secondary winding via a first and a second diode, respectively.

Abstract: An adjustable chaotic signal generator using pulse modulation for UWB communications, and a chaotic signal generating method thereof are provided. The chaotic signal generator for UWB communications includes a plurality of pulse generators which generates pulses of different frequencies; at least one combiner which combines the pulses generated at the pulse generators; and a plurality of local oscillators which receives signals from the combiner, respectively, and generates a chaotic signal by increasing the received signals to different frequency bands. Accordingly, a plurality of users can conduct the radio communications in a specific wireless communication range at the same time by generating the chaotic signal that can be split to the multiple channels. Also, the chaotic signal generator is structured using devices integratable on an integrated circuit.

Abstract: A first comparator compares an output voltage Vout appearing at a capacitor with a maximum threshold voltage Vmax. A second comparator compares the output voltage Vout with a minimum threshold voltage Vmin. An edge detection circuit detects an edge of a synchronization signal SYNC having approximately ½ of frequency of the output voltage Vout and outputs an edge detection signal SE. A charge-discharge control unit refers to the first and the second comparison signal, and sets the charge-discharge circuit to a discharging state when the output voltage Vout becomes higher than the maximum threshold voltage Vmax and sets the charge-discharge circuit to a charging state when the output voltage Vout becomes lower than the minimum threshold voltage Vmin. When the edge signal SE becomes the predetermined level, the charge-discharge control unit switches the charging state and the discharging state of the charge-discharge circuit.

Abstract: A ramp wave output circuit includes a ramp wave generation circuit generating a ramp wave, and a low-pass filter having a variable cutoff frequency, which receives the ramp wave. The low-pass filter operates at a first cutoff frequency for a predetermined time period after the receipt of the ramp wave, and at a second cutoff frequency, which is larger than the first cutoff frequency, after the predetermined time period has passed.

Abstract: The present invention provides a ramp generator capable of appropriately setting a rise starting point of an output voltage of a ramp waveform and an output voltage at the time of stable output. A current adjustment unit including a differential pair of transistors and an amplifier constitute a feedback circuit. By controlling the charging/discharging of an integration capacitor by ON/OFF of a discharge current source connected to a common emitter terminal of the current adjustment unit, an output of the ramp waveform outputted from an output terminal disposed at the connection end of the integration capacitor is controlled.

Abstract: A system for providing a plurality of synchronous timing signals having period values that are not even multiples of the clock period including a plurality of local edge generators receiving the clock signals, each local generator including local programmable means to record an absolute time at which to generate a timing signal in the current or future period and the means to generate that timing signal at a synchronous even sub-division of the clock period resolution. A separate time value is maintained allowing generated timing signals to be delayed by more than one period. An output delay circuit generates the timing signal responsive to a future time value and a phase offset. The phase offset can be provided using a clock multiplier and serial parallel converter to simplify hardware realizations.

Abstract: In a pulse generator, a sawtooth-shaped wave generator circuit generates a sawtooth-shaped wave by charging and discharging a capacitor. The sawtooth-shaped wave is fed to a comparator that performs pulse-width modulation on it in accordance with the voltage it receives via a terminal and thereby produces pulses. The comparator has its output grounded through a transistor that is turned on with appropriate timing by the sawtooth-shaped wave generator circuit. Thus, the maximum duty factor of the output pulses is made equal to the duty factor of the sawtooth-shaped wave.