Abstract: A drive device for driving a voltage-controlled semiconductor element. The drive device includes: a drive circuit connected to the gate of the semiconductor element via a gate resistor; a delay circuit connected to the drive circuit, for delaying a drive signal output from the drive circuit until a gate voltage of the semiconductor element enters a Miller effect period, which is a period during which the gate voltage transitionally changes, the gate voltage having temperature dependency on a chip temperature of the semiconductor element; a one-shot circuit connected to the delay circuit, for outputting a pulse signal with a pulse width shorter than the Miller effect period; a comparator that compares the gate voltage with a reference voltage; and an AND circuit that outputs an overheat detection signal in response to the gate voltage exceeding the reference voltage.

Abstract: A galvanically isolated gate driver for a power transistor is disclosed. The gate driver provides various temperature protection features that are enabled by (i) diagnostic circuitry to generate fault signals and monitoring signals, (ii) signal processing to enable communication over a shared communication channel across an isolation barrier, (iii) signal processing to reduce operating current needed for real-time thermal monitoring, and (iv) a disable circuit for unused temperature sensing pins.

Abstract: A timing alignment method for data acquired by monitoring units of a borehole-surface micro-seismic monitoring system includes acquiring two rock-burst waveform data segments with GPS timestamps; calculating a time difference and a number of sampling points between each pair of adjacent GPS timestamps; adding, on an equal-interval basis, a sampling time to a sampling point missing a timestamp between each pair of adjacent GPS timestamps; calculating average sampling frequencies of the two rock-burst waveform data segments, adding, on an equal-interval basis, a sampling time to a sampling point missing a timestamp except first and last GPS timestamps in each of the two data segments; obtaining sampling times of all sampling points, resampling the sampling times according to a uniform sampling frequency; calculating a rock-burst waveform data segment at a new sampling time with a linear interpolation formula, and aligning the sampling times of the two rock-burst waveform data segments.

Abstract: Methods and devices are provided for circuits. One device includes an adjustment circuit having an adjustable resistor for modifying a resistance value of a resistive device, the adjustment circuit connected to an adjustment terminal of the resistive device. The resistance value of the adjustable resistor changes, when a voltage or charge on the adjustment terminal of the adjustable resistor is changed. The adjustable resistor is a phase change element with an adjusting terminal to which different voltage values are applied for adjusting a conversion device threshold value.

Abstract: A compensation circuit receives a sensing signal from a Hall sensor and outputs a compensated Hall sensing signal. The compensation circuit has a gain that is inversely proportional to Hall sensor drift mobility. The compensated Hall sensing signal is temperature-compensated.

Abstract: Power semiconductor devices according to embodiments of the present technology may be operated to protect components of the semiconductor device. Methods for operation of the devices may include measuring a temperature within a source region of the semiconductor device. The methods may include measuring at the semiconductor device an amount of current associated with a short circuit external to the semiconductor device. The methods may include predicting a temperature effect within two regions of the semiconductor device based on a range of distribution of the amount of current between the two regions of the semiconductor device. The methods may include determining a particular distribution of the amount of current between the two regions of the semiconductor device. The methods may also include shutting off the semiconductor device to cause the particular distribution of current between the two regions of the semiconductor device.

Abstract: Across the entire operating temperature range, and without requiring a new transistor element, the constant voltage output by a constant voltage circuit can be controlled to a voltage greater than or equal to the stop-oscillating voltage and as low as possible. A resistance 11b that negatively feeds back a reference current Iref is connected between the gate and source of a depletion mode n-channel transistor 11a configured to produce the reference current Iref on which the constant voltage VREG is based. The resistance of resistance 11b has a gradient to temperature change of the same sign as the gradient of the difference between the constant voltage and the stop-oscillating voltage to temperature change when the gradient of the resistance value of the resistance to temperature change is 0.

Abstract: A unified antenna module includes an antenna, a first preamplifier configured to be connectable to an RF cable, and a second preamplifier configured to be connectable to a transmitter/receiver module. A switch part is configured to connect the antenna with the first preamplifier or the second preamplifier when one of the RF cable and the transmitter/receiver module is connected.

Abstract: Methods and systems are provided for generating an oscillating signal for use as a clock in digital logic timing. The oscillating signal is generated via a differential RC relaxation oscillator including an oscillator core and biasing circuitry. The oscillator core may be configured such that the oscillating signal it generates is substantially sinusoidal or pseudo-sinusoidal and contains less harmonic content relative to a square wave signal. The biasing circuitry may be configured to have a reduced dependence on temperature so that the biasing values it provides vary less with temperature.

Abstract: Apparatus and systems and articles of manufacture are disclosed to provide adaptive leakage compensation for powertrains. An example apparatus comprising a first current path including a first transistor and a second transistor; a second current path including a third transistor and a fourth transistor; and a current mirror including a fifth transistor and a sixth transistor, wherein a first ratio exists between the first transistor and the third transistor, a second ratio exists between the second transistor and the fourth transistor, and a third ratio exists between the fifth transistor and the sixth transistor, the third ratio greater than or equal to the second ratio, the second ratio greater than or equal to the first ratio.

Abstract: An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node, a phase controller that times even and odd phases, an input switch, and an output switch. The input switch electrically connects the mismatch reduction circuit input node to a first node of the pair of analog circuit input nodes during each even phase and to electrically connects the mismatch reduction circuit input node to a second node of the pair of analog circuit input nodes during each odd phase. The output switch electrically connects a first node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each even phase and electrically connects a second node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each odd phase.

Abstract: Provided herein may be a storage device and a method of operating the same. In a storage device for controlling operational performance depending on temperature, a memory controller configured to control a memory device may include an internal temperature sensing unit configured to generate an internal temperature information by sensing a temperature of the memory controller and a performance adjustment unit configured to receive an external temperature information from an external temperature sensing unit, and controlling operational performance of the memory controller using the internal temperature information and the external temperature information, wherein the external temperature information represents a temperature of the memory device.

Abstract: To provide a driving device for semiconductor elements that is capable of suppressing variation in switching time caused by driving capability and temperature. A driving device for semiconductor elements includes: a semiconductor chip in which a voltage control type semiconductor element is formed; a temperature detecting unit configured to detect temperature of the semiconductor chip; a driving-capability adjusting unit configured to adjust driving capability of the voltage control type semiconductor element according to temperature detection values detected by the temperature detecting unit; and a timing adjusting unit configured to adjust switching time of the voltage control type semiconductor element according to the temperature detection values detected by the temperature detecting unit.

Abstract: A thermal sensor circuit comprises a conversion circuit which is one of a buck DC-DC converter circuit and a boost DC-DC converter circuit, wherein the conversion circuit comprises an inductor and an output terminal. A thermal sensor senses a thermal variation correlated to a capacitance variation of the thermal sensor. The capacitance variation induces an internal parasitic capacitance variation of the inductor which is connected in parallel to the thermal sensor and results a variation of an energy stored in the inductor. Hence a variation of a converted circuit signal outputting by the output terminal is caused, wherein the variation of the converted circuit signal is correlated to the thermal variation.

Abstract: A technique for sensing an environmental parameter is disclosed. The technique generates an oscillating signal using a variable resistance sensitive to a variable parameter. A frequency of the oscillating signal is directly dependent on the variable resistance. A time-to-digital converter generates a digital code indicative of the variable resistance. The digital code is generated based on the frequency of the oscillating signal and a second frequency of a reference clock signal. The second frequency is insensitive to the variable parameter. The variable resistance may be a metal resistor and the reference resistance may be generated using a capacitor that is switched at a particular frequency. The measured resistance may be used to control a voltage-controlled oscillator. The oscillating signal frequency may be converted to a digital signal and post-processed for use as an indicator of absolute temperature or other environmental parameter.

Abstract: An apparatus and method for continuously monitoring substation disconnects and transmission line switches to detect improper closing of the disconnects or switches is disclosed. The method includes the step of providing an apparatus adapted to measure, process, and transmit data associated with a disconnect or switch. The method further includes the steps of positioning the apparatus on or in close proximity to the disconnect or switch, using the apparatus to collect data of the disconnect or switch and processing the data for transmission to a remote receiver, and transmitting the processed data to a remote receiver.

Abstract: Subject matter disclosed herein may relate to programmable current for correlated electron switches.

Abstract: An exemplary embodiment of a method illustrates a gain control method executed in a wireless signal receiver. The gain control method has the following steps. A wideband channel is continuously monitored to check whether an interference signal exists in a wireless signal. When the interference signal exists in the wireless signal, an interference received signal strength indicator is obtained. A front end gain of the wireless signal receiver is controlled according to the interference received signal strength indicator. When the interference signal exists in the wireless signal, the wireless signal receiver is prohibited from using a maximum front end gain.

Abstract: Systems and methods are provided for generating accurate current ratios from a current mirror including an array of output transistor and a corresponding array of switches. Each switch couples in series with its corresponding output transistor. A control logic circuit controls the switches to cancel mismatches for the output transistors.

Abstract: The present invention relates to a gate driving circuit, a switch control circuit including the gate driving circuit, and a power supply. The gate driving circuit generates a gate voltage of the power switch. The gate driving circuit includes: a delay control circuit generating a first control signal that controls a rising slope of the gate voltage at a first time after a first delay period is passed from a rising time of the gate voltage and generating a second control signal that controls the rising slope of the gate voltage at a time after a second delay period is passed from the first time; and a temperature compensation circuit that varies the first delay period according to a temperature.

Abstract: A processing circuit has an input terminal to which an input signal generated by an input signal generator is inputted via an input line. An external capacitor is connected to the input line in parallel with the processing circuit. The processing circuit includes a pulse circuit, at least one switch, a controller, a detector and a determiner. The pulse circuit generates a pulsed voltage having at least one pulse. The least one switch is provided between the pulse circuit and the input line. The controller controls the at least one switch so as to apply the pulsed voltage to the input line via a resistor. The detector detects a change in a voltage of the input line caused by application of the pulsed voltage to the input line. The determiner determines whether the processing circuit is in a normal or abnormal condition based on the change detected by the detector.

Abstract: An apparatus and a method for exponentially controlling a gain of a driver amplifier to drive a power amplifier are provided. The driver amplifier includes a plurality of cascode amplifier segments, wherein when a plurality of candidate gain values of the driver amplifier is arranged, the candidate gain values form a geometric sequence. A unit cost can be reduced by halving an area occupied by the driver amplifier.

Abstract: An electronic device includes a semiconductor structure. A first temperature sensor is located at a hot spot of the semiconductor structure and a second temperature sensor is located at a cold spot of the semiconductor structure. A control block is configured to control current flow through the semiconductor structure. For example, the control block is configured to cut off the current flow through the semiconductor structure when a temperature at the hot spot exceeds a first predefined threshold or when a temperature difference between the temperature at the hot spot and a temperature at the cold spot exceeds a second predefined threshold.

Abstract: A thermal controller for driving a gate control unit of a gate-driven semiconductor switching device, the thermal controller comprising a junction temperature estimation module for generating an estimated junction temperature for the switching device, a gate voltage control module for modifying a gate voltage of the switching device, a switching frequency control module for modifying a switching frequency of the switching device, and a duty cycle control module for modifying the duty cycle of the switching device. In use, the thermal controller is adapted to activate one of the gate voltage control module, switching frequency control module and duty cycle control module dependent upon the estimated junction temperature in order to maintain the actual junction temperature below a pre-determined limit.

Abstract: The invention provides a temperature detecting apparatus, a switch capacitor apparatus and a voltage integrating circuit. The voltage integrating circuit includes an operating amplifier, a capacitor and a current source. The operating amplifier has a positive input end, a negative input end and an output end. The output end of the operating amplifier generates an output voltage, and the positive input end receives a reference voltage. The capacitor is coupled between the output end and the negative input end of the operating amplifier. The current source is coupled to the output end of the operating amplifier. The current source draws a replica current from the capacitor, and a current level of the replica current is determined according to a current level of a current flowing to the negative input end of the operating amplifier.

Abstract: An integrated circuit chip includes a first input port, a first output port, and first and second transistors electrically coupled in series across the first input port. The second transistor is also electrically coupled across the first output port and is adapted to provide a path for current flowing through the first output port when the first transistor is in its non-conductive state. The integrated circuit chip additionally includes first driver circuitry for driving gates of the first and second transistors to cause the transistors to switch between their conductive and non-conductive states. The integrated circuit chip further includes first controller circuitry for controlling the first driver circuitry such that the first and second transistors switch between their conductive and non-conductive states to at least substantially maximize an amount of electric power extracted from an electric power source electrically coupled to the first input port.

Abstract: A switching system for a combustion engine ignition system comprises a switching device switchable between an accumulation condition and a transfer condition to activate an ignition element. The switching system comprises control logic that provides a control signal for controlling the switching device, measures a progress indicator indicative of progress in switching the switching device from the transfer condition to the accumulation condition, and causes the control signal to vary with a first variation rate during a first stage until the progress indicator reaches a first progress condition. The control logic causes the control signal to vary with a second variation rate, lower than the first variation rate, during a second stage until the progress indicator reaches a second progress condition, and causes the control signal to vary with a third variation rate, higher than the second variation rate, during a third stage of the preliminary switching.

Abstract: A control voltage is generated at a control input of a semiconductor circuit breaker by an actuation circuit at switching flanks of a switching signal, said control voltage having a profile which is flattened in relation to the profile of the switching signal. With the disclosed method, the switching losses in a semiconductor circuit breaker are reduced. By defining a value for a switching parameter of a control device of the actuation circuit, the switching behavior of the actuation circuit can be influenced by the switching parameter. A specific parameter value of the switching parameter can be varied during operation of the actuation circuit.

Abstract: Temperature dependent biasing for leakage power reduction. In some embodiments, a semiconductor device may include a biasing circuit configured to generate a voltage that varies dependent upon a temperature of the semiconductor device and a logic circuit operably coupled to the biasing circuit, where the voltage is applied to a bulk terminal of one or more transistors within the logic circuit, and where the voltage has a value outside of a voltage supply range of the logic circuit. In another embodiment, a semiconductor device may include a biasing circuit configured to generate a voltage that varies according to a temperature of the semiconductor device and a power switch operably coupled to the biasing circuit, where the voltage is applied to a gate terminal of the power switch, and where the voltage has a value outside of a voltage supply range of the power switch.

Abstract: A circuit having a centralized PT compensation circuit to provide compensation signals to localized I/O blocks on the chip. Process variations and temperature variations tend to be approximately uniform across an integrated circuit chip. Thus, a single, centralized PT compensation circuit may be used instead of one PT compensation circuit per I/O section as with solutions of the past. Further, the PT compensation circuit may generate a digital code indicative of the effects of process and temperature. Further yet, each section of I/O block may have a local voltage compensation circuit to compensate the voltage variation of the I/O block. The voltage compensation circuit utilizes an independent reference voltage. The reference voltage is generated by the PT compensation circuit, which is placed centrally in the IC chip and hence any need to repeat the reference generation for each I/O block is eliminated.

Abstract: A method includes obtaining a standard value for a characteristic of a power switch and obtaining a measured value of the characteristic, via a gate drive unit connected to a gate terminal of the power switch. The method also includes determining a health state of the power switch by comparing the measured value to the standard value of the characteristic.

Abstract: A method for reducing thermal cycling of a semiconductor power switch includes obtaining a value indicative of a junction temperature of the power switch. The method also includes selecting one of several pre-determined gate drive voltages, based on the obtained value, and providing the selected gate drive voltage to a gate of the power switch. This reduces thermal cycling of a power switch relative to the thermal cycling that would be present during operation at a single gate voltage.

Abstract: The impedance of the elements of a capacitor array in the transmitter is kept substantially constant over changes in process, temperature, and supply voltage. The impedance is maintained substantially constant by compensating a gate voltage supplied to switches in each element of the capacitor array to adjust for changes in temperature and supply voltage to thereby maintain a substantially constant RC product for each unit element in the capacitor array and thereby improve the quality factor of the capacitor array.

Abstract: The present invention relates to a gate driving circuit, a switch control circuit including the gate driving circuit, and a power supply. The gate driving circuit generates a gate voltage of the power switch. The gate driving circuit includes: a delay control circuit generating a first control signal that controls a rising slope of the gate voltage at a first time after a first delay period is passed from a rising time of the gate voltage and generating a second control signal that controls the rising slope of the gate voltage at a time after a second delay period is passed from the first time; and a temperature compensation circuit that varies the first delay period according to a temperature.

Abstract: An adaptive gate drive circuit that can generate a gate bias voltage with temperature compensation for a MOSFET is disclosed. The adaptive gate drive circuit may generate the gate bias voltage with variable drive capability to combat higher gate leakage current of the MOSFET at higher temperature. In one design, an apparatus includes a control circuit and a gate drive circuit. The control circuit generates at least one control signal having a variable frequency determined based on a sensed temperature of the MOSFET. For example, a clock divider ratio may be determined based on the sensed temperature of the MOSFET, an input clock signal may be divided based on the clock divider ratio to obtain a variable clock signal, and the control signal(s) may be generated based on the variable clock signal. The gate drive circuit generates a bias voltage for the MOSFET based on the control signal(s).

Abstract: A multi-terminal output with a common mode connection includes an output having a first terminal and a second terminal and having a common mode connection between the first terminal and the second terminal. A bulk connection of a transistor is coupled to the common mode connection. A first set of control signals and a second set of control signals are generated. Each of the first set of control signals has a first rail voltage level associated with a first power domain. The second set of control signals is generated from the first set of control signals. Each of the second set of control signals has a second rail voltage level that is associated with a second power domain. The second power domain is associated with a common mode voltage of outputs of an output driver.

Abstract: A temperature data coding unit 100 increases the data resolution in a high temperature range and reduces the data resolution in a low temperature range, and makes the data length of the temperature data a fixed length. When carrying out numerical estimation of the fixed length code value in terms of a 2's complement numerical code value, the temperature data coding unit 100 generates coded data that increases with an increase of the pre-coded temperature data in terms of the 2's complement numerical code value.

Abstract: An apparatus for monitoring timing of a plurality of critical paths of a functional circuit includes a plurality of canary circuits, each configured to be coupled to a critical path of a functional circuit for detecting and outputting critical timing events. Each canary circuit includes an adjustable delay element and an analyzer circuit for receiving a count of the critical timing event output from at least one of the plurality of canary circuits for a predetermined time interval for a plurality of delay values of the adjustable delay elements and for determining a probability distribution of critical timing events of the at least one of the plurality of critical paths for the predetermined time interval for the plurality of delay values.

Abstract: Systems and methods are provided for reducing jitter due to power supply noise in an integrated circuit by drawing additional current. The additional current causes the total current to generally have a frequency higher than a resonant frequency of the integrated circuit and/or a power distribution network of the integrated circuit. In one example, a power distribution network may supply power to components of an integrated circuit and data driver circuitry may draw first current to drive a data signal. Compensation circuitry may draw second current at times when the data driver circuitry is not drawing the first current, thereby causing a net of the first and second current to be higher than a resonant frequency range of the integrated circuit device and/or a component of the integrated circuit device (e.g., the power distribution network).

Abstract: A thermal controller for driving a gate control unit of a gate-driven semiconductor switching device, the thermal controller comprising a junction temperature estimation module for generating an estimated junction temperature for the switching device, a gate voltage control module for modifying a gate voltage of the switching device, a switching frequency control module for modifying a switching frequency of the switching device, and a duty cycle control module for modifying the duty cycle of the switching device. In use, the thermal controller is adapted to activate one of the gate voltage control module, switching frequency control module and duty cycle control module dependent upon the estimated junction temperature in order to maintain the actual junction temperature below a pre-determined limit.

Abstract: A semiconductor element including an MISFET exhibits diode characteristics in a reverse direction through an epitaxial channel layer. The semiconductor element includes: a silicon carbide semiconductor substrate of a first conductivity type, semiconductor layer of the first conductivity type, body region of a second conductivity type, source region of the first conductivity type, epitaxial channel layer in contact with the body region, source electrode, gate insulating film, gate electrode and drain electrode. If the voltage applied to the gate electrode is smaller than a threshold voltage, the semiconductor element functions as a diode wherein current flows from the source electrode to the drain electrode through the epitaxial channel layer. The absolute value of the turn-on voltage of this diode is smaller than the turn-on voltage of a body diode that is formed of the body region and the first silicon carbide semiconductor layer.

Abstract: A control voltage is generated at a control input of a semiconductor circuit breaker by an actuation circuit at switching flanks of a switching signal, said control voltage having a profile which is flattened in relation to the profile of the switching signal. With the disclosed method, the switching losses in a semiconductor circuit breaker are reduced. By defining a value for a switching parameter of a control device of the actuation circuit, the switching behavior of the actuation circuit can be influenced by the switching parameter. A specific parameter value of the switching parameter can be varied during operation of the actuation circuit.

Abstract: Apparatus and methods disclosed herein implement a MOS resistor using the current channel of a MOS transistor. The MOS resistance R(DS) is dependent upon MOS transistor geometry and nominal gate voltage. MOS resistor terminal-to-gate voltages are averaged and applied to the MOS transistor gate such as to maintain the MOS resistor terminal voltage to current ratio, resulting in a substantially constant R(DS). R(DS) is also compensated for temperature and process variations by adjusting gate voltages via negative feedback methods.

Abstract: An apparatus and method for charging a battery includes a battery to be charged, a power delivery path configured for delivering power to the battery, and an integrated switching battery charger configured for charging a battery by delivering output power to the battery via the power delivery path based on input power from an input power source. The integrated switching battery charger includes an output voltage regulation loop and an input voltage regulation loop, both of which are configured to control the output current flowing out of the integrated switching battery charger to the battery. The input or output voltage regulation loops are further enhanced by adding a current source which is proportional to absolute temperature from the regulated voltage to the control voltage for the purpose of either regulating peak power from the source or to maximize energy storage in the battery as a function of temperature.

Abstract: The switch control device controls a switching operation of a power switch. The switch control device includes an auxiliary power device. The auxiliary power device includes a parasitic capacitor, and charges the parasitic capacitor by receiving a power voltage to generate an auxiliary power voltage. The switch control device includes a control pulse generator driven by the auxiliary power voltage and generating a set pulse and a reset pulse according to an input signal that is input for controlling the switching operation of the power switch. The switch control device generates a gate signal that turns on the power switch by being synchronized with the set pulse and generates a gate signal that turns off the power switch by being synchronized with the reset pulse.

Abstract: AFE circuitry handles both voltage and current input signals. In one embodiment, both a voltage path and a current path are provided from the input. Switching circuitry selects one of the paths. A switch also turns on or off a current-to-voltage conversion circuit used to convert a current input into a voltage. In one embodiment, noise is significantly reduced by using a dedicated ground pin or terminal for the negative reference of a differential circuit. This applies the same external board noise, which is on the input signal, to the negative reference, so the noise is canceled in the differential signal. In one embodiment, temperature compensation is provided via an IPTAT circuit which is used to shift the voltage up in order to balance the decrease in DC voltage with increasing temperature.

Abstract: A power gating circuit includes a first current switch, a second current switch, and a switching controller. The first current switch is connected between a power rail and a circuit block operated by an operating supply voltage, and provides a first current when turned on. The second current switch is connected between the power rail and circuit block, and provides a second current larger than the first current when turned on. The switching controller turns on first current switch when transitioned from a sleep mode to an active mode to change the operating supply voltage using the first current, generates a reference voltage based on the operating supply voltage that changes more slowly than the operating supply voltage, and turns on the second current switch based on the reference voltage to provide the second current to the circuit block.

Abstract: Representative implementations of devices and techniques provide heating for a semiconductor device. A heating element is arranged to be located proximate to the semiconductor device and to increase a temperature of at least a portion of the semiconductor device during operation of the semiconductor device.

Abstract: Aspects of the invention include a constant current source that generates a constant current, apart from a constant current circuit, and a temperature detection zener diode (a temperature detection element). The input side of the constant current source can be connected to a power source. The output side of the constant current source can be connected to the anode of the temperature detection diode. The anode of the temperature detection zener diode can also be connected to one end of a resistor provided in the constant current circuit. Further, the cathode of the temperature detection zener diode can be connected to a GND. Further, the temperature detection zener diode can be incorporated in the same semiconductor substrate as a semiconductor substrate into which an IGBT is built.

Abstract: Provided herein may be a storage device and a method of operating the same. In a storage device for controlling operational performance depending on temperature, a memory controller configured to control a memory device may include an internal temperature sensing unit configured to generate an internal temperature information by sensing a temperature of the memory controller and a performance adjustment unit configured to receive an external temperature information from an external temperature sensing unit, and controlling operational performance of the memory controller using the internal temperature information and the external temperature information, wherein the external temperature information represents a temperature of the memory device.