Abstract: Methods and apparatuses are discussed for generating a temperature compensated signal, used for example to provide a signal with a delay within a pre-specified range over a range of temperatures to a sense amplifier of a memory array. In response to a start signal, a varying signal is generated. A clock signal causes additional loads of impedance to be coupled to the varying signal, for example via control circuitry generating temperature compensating signals.

Abstract: In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a unity gain detector to traverse a gain curve of an output buffer circuit to determine unity gain voltages associated with unity gain crossover points on an input voltage ramp. The apparatus further includes a pre-boost circuit to apply the unity gain voltages to at least one input/output buffer within the output buffer circuit.

Abstract: A delay circuit includes a constant current source, a delay stage, and a compensating circuit. The delay circuit may compensate for a variation in a delay characteristic of the delay stage due to a variation in temperature, supply voltage and/or process.

Abstract: A reference voltage generator uses a conventional forward junction voltage generating device and a conventional thermal generator to generate a thermal voltage. The forward junction voltage and the thermal voltages have respective thermal sensitivities that act oppositely to each other so that, when the forward junction voltage is combined with the thermal voltage to produce a reference voltage, the reference voltage is substantially insensitive to temperature. The forward junction voltage and the thermal voltage are combined to produce the reference voltage in a manner that avoids generating any voltage having a magnitude that is greater than the magnitude of the sum of the forward voltage and the thermal voltage.

Abstract: A device for monitoring at least two electromagnetic valves of an internal combustion engine in a motor vehicle. An actual current that is independent of the other valves may be supplied to each valve. A setpoint current is preselected for each valve. Measuring devices are provided for measuring the actual currents supplied to the valves. A control unit is used to add the measured actual currents to yield a total actual current. Due to the control unit, the setpoint currents are added to yield a total setpoint current and compared to the total actual current. This comparison is used by the control unit for monitoring the valves and/or their interconnections.

Abstract: Using the leakage current of the base resistance of the bipolar transistor, semiconductor integrated circuit device which detects an overheat condition of the elements protected from overheat, is realized. The overheat detection circuit and the elements or the circuits which might be protected from overheat, are formed on the same substrate. The said overheat detection circuit is comprised of a bipolar transistor, its base resistance, and a constant-voltage source. The constant-voltage source provides a certain voltage to isolate the elements. The joint base resistance is located close to elements or circuits which might be protected from overheat and located far from the constant-voltage source.

Abstract: A method of reducing package stress includes placing matched components of an op-amp substantially in a region of a die having the least stress gradients. The region is located in the center of the die. Further, the center is the common centroid of the die. The matched components are the current mirror input stages of the op-amp. In one embodiment, a semiconductor configuration includes a die having a region with the least stress gradients, and an op-amp containing matched components that are located substantially in the region.

Abstract: One aspect of the present disclosure is a control device responsive to control signals for electrically coupling an input node configured for connection to a low impedance source to an output node configured for connection to a transmission line. The control device includes a first controlled impedance device having a pair of controlled nodes connected between the input node and the output node. The first controlled impedance device has a control node for controlling impedance values between the controlled nodes. Also included is a closed loop control circuit connected to the control node of the first controlled impedance device for varying impedance between the controlled nodes continuously over a range of impedance values based on parameters sensed by a parameter sense device. The closed loop control circuit maintains a constant relationship between an output impedance of the control device and transmission line impedance.

Abstract: The invention relates to a power switch arrangement having a semiconductor power switch connected by its load path serially in a load circuit, and a clamping circuit, which is connected between a control electrode terminal and a load-side electrode terminal of the semiconductor power switch. Upon the turn-off of the semiconductor power switch, a clamping voltage is set across the load path thereof. The power switch arrangement additionally has a temperature estimator, which supplies an estimated value corresponding to an instantaneous peak temperature of the semiconductor power switch that occurs directly after the turn-off instant of the semiconductor power switch.

Abstract: Electronic switch (1) with two switching states (ON, OFF) possesses at least one field effect switching transistor (Q1), input port (In) connected with source terminal (S), on which input signal (Vin) is present, output port (Out) connected with drain terminal, on which switched signal (Vout) is present, control port (Con) connected to gate terminal (G), on which is present signal (Vc) for controlling electronic switch (1) and switch apparatus (Sw), which creates the two switching states (ON, OFF) by means of a changing of control signal (Vc). Controlling signal (Vc), during at least one of the two switching states (ON, OFF) is, at least partially, formed by correction signal (Sc), which in turn is produced from input signal (Vin), so that the frequency dependent drop in voltage between the drain-source channel and the gate electrode of the field effect switching transistor (Q1) is at least partially compensated.

Abstract: A new transistor structure with thermal protection is provided. A type of the new transistor structure of the present invention includes a main depletion-mode NMOSFET and a control PMOSFET, with the drain terminal of the control PMOSFET connected to the gate terminal of the main NMOSFET and the gate terminal of the control PMOSFET connected to a thermal protection unit. The two-MOSFET structure as a whole emulates a normal NMOSFET. The source terminal of the control PMOSFET that's not connected to the gate terminal of the main NMOSFET acts as the gate terminal of the new transistor structure, and the drain and source terminals of the new transistor structure are the drain and source terminals of the main NMOSFET. The thermal protection unit prevents thermal failures of the MOSFETs of the new transistor structure by sensing heat, terminating current through and switching the two MOSFETs.

Abstract: A semiconductor integrated circuit comprises a digital-to-analogue converter for converting a digital signal into an analogue signal to output an analogue current signal, a current-to-voltage converter for converting the analogue current signal output by the digital-to-analogue converter, into an analogue voltage signal whose level has been controlled, and a filter for filtering the analogue voltage signal converted by the current-to-voltage converter. The current-to-voltage converter converts the current signal into the voltage signal in which a factor variable in accordance with manufacturing process conditions and/or environmental conditions has been corrected.

Abstract: A delay compensation circuit that determines the effects of process, voltage, and temperature (PVT) conditions of a chip by measuring the effective delay time of delay components inside the chip. The delay compensation circuit includes a plurality of sampler modules, each of which receives a delayed clock signal from one of a series of delay cells within a tapped delay circuit. The delay compensation circuit generates an output value based on the total number of sampling modules that lock into a fixed input signal using the delayed clock signals. Since the delay time of each delay cell changes based on variations of PVT conditions, the output values generated by the delay compensation circuit are determinate of PVT conditions in the chip. These output values can be used to design components to compensate for variances in PVT conditions or to control a variable delay component based on detected PVT conditions.

Abstract: An exemplary compensation circuit includes: a temperature compensation circuit which provides as an output a temperature compensation signal indicative of temperature variations; a supply compensation circuit which provides as an output a supply compensation signal indicative of supply voltage variations; and a compensation conversion circuit coupled to the temperature compensation circuit and the supply compensation circuit to provide as an output a bias signal from the temperature compensation signal and the supply compensation signal. The supply compensation circuit includes a voltage divider circuit coupled to a supply compensation node, to a source voltage, and to a sink voltage, where the supply compensation node is coupled to an input of the compensation conversion circuit. The source voltage provides a supply voltage, and the supply compensation signal is indicative of variations in the supply voltage.

Abstract: In order to achieve an optimally stable synchronization of clock signals, a temperature-controlled delay device with which it is possible to generate a signal delay that is dependent on operating temperature is provided in a synchronization device for a semiconductor memory device. In this manner, the clock signal can be time-tuned in a particular reliable fashion.

Abstract: A buffer circuit with slow output edges is described. Pulsed higher value currents are driven from one shot timing circuits to inject a pulse of current into the control gate of the buffer's output MOSFET to speed up the beginning of the turning on or the turning off of the output MOSFT. When the beginning and turning on and off is reached lower value current sources continue to drive the gate of the output MOSFET. In one embodiment, one shots are triggered from the rising and falling edges of the input signal. The effect of the higher value current pulses is to reduce the circuit delay through the buffer. Also, the pulse width can be designed as temperature sensitive, and supply voltage sensitive so as to maintain the buffer circuit delay as substantially constant as temperature, supply voltage and process variation occur.

Abstract: System and methods are provided for monitoring circuit performance and correcting for variations in current reference signals to maintain a desired Voltage Output Differential (VOD) between the two differential output signals. A voltage signal associated with VOD is compared to a signal that is set to a desired voltage level based on a desired VOD. By determining whether the VOD level is higher or lower than the desired level, adjustments are made to at least one of an output current source level and an output current sink level. An increase in the source and sink currents at the output results in an increased VOD, while a balance decrease in the source and sink currents results in a decreased VOD.

Abstract: A variable-gain BiCMOS transconductance amplifier (VGA). An NMOS differential pair amplifier with bipolar cascoding provides continuous gain control by adjustment of drain-source voltage to shift the NMOS differential pair from a saturation region operation and high gain to a triode operation and low gain. A simple control circuit is used in order to generate the desired exponential gain to linear control voltage characteristic that is stable over temperature and process. The shift from saturation to triode operation of the input NMOS differential pair simultaneously increases the input linearity as the gain is reduced.

Abstract: A temperature controlled high voltage regulator for automatically adjusting the high voltage applied to a radiation detector is described. The regulator is a solid state device that is independent of the attached radiation detector, enabling the regulator to be used by various models of radiation detectors, such as gas flow proportional radiation detectors.

Abstract: A signal-level compensating system consists of a voltage-follower stage, a sensor and a output signal compensator. The voltage-follower stage includes a signal input for receiving an input signal, a signal output, and at least one transistor coupled between the signal input and the signal output for providing an output signal responsive to the input signal. The sensor provides a control signal indicative of variations in at least one of the power supply voltage and transistor characteristics of the transistor. The output signal compensator is coupled to the signal output and provides a compensator output signal responsive to the control signal for reducing the impact of the variations on the voltage-follower output signal.

Abstract: A single external impedance element is used to perform multiple circuit compensation. A reference impedance code is first generated from a master circuit, and then the reference impedance code is shifted to generate a slave impedance code. The slave impedance code is provided to one or more slave circuits to activate devices in the slave circuit(s). Impedance-generation devices coupled to the slave circuit are then activated one at a time until their generated impedance corresponds to the impedance generated by the slave circuit. The reference impedance code can be incremented or decremented (e.g., shifted) to generate slave impedance codes corresponding to different impedance values, according to impedance requirements of various different circuits that require compensation.

Abstract: What is involved is a transconductance circuit is discussed, having at least one transconductance subcircuit (100) that is connected between two supply terminals (20, 21) and includes at least one MOS transistor (M1, M1′). It comprises means (200) for biasing the MOS transistor (M1, M1′) in the subcircuit (100) with a biasing current whose variation as a function of temperature substantially compensates for that of the mobility of the majority carriers in the channel of the MOS transistor (M1, M1′) in the subcircuit (100), in such a way as to make the transconductance of the circuit substantially independent of temperature.

Abstract: Edge rates for output driver transistors are increased for slower conditions such as caused by supply-voltage, temperature, and process variations. The edge rates are increased by increasing charging and discharging currents to the gates of the driver transistors. Process-sensing transistors have gates tied to power or ground. Current through the process-sensing transistors changes with supply-voltage, temperature, and process variations. The currents through process-sensing transistors are used to generate process-compensated voltages that bias current sources and sinks to adjust process-dependent currents. Process-independent or fixed current sources and sinks use process-independent reference voltages ultimately generated from reference currents that are not sensitive to process variations. The process-dependent-currents are subtracted from the fixed currents to produce the charging and discharging currents.

Abstract: An integrated circuit voltage regulator compensates for temperature variations by adjusting a gain of an amplifier. In one embodiment, the gain is controlled by a voltage divider circuit comprised of a first resistor having a first temperature coefficient, and a second resistor having a second temperature coefficient which is different from the first coefficient. In one embodiment, the first resistor is a p-channel transistor and the second resistance is fabricated from integrated circuit active area.

Abstract: A constant-voltage generation circuit 100 creates a constant voltage. This constant-voltage generation circuit 100 comprises a first voltage creation circuit 110 for creating a reference voltage and a second voltage creation circuit 130 for creating the constant voltage which has a predetermined relationship with the reference voltage. The first voltage creation circuit 110 comprises a first constant-current source 150-1 for supplying a constant current and a first voltage-control transistor 112, through which this constant current flows, for outputting the reference voltage on the basis of a predetermined potential. The constant current is set to a value within the saturated operating region of the first voltage control transistor 112.

Abstract: Using the leakage current of the base resistance of the bipolar transistor, semiconductor integrated circuit device which detects an overheat condition of the elements protected from overheat, is realized. The overheat detection circuit and the elements or the circuits which might be protected from overheat, are formed on the same substrate. The said overheat detection circuit is comprised of a bipolar transistor, its base resistance, and a constant-voltage source. The constant-voltage source provides a certain voltage to isolate the elements. The joint base resistance is located close to elements or circuits which might be protected from overheat and located far from the constant-voltage source.

Abstract: A temperature sensor circuit includes a temperature detecting circuit, a preset value storing circuit, and a current supplying circuit. The temperature detecting circuit is configured to generate a first temperature voltage in accordance with an ambient temperature and a current. The preset value storing circuit stores a second temperature voltage preset for a predetermined ambient temperature as a digital value. The current supplying circuit supplies the current to the temperature detecting circuit. The current supplying circuit supplies the current such that the first temperature voltage generated by the temperature detecting circuit at the predetermined ambient temperature is equal to the second temperature voltage.

Abstract: A power MOS transistor having a PMT chip located in a transistor housing in which the temperature of the transistor barrier junction is monitored is described. Protection of the PMT chip against overload and permanent damage is guaranteed without negatively affecting its switching function in that a protective circuit is provided in the transistor housing which directly measures the temperature of the transistor barrier junction using a temperature measuring element, and when a predefined or predefinable limit barrier junction temperature is reached reduces the drain current and thus the power loss of the PMT chip, the temperature measuring element being integrated in the PMT chip or accommodated in the transistor housing together with the protective circuit as an additional chip.

Abstract: Majority voting between triple redundant integrated circuits is used in order to provide an SEU hardened output signal. Accordingly, an input signal is processed in a predetermined manner to provide a first signal, the input signal is processed in the same manner to provide a second signal, and the input signal is also processed in the same manner to provide a third signal. A majority vote is taken between the first, second, and third signals by an SEU immune majority voter circuit, and an output signal is provided corresponding to the majority vote.

Abstract: The invention relates to a method for temperature compensation in an electric circuit. In order to get rid of costly manufacturing processes and external components, a PTAT resistor is replaced by a series connection of two resistive elements (Rx, 31), the first of said elements (Rx) having essentially constant resistance regardless of the temperature, and the second element (31) having a resistance which is non-linearly dependent on the temperature. The resistance value of the first element is selected so that an approximation of the resistance of said series connection is directly proportional to the temperature.

Abstract: An electronic driver circuitry for an RF switch diode D1 used in Acoustic Ink Jet Printing (AIP) systems that compensates and cancels out undesired variations and non-idealities is disclosed. The electronic driver circuitry consists of a second RF switch diode D2 used as a compensation diode that is placed in close physical proximity to the RF switch diode D1 used for RF switching. To compensate for undesirable variations in the RF switch diode D1, the driver circuitry is designed such that the current in the RF switch diode D2 is adjusted in an opposite direction to cancel the unwanted variations of the RF switch diode D1.

Abstract: An output driver of a semiconductor integrated circuit having low power consumption and reduced layout area transmits internally generated data of the circuit to pads responsive to clock signals, and is controlled by control signals indicative of changes of process, voltage, and temperature. The output driver includes a data selector, an output driver enabler, a first driver that transmits an output of the output driver enabler to the pads, and a second driver that includes a data delay having a plurality of inverters connected in series to an output of the output driver enabler and being activated responsive to the control signals. The second driver transmits an output of the data delay to the pads. The output driver reduces a load on the clock signal line, so that power consumption and a layout area can be reduced.

Abstract: The present invention provides a semiconductor switching circuit and a semiconductor device using the switching circuit that can maintain sufficient isolation characteristics even when dealing with high frequency signals. The semiconductor switching circuit includes a first semiconductor switching element connected between a first terminal and a second terminal, a second semiconductor switching element, one end of the second switching element being connected to one of the first and second terminals, and an open stub connected to the other end of the second switching element.

Abstract: A single external impedance element is used to perform multiple circuit compensation. A reference impedance code is first generated from a master circuit, and then the reference impedance code is shifted to generate a slave impedance code. The slave impedance code is provided to one or more slave circuits to activate devices in the slave circuit(s). Impedance-generation devices coupled to the slave circuit are then activated one at a time until their generated impedance corresponds to the impedance generated by the slave circuit. The reference impedance code can be incremented or decremented (e.g., shifted) to generate slave impedance codes corresponding to different impedance values, according to impedance requirements of various different circuits that require compensation.

Abstract: A charge pump having a phase-generator circuit generating phase signals and an oscillator circuit supplying a clock signal, a current-limitation circuit to limit the current flowing in the oscillator circuit, and a control circuit supplying on an output a control signal supplied to the current-limitation circuit. The control circuit has a first current mirror connected to a ground line, a second current mirror connected to a supply line, a cascode structure arranged between the first and the second current mirrors and connected to the output of the control circuit to compensate the effects on the control signal caused by sharp relative variations between the potential of the supply line and the potential of the ground line, and a compensation circuit to compensate the effects on the control signal caused by sharp relative variations between the potential of the supply line and the potential of the ground line and by slow variations in temperature.

Abstract: Current mirror circuits that are parts of a first circuit and a second circuit, respectively, allow the same constant current to flow through the input side and the output side. Therefore, the base-emitter voltages of transistors Tr1 and Tr4, which tend to vary due to a temperature variation, can be set identical and hence can cancel out each other sufficiently. The same is true of the base-emitter voltages of transistors Tr5 and Tr8. Therefore, an input signal can be converted by a function having reference voltages as change points without being affected by temperature. Desired function circuits can be obtained by combining first circuits and second circuits in various manners.

Abstract: To reduce errors and decrease loss, the detecting range of current is enlarged and the current is independently detectable. A rectified voltage and a rectified current are supplied from an input terminal. Resistors 1 and 2 are serially connected between the input and output terminals. A load is connected to the output terminal. Between an emitter and collector of the transistor are resistor 1 and a constant current detecting circuit 5. The transistor base is connected to a control circuit that controls the transistor switching operations. The constant current detecting circuit 5 detects current from the voltage across resistor 1. A current detecting circuit 6 detects current from the voltage across resistor 2. A signal is supplied to the control circuit when the constant current detecting circuit 5 detects small current. The control circuit supplies a signal to the transistor base that increases transistor impedance.

Abstract: An air delivery unit for an endoscope includes a pressure-sensor, a voltage descent processor, an amplifier, and an electric power supplier. A closed-space is formed in the air delivery unit. The air delivery unit adjusts a pressure in the closed-space by measuring the pressure and then discharging air in the closed-space.

Abstract: A configuration for protecting an integrated circuit against over-temperature conditions is described. The configuration has at least one detector device, which identifies a disturbance situation of the integrated circuit, at least one temperature sensor, which detects the temperature of at least one part of the integrated circuit, and a logic device. The logic device ascertains a disturbance mode in dependence a detected disturbance situation and/or the detected temperature and which allocates a first temperature switching stage to the temperature sensor in the normal mode and allocates a second, lower temperature switching stage to the temperature sensor in the disturbance mode. Furthermore, the invention relates to an integrated circuit having such a configuration and also to a method for protecting an integrated circuit against over-temperature conditions.

Abstract: A single external impedance element is used to perform multiple circuit compensation. A reference impedance code is first generated from a master circuit, and then the reference impedance code is provided (as a slave impedance code) to one or more slave circuits to activate devices in the slave circuit(s). Impedance-generation devices coupled to the slave circuit are then activated one at a time until their generated impedance corresponds to the impedance generated by the slave circuit. The reference impedance code can be incremented or decremented (e.g., shifted) to generate slave impedance codes corresponding to different impedance values, according to impedance requirements of various different circuits that require compensation. Using the single external impedance element for compensation of multiple circuits reduces motherboard and packaging costs.

Abstract: A circuit configured to match an impedance of a first pin and a second pin coupled to a transmission line. A first resistor is generally coupled to the first pin and a second resistor is generally coupled to the second pin. The first and second resistors may be coupled to a common node to provide an output voltage level independent of process corner and temperature variation.

Abstract: An integrated circuit voltage regulator compensates for temperature variations by adjusting a gain of an amplifier. In one embodiment, the gain is controlled by a voltage divider circuit comprised of a first resistor having a first temperature coefficient, and a second resistor having a second temperature coefficient which is different from the first coefficient. In one embodiment, the first resistor is a p-channel transistor and the second resistance is fabricated from integrated circuit active area.

Abstract: A technique for compensating a characteristic, such as a resistance, of at least one circuit includes selectively incrementing a characteristic of a dummy circuit and comparing it with a characteristic of an external reference to generate a reference code. A previous reference code is stored and subsequently compared with a present reference code. It is ensured that the present reference code differs by no more than a predetermined amount from the stored previous reference code by ceasing the incrementing or decrementing of the characteristic of the dummy circuit and utilizing the present reference code to compensate the characteristic of the at least one circuit.

Abstract: A single external impedance element is used to perform multiple circuit compensation. A reference impedance code is first generated from a master circuit, and then the reference impedance code is provided (as a slave impedance code) to one or more slave circuits to activate devices in the slave circuit(s). Impedance-generation devices coupled to the slave circuit are then activated one at a time until their generated impedance corresponds to the impedance generated by the slave circuit. The reference impedance code can be incremented or decremented (e.g., shifted) to generate slave impedance codes corresponding to different impedance values, according to impedance requirements of various different circuits that require compensation. Using the single external impedance element for compensation of multiple circuits reduces motherboard and packaging costs.

Abstract: Process voltage temperature compensation are used for a bus driver; specifically, a PCI-X 2.0 DDR Standard bus driver. Performance is improved by enhancing the speed of the PCI-X buffer by removing the statically controlled gate stages and providing for output signal slew control by dual use of on-resistance of signal pass transistors. Although directed to PCI-X technology, this circuitry may also be used in SCCI, controlled impedance drivers, and other buffers, where short propagation delay and signal integrity are of concern.

Abstract: The difference between the Vgs voltages of first and second MOS transistors of an integrated circuit due to variations in the production process and/or to variations of other parameters is compensated by a compensation circuit. The compensation circuit includes third and fourth MOS transistors that are the same type as the first and second transistors. These transistors are all formed in the same integrated circuit. The compensation circuit includes a bias circuit for biasing the third and fourth transistors, and a measurement circuit for measuring the difference between the Vgs voltages of the third and fourth transistors. The compensation circuit further includes a current compensation circuit for generating a compensation current that is a function of the difference measured, and a modification circuit for modifying the biasing of the first and second MOS transistor using the compensation current.

Abstract: A universal zero voltage transition switching cell using a small choke, a pair of switches, and a capacitor is revealed. The application of the universal zero voltage transition switching cell to any of a wide variety of hard switching pulse width modulated power converter topologies yields identical power converters with zero voltage switching properties, without the requirement that the magnetizing current in the main power choke be reversed during each switching cycle. In the subject invention the energy required to drive the critical zero voltage switching transition is provided by the small choke that forms part of the universal zero voltage transition switching cell. The application of the universal zero voltage transition switching cell to buck, boost, buck boost, Cuk, Wittenbreder, flyback, forward, and SEPIC converters is shown.

Abstract: A bias circuit (200, FIG. 2) includes a first bipolar junction transistor (BJT) (240), which provides, to an external transistor (204), a biasing voltage (294) equal to the first BJT's base-emitter junction voltage plus a biasing voltage at the first BJT's base (244). A current multiplying mirror circuit (250) senses a fraction of the first BJT's collector current, and produces a current equal to the collector current. This mirror current flows through a second BJT (230). A voltage at the collector (232) of the second BJT is divided, producing the biasing voltage at the base (244) of the first BJT. This biasing voltage has a temperature coefficient with an opposite sign and a same magnitude as a temperature coefficient of the first BJT's base-emitter junction voltage, resulting in a near zero temperature coefficient for the biasing voltage (294).

Abstract: Driver circuitry (300) is disclosed, incorporating feedback circuitry (310) inter-coupled with reference circuitry (348) to equalize the voltage level of an output (328) with a reference voltage source (320) in the reference circuitry; where the driver circuitry comprises a first transistor (340) having a first terminal coupled to a voltage source (342), a second terminal coupled to an input (336), and a third terminal coupled to a resistor (344), a second transistor (338) having a first terminal coupled to ground (332), a second terminal coupled to an input (334), and a third terminal coupled to a resistor (346), a third transistor (318) having a first terminal coupled to the output, a second terminal (326) coupled jointly to the resistors, and a third terminal coupled to ground, and a resistor (330) coupling the output to a voltage source (306).

Abstract: Apparatus, specifically a circuit (100, 200), for a highly accurate, low cost temperature sensor, particularly one using silicon thermometry and which can be implemented by an application specific integrated circuit, that also possesses a high degree of linearity and a wide dynamic range. The inventive circuit advantageously utilizes either a mixed-signal approach or a digital core and provides independent adjustment, through two point calibration, of slope and ambient output offset values, with a zero offset adjustment advantageously accomplished through use of a digital tear. Specifically, given the inherent linearity of silicon thermometry, zero offset and desired output voltage are set, independently of each other, at a first predefined ambient calibration temperature as effectively two separate offset values, while slope (span) is set at a second predefined calibration temperature (typically a full scale temperature) different from the first temperature.