Field-effect Transistor Patents (Class 327/424)
  • Patent number: 6236246
    Abstract: A voltage boost circuit for a write driver includes first and second semiconductor devices, such as Schottky diodes, coupled to respective first and second nodes to conduct write current through respective first or second current switches of the write driver when a forward voltage across the respective first or second semiconductor device exceeds a design voltage. The first and second current switches are responsive to respective complementary first and second input signals to direct write current in opposite directions through the winding between the first and second nodes. First and second storage devices are connected to the respective first and second semiconductor devices, and first and second buffers are responsive to a first state of the respective first and second input signals to operate the respective first or second storage device to increase the forward voltage across the respective first or second semiconductor device.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: May 22, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: John D. Leighton, Tuan V. Ngo
  • Patent number: 6198335
    Abstract: A circuit and method to drive an H-bridge circuit are disclosed. The H-bridge circuit uses NMOS transistors for both the upper and lower sets of transistors. An inductive head is coupled between the terminals of the transistors. When a logic signal is received, one of the upper transistors is driven. The upper transistor selected to be driven is responsive to the logic signal. A corresponding lower transistor is also driven, forcing current through the inductive head in a first direction. The driving circuit for the lower transistors includes a programmable circuit structured to capacitively couple the output of the driving circuit to a pull-up voltage, thereby allowing the amount of current forced through the inductive head to be maximized for optimum data transfer. Within the programmable voltage boost circuit are several logic gates, each coupled to a capacitor of differing value.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: March 6, 2001
    Assignee: STMicroelectronics, Inc.
    Inventor: Elango Pakriswamy
  • Patent number: 6198315
    Abstract: A current detection circuit having a voltage conversion section for converting current flowing to a load to a voltage; an amplifier section having an operational amplifier for amplifying the voltage converted by the voltage conversion section; a constant current circuit section having a constant current circuit connected to an input of the operational amplifier; and a current detection section for detecting a load current from a voltage amplified by the amplifier section. The constant current circuit section shifts the input offset voltage to the operational amplifier of the amplifier section. As a result, a dead zone in which a load current cannot be detected due to the input offset voltage of the operational amplifier can be eliminated.
    Type: Grant
    Filed: May 18, 1999
    Date of Patent: March 6, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshiya Nakano
  • Patent number: 6194951
    Abstract: A voltage UA that can be measured at a junction point between a load and a limit switch when the load is disconnected is compared with a predetermined threshold value W. The limit switch is turned on and off with a predetermined current associated with shallow turn-on and turn-off edges when UA<W, or is turned on and off with a higher current associated with steep turn-on and turn-off edges when UA>W.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: February 27, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventor: Franz Allmeier
  • Patent number: 6147545
    Abstract: A bridge circuit uses active feedback to control drive phase turn on to substantially eliminate shoot-through current. Voltage sensor 66 senses H-bridge transistor voltage turn off levels and causes control circuit 64 to latch which causes enable circuit 62 to allow the next phase of H-bridge transistor turn on. A critical aspect of the invention is to ensure all H-bridge transistors are off before the enable circuit allows the next phase to turn any H-bridge transistors on.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: November 14, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Andrew Marshall
  • Patent number: 6124751
    Abstract: An H-bridge circuit having a boost capacitor coupled to the gate of the low-side driver. A driver, in the form of a switching transistor is connected between the load and ground, thus providing a low-side driver. A capacitor is coupled to the gate of the low-side driver to provide a boosted voltage for rapid turn on of the gate. The size of the capacitor selected to be similar to the size of the capacitance associated with the low-side driver transistor.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: September 26, 2000
    Assignee: STMicroelectronics, Inc.
    Inventor: Albino Pidutti
  • Patent number: 6052017
    Abstract: A method and apparatus, for applying a current to a coil of a write head assembly of a disk drive, or the like, to cause the flux within the coil to rapidly reverse, has an H-bridge having two pair of two switchable transistors. Each pair of the transistors is connected between a supply voltage and a reference potential, and is adapted to be connected to the coil between the two transistors of each pair. The two transistors of the first pair may be connected to receive a control signal to turn on complementary transistors of the first and second pair of transistors to selectively control current flow in the coil in first or second directions. A reference current source supplies a reference current, and one of the transistors in each of the first and second pairs of transistors is connected when turned on to mirror the reference current to control the currents in the coil.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: April 18, 2000
    Assignee: STMicroelectronics, Inc.
    Inventors: Albino Pidutti, Axel Alegre de La Soujeole, Elango Pakriswamy
  • Patent number: 6040734
    Abstract: A circuit for switching between supply voltages and in particular for non-volatile flash memory devices and of the type comprising a first and a second circuit branch each incorporating a pair of transistors connected in series provides that at least one branch of the circuit be structured with a bridge circuit made up of P-channel MOS transistors. The bridge is made of a first and a second pairs of transistors connected between a first supply voltage reference and a common node. The first pair comprises transistors bigger than the transistors of the second pair while between the transistors making up the second pair is inserted a pair of resistors. Between the pair of resistors there is an interconnection node connected to a corresponding interconnection node between the transistors of the first pair.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: March 21, 2000
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Corrado Villa, Luigi Bettini, Simone Bartoli
  • Patent number: 5966042
    Abstract: A current output circuit comprises a current driver that is switchably connected across two output nodes by a switching assembly and having a switchable shunt resistor connected across the current driver. The switchable shunt resistor may be switched between a non-conducting state and a resistive conducting state. In a first data state, the current driver is connected to the output nodes by the switching assembly and the switchable shunt resistor is non-conducting so that the supplied current will flow through a load attached to the output nodes. In a second data state, the current driver is disconnected from the output nodes and the switchable shunt resistor is in a resistive conducting state. In this state the current bypasses the load and is diverted through the switchable shunt resistor. Several current drivers with appropriate switching arrangements and one or more switchable shunt resistors may be provided to allow for asymmetric current outputs in various data states.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: October 12, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Wayne E. Werner, Thaddeus John Gabara, Bijit Thakorbhai Patel
  • Patent number: 5939931
    Abstract: A driving circuit has first and second output terminals for connection with a load, for supplying the load with a constant voltage changing in polarity at predetermined timing, through the output terminals. A bridge circuit has first and second output nodes connected, respectively, to the first and second output terminals. A selector circuit selectively drives a plurality of current changeover switching elements of the bridge circuit. First and second differential amplifier circuits have first input terminals supplied with a predetermined reference voltage and second input terminals connected, respectively, to the first and second output nodes, and a common output terminal. A switching circuit selectively connects the first and second differential amplifier circuits to a power source in response to selective driving of the current changeover switching elements by the selector circuit.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: August 17, 1999
    Assignee: Yamaha Corporation
    Inventor: Masao Noro
  • Patent number: 5896057
    Abstract: A troubleshooting circuit for locating malfunctions while driving an electric load by means of a bridge stage (M1, M2, M3, M4) which is connected between ground (GND) and the power supply (+VCC) in series with first and second resistors (Rsl, Rsh), respectively. First (COMP1) and second (COMP2) threshold comparators are coupled to the first resistor to sense a short-circuit to battery (+VCC) and an open-load condition, respectively. Coupled to the second resistor is a third threshold comparator (COMP3) adapted to sense a short-circuit to ground. The output signals from the comparators are sampled through flip-flops (FF1, FF2, FF3, FF4, FF5, FF6) upon a transistor in the bridge being switched to the off state.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: April 20, 1999
    Assignee: SGS-THOMSON Microelectronics S.r.l.
    Inventors: Stefania Chicca, Vanni Poletto, Marco Morelli
  • Patent number: 5886563
    Abstract: A half-bridge circuit where the transistors comprising the half-bridge are electronically interlocked--precluding cross-conduction; and high-side voltage generation and logic level translation are integral to the interlock mechanism.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: March 23, 1999
    Inventor: Mikko J. Nasila
  • Patent number: 5834965
    Abstract: An "H" type amplifier circuit uses at least two current mirrors for alternately feeding current into the load in one direction and the other direction. In order to accelerate the turn-on of the current mirrors, a capacitance is associated with each of the two current mirrors. Each capacitance is alternately coupled in parallel with the input of its associated current mirror when this current mirror delivers current, and is coupled to the supply voltage terminals when this current mirror delivers no current. The operation is effected by means of a set of switches.
    Type: Grant
    Filed: December 4, 1996
    Date of Patent: November 10, 1998
    Assignee: U.S. Philips Corporation
    Inventor: Patrick LeClerc
  • Patent number: 5818282
    Abstract: A field relaxation region of the second conductivity type is formed between the base region and a drain electrode contact portion at which the drain region contacts with a drain electrode but distanced from both the base region and the drain electrode contact portion and the field relaxation region is also separated via the drain region from the laterally extending portion of the semiconductor isolation region to form a drain current channel region between the field relaxation region and the laterally extending portion of the semiconductor isolation region and further the field relaxation region is electrically connected via an interconnection to the source region and the vertically extending portion of the semiconductor isolation region so that the field relaxation region and the semiconductor isolation region have the same potential as the source region whereby if the lateral MOS field effect transistor is reverse-biased by a voltage, then a first space charge region is formed which extend from a first p-n
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: October 6, 1998
    Assignee: NEC Corporation
    Inventor: Wataru Sumida