Lowpass Patents (Class 327/558)
  • Patent number: 5825238
    Abstract: The present invention comprises an active shunt filter for filtering a power supply for noise sensitive devices. The active shunt filter includes a transistor and an op amp. A first resistor is coupled between the emitter of the transistor and a first power supply. A second resistor is coupled between the collector of the transistor and a ground. A third resistor is coupled between the base of the transistor and the output of the op amp. The output of the op amp controls the impedance of the transistor. The op amp is coupled to receive power from a second power supply. The negative input of the op amp is coupled to the emitter. The positive input of the op amp is coupled to the first power supply via a fourth resistor. A fifth resistor couples the positive input of the op amp to ground. A capacitor is also coupled between the positive input of the op amp and ground.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: October 20, 1998
    Assignee: Silicon Graphics, Inc.
    Inventors: Michael K. Poimboeuf, Jeff DiNapoli, Gerald L. Brainard
  • Patent number: 5760642
    Abstract: A filter circuit using junction capacitors of semiconductors of the present invention prevents the distortion of signal waveforms and is not affected by parasitic capacitors. The filter circuit includes a resistor whose first terminal is connected to an input terminal and whose second terminal is connected to an output terminal. A first junction capacitor is connected between a control voltage supply terminal and an output terminal and a second junction capacitor is connected between the output terminal and ground. An alternate embodiment of the filter circuit includes a pnp transistor, whose emitter is connected to the direct current power supply via a resistor, whose collector is grounded, and whose base is connected to the output terminal.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: June 2, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshiro Yada
  • Patent number: 5751184
    Abstract: A low electric power consumption filter circuit includes an amplifying portion including an odd number of serial MOS inverters. A grounded capacitance is connected between an output of the amplifying portion and ground. A pair of balancing resistances connect an output of the MOS inverter to a supply voltage and ground at a previous stage of the last MOS inverter. A feedback impedance connects an output of the amplifying portion to its input. An input impedance is connected to the input of the amplifying portion.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: May 12, 1998
    Assignees: Yozan Inc., Sharp Kabushiki Kaisha
    Inventors: Guoliang Shou, Makoto Yamamoto, Sunao Takatori
  • Patent number: 5751185
    Abstract: The present invention relates to a filter circuit which is suitable for use in an integrated circuit formed of transistors or field effect transistors, and controls the frequency band of the amplifying circuit used for the signal receiver, for example, within an optical communications system. The filter circuit includes a first transistor (T1) having a base or gate grounded with high-frequency component via a first resistor (R1); and a second resistor (R2) and a capacitor (C1) each having one end connected to the emitter or source of the first transistor (T1) and the other terminal grounded with high-frequency component. The filter circuit acts as a circuit in which the first transistor (T1) inputs the current (Iin) at a juncture at which the second resistor (R2) and the capacitor (C1) are connected therewith and outputs its collector or drain current (Iout).
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: May 12, 1998
    Assignee: Fujitsu Limited
    Inventors: Takuji Yamamoto, Naoki Kuwata
  • Patent number: 5731736
    Abstract: A voltage bias generating circuit is disclosed which comprises a voltage-controlled charge pump which operates at a high frequency relative to audio frequencies wherein a plurality of low pass filters are used to prevent the introduction of noise and distortion of audio signals being amplified through a digital potentiometer or resistor array.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: March 24, 1998
    Assignee: Dallas Semiconductor
    Inventor: Richard William Ezell
  • Patent number: 5729170
    Abstract: An input buffer circuit for a frequency divider includes a bias circuit including a first group of diodes connected in series and to a power supply voltage terminal, at least first and second resistors connected in series to each other at a first junction, the first resistor being connected in series with the first plurality of diodes, and a second plurality of diodes connected in series, the second plurality of diodes being connected between the second resistor and a ground; an input signal terminal for receiving an input signal from a frequency divider; a reference input terminal for receiving a reference signal; an output signal terminal; a reference output terminal connected to the reference input terminal; an amplitude limiting circuit connected to and between the output signal terminal and the reference output terminal; third and fourth resistors connected in series to each other at a second junction, the third resistor being connected to the output signal terminal and the fourth resistor being connecte
    Type: Grant
    Filed: December 9, 1992
    Date of Patent: March 17, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kazuya Yamamoto
  • Patent number: 5708389
    Abstract: An integrated circuit employing quantized feedback is capable of compensating for decay in capacitively-coupled digital signals. In an exemplary embodiment, the integrated circuit includes a quantized feedback receiver connected to a capacitively-coupled integrated circuit input. The capacitively-coupled input produces a decaying signal for corresponding intervals of an input digital signal that are substantially DC voltages. Longer sequences of consecutive data bits of the same logic state in the input signal are represented by a corresponding longer DC voltage signals resulting in a greater decay in the capacitively-coupled signal. The receiver operates by generating a complementary feedback signal which is combined with the capacitively-coupled signal. The feedback signal is generated with a magnitude rate of change that compensates for the decay in the capacitively-coupled signal such that the digital information in the combined signal can be detected substantially without error due to the decay.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: January 13, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: Thaddeus John Gabara
  • Patent number: 5701098
    Abstract: An integrated circuit includes a semiconductor die and electronic circuitry elements formed therein. First and second internal power supply lines transmit first and second supply voltages to provide power for the circuitry elements. The die includes bypass circuitry to inhibit variations in the supply voltages. The bypass circuitry includes transconductance circuitry, characterized by a variable conductivity, having a first flow electrode coupled to the first supply line, a second flow electrode coupled to the second supply line, and a control electrode for controlling current flow between the flow electrodes. The conductivity of the transconductance circuitry varies in response to a voltage difference between the control electrode and the second flow electrode. Voltage amplifier circuitry has a first input terminal coupled to the first supply line and a second input terminal coupled to the second supply line.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: December 23, 1997
    Assignee: National Semiconductor Corporation
    Inventor: Pak-Ho Yeung
  • Patent number: 5694077
    Abstract: A reduced phase-shift nonlinear filter includes linear filter logic 10 responsive to a filter input signal x and having a linear transfer function G(s), which provides a linear filtered signal g, zero-cross sample-and-hold logic 16 responsive to the filter input signal x and the linear filtered signal g, which provides a square wave signal n which crosses zero at the same time and in the same direction as the filter input signal x and has an amplitude proportional to the value of the linear filtered signal g at that time, complementary filter logic 20 responsive to said square wave signal n and having a complementary transfer function (1-G(s)) which provides a complementary filtered signal c, and a summer 30 which adds the complementary filtered signal and the linear filtered signal to provide a filter output signal y which exhibits less phase shift over certain frequency bands than that of the linear transfer function.
    Type: Grant
    Filed: June 26, 1996
    Date of Patent: December 2, 1997
    Assignee: United Technologies Corporation
    Inventor: James W. Fuller
  • Patent number: 5694088
    Abstract: A phase locked loop including an in-phase detector (IPD), a quadrature phase detector (QPD), a frequency detector (FD), a squelch, a filter, and a voltage controlled oscillator (VCO). The in-phase detector has an IPD sample input, an IPD input, and an IPD output, where the IPD sample input is coupled to a data input. The quadrature phase detector has a QPD sample input, a QPD input, and a QPD output, where the QPD sample input is coupled to the data input. The frequency detector has a first FD input coupled to the IPD output, a second FD input coupled to the QPD output, and a FD output. The squelch has a squelch input, an enable input, and a squelch output where the squelch input is coupled to the IPD output and the squelch enable is coupled to the FD output. The filter has a filter input coupled to the squelch output and a filter output. The voltage controlled oscillator has a VCO input coupled to the filter output, a VCO in-phase output, and a VCO quadrature output.
    Type: Grant
    Filed: July 8, 1996
    Date of Patent: December 2, 1997
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Andrew H. Dickson
  • Patent number: 5686861
    Abstract: A filter circuit that consumes very little electric power. The active filter is a linear inverter constructed by 1) an inverting amplifying portion composed of an odd number of MOS inverters serially connected, 2) a grounded capacitance connected between an output of the inverting amplifying portion and ground, 3) a balancing resistance having a pair of resistances for connecting an output of one of the MOS inverters, other than the last MOS inverter, to the supply voltage and the ground, respectively, and 4) a feedback impedance for connecting the output and input of the inverting amplifying portion. A coupling capacitance is connected to the input of the linear inverter and a plurality of filter circuits are connected to an input of the coupling capacitance.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: November 11, 1997
    Assignees: Yozan Inc., Sharp Kabushiki Kaisha
    Inventors: Guoliang Shou, Sunao Takatori, Makoto Yamamoto
  • Patent number: 5684428
    Abstract: A sensor apparatus is capable of removing RF noise. The sensor apparatus is comprised of a first power supply line connected to a power supply terminal; a second power supply line separately branched from the first power supply line and connected thereto; an output line; and a sensor circuit unit connected to the first power supply line so as to receive power therefrom, and for detecting a condition of an article under measurement to output a detection signal to the output line. In this sensor apparatus, the sensor circuit unit includes an operational amplifier operated by accepting the power supplied from the second power supply line, which performs the detection operation; a first filter circuit is connected to the first power supply line defined from a branch point between the first power supply line and the second power supply line to the first power supply line; a second filter circuit is connected to the second power supply line; and a third filter circuit is connected to the output line.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: November 4, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hiroshi Nomura, Kazuhisa Ikeda
  • Patent number: 5680072
    Abstract: A differential, interpolating, switched capacitor filter and method of operation in which non-interpolating stages of the filter are clocked at a first frequency and a subsequent interpolating stage of the filter is operated at double the first frequency to achieve improved smoothing of the output wave form. The switched capacitors in the interpolating stage which feed forward a differential input from a prior stage to an input to the interpolating stage, and which feed a differential output from the interpolating stage back to an input thereto are paired and switches are provided for the added capacitors so that all of these capacitors are switched. Capacitors which are directly coupled to feed forward a differential input from a prior stage to the interpolating stage are also paired, but only the added capacitor is switched.
    Type: Grant
    Filed: January 24, 1996
    Date of Patent: October 21, 1997
    Assignee: Harris Corporation
    Inventors: Salomon Vulih, George Roalnd Briggs
  • Patent number: 5617063
    Abstract: A circuit for processing related signal components, such as in-phase and quadrature signal components generated within a modulator, in which a first filter and a second filter are matched such that the gain of each such filter is nearly identical. A modulator is provided having matched filters in accordance with the present invention in which the gain "K" of each filter is equal to 1. By using a filter which has a gain of 1, the gain is removed from consideration when attempting to match the filter response of one filter to another. Furthermore, each filter is relatively simple to implement, having only four resistors, two capacitors, and two operational amplifiers.
    Type: Grant
    Filed: December 13, 1995
    Date of Patent: April 1, 1997
    Assignee: Pacific Communication Sciences, Inc.
    Inventor: Naom Chaplik
  • Patent number: 5608349
    Abstract: A circuit arrangement with an adjustable amplitude-frequency response between an input signal terminal and an output signal terminal can be changed over simply between a fourth-order high-pass or low-pass characteristic and a second-order all-pass characteristic. The circuit includes first and third filters each with a filter function F, a second filter with a filter function G, a plurality of coefficient sections and first and second summing stages all coupled together so that the circuit has a transfer function A between the input signal terminal and the output signal terminal with a component complying withA=(C+(1-C).multidot.F-2.multidot.C.multidot.G).multidot.(C(1-C).multidot.F) ,whereF=FN=1/(1+a.multidot.s+b.multidot.s.sup.2)orF=FH=b.multidot.s.sup.2 /(1+a.multidot.s+b.multidot.s.sup.2)represents a first filter function with a second-order high-pass or a low-pass characteristic andG=a.multidot.s/(1+a.multidot.s+b.multidot.s.sup.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: March 4, 1997
    Assignee: U.S. Philips Corporation
    Inventor: Burkhard Dick
  • Patent number: 5604927
    Abstract: A radio receiver has a frequency down conversion stage including a first passive filter tuned to a lower frequency. An amplifier functioning as a voltage-to-current converter includes a resistor (60) which can be shunted by a second passive filter in response to actuation of symmetrically arranged switching devices. When the second passive filter shunts the resistor, the overall pass band is raised to a higher frequency. Additionally, the amplifier has a lower noise figure when the second passive filter shunts the transconductor.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: February 18, 1997
    Assignee: U.S. Philips Corporation
    Inventor: Paul A. Moore
  • Patent number: 5598124
    Abstract: A circuit configuration for noise signal suppression includes an input signal terminal and two inputs being controlled by the input signal terminal. Transfer gates are each connected in series with a respective one of the inputs and have a terminal being connected to the input signal terminal. A transistor is connected as a capacitor in parallel with each of the inputs.
    Type: Grant
    Filed: July 31, 1995
    Date of Patent: January 28, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventor: Hans-Gerd Kirchhoff
  • Patent number: 5596289
    Abstract: A differential-difference current conveyor combines features of a differential-difference amplifier and a current conveyor. The differential-difference current conveyor receives four input signals (1, 2, 3, X) and outputs one output signal Z. There is a defined relationship of voltages and currents, wherein V.sub.X =V.sub.1 -V.sub.2 +V.sub.3 ; I.sub.1 =I.sub.2 =I.sub.3 =0; and I.sub.X =I.sub.Z.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: January 21, 1997
    Assignee: National Science Council
    Inventor: Shen-Iuan Liu
  • Patent number: 5594390
    Abstract: An active filter includes a capacitor and a resistor coupled in parallel to an input terminal; a first current conveyor coupled between the capacitor and an output terminal; a second current conveyor coupled between the resistor and the output terminal; and a second capacitor coupled between the output terminal and ground. Proportionality constants between input and output currents of the current conveyors can be adjusted to reduce capacitance in the active filter and reduce the area required to fabricate the active filter in an integrated circuit. The active filter can replace a conventional loop filter in a phase-locked loop of a data separator integrated circuit. In a phase-locked loop, the polarity of a charge pump can be reversed to compensate for current reversal by the current conveyors in the active filter.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: January 14, 1997
    Assignee: National Semiconductor Corporation
    Inventor: Reuven Holzer
  • Patent number: 5589795
    Abstract: The invention relates to a method and an arrangement for controlling a loop filter of a digital phase lock, the loop filter filtering a difference signal, which comes from a phase comparator at a predetermined bandwidth and is proportional to a phase error. To reduce oscillation in the adjusting method and to eliminate the errors caused by noise, the loop filter is adjusted non-linearly on the basis of the difference signal from the phase comparator in such a manner that the bandwidth of the loop filter changes.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: December 31, 1996
    Assignee: Nokia Mobile Phones Ltd.
    Inventor: Matti Latva-Aho
  • Patent number: 5583709
    Abstract: Method and apparatus automatically select, in a playback mode, a noise reduction circuitry of a noise reduction system by which a middle-to-high frequency signal of a low level included in a recording signal is compressed in dynamic range for recording and the compressed middle-to-high frequency signal is expanded in dynamic range in the playback mode, thereby suppressing middle to high frequency noises in the reproduction signal. A level difference .DELTA.L between the maximum and minimum signals of the low frequency component in the reproduction signal and a level difference .DELTA.H between the maximum and minimum signals of the middle-to-high frequency component in the reproduction signal are obtained. While comparing the magnitudes of the two level differences obtained, the selection of an appropriate noise reduction circuitry is performed so that the two level differences are made almost equal to each other.
    Type: Grant
    Filed: August 5, 1994
    Date of Patent: December 10, 1996
    Assignee: Pioneer Electronic Corporation
    Inventors: Satoru Kodaira, Shirou Suzuki, Yoshinori Takei
  • Patent number: 5565812
    Abstract: In a remote control system, a receiver demodulates an incoming signal that is typically RF into a digital signal. Signal shaping is required in order to transform small AC signal variations into clean, full-level digital signals. An increased sensitivity signal shaper circuit uses AC coupling with a fully differential architecture. A capacitor couples the input signal to a fully differential operational amplifier where a feedback capacitor sets the gain and a switched capacitor sets the time constant and operating point. The differential operational amplifier has a differential output that is fed into a single ended output comparator that is followed by a schmidt trigger which restores the signal to full logic levels.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: October 15, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Eric G. Soenen
  • Patent number: 5557222
    Abstract: Within the differential detection demodulator, the received signal is first quantized by a limiter amplifier 10 and then subjected to frequency conversion by a frequency converter 50 including: an exclusive OR element 51; a running average generator 52 consisting of a shift register 53 and an adder 54; and a comparator 55. In response to the output of the frequency converter 50, the phase comparator 60 outputs a relative phase signal representing the phase shift of the received signal after frequency conversion relative to the phase reference signal. The phase comparator 60 includes: an exclusive OR element 61; an absolute phase shift measurement means 62 consisting of an adder 63 and D flip-flop arrays 64 and 65; and a D flip-flop 66 serving as a phase shift polarity decision means.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: September 17, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshiharu Kojima
  • Patent number: 5554957
    Abstract: A balanced current amplifier mirrors either a fully differential or single ended input signal into common output circuits in a manner to generate a fully differential output signal without any d.c. bias. Input signal nodes are maintained at a desired voltage by circuit elements other than those of the current mirror circuits, thus freeing the current mirroring elements from having to be sized for this purpose. The sizes of the output transistors are adjustable in order to set the gain of the circuit. In addition to amplifier circuits, a full-wave rectifier, a comparator, and a filter, all operating with current signals, are described. A single circuit module may include all of these circuits with a user provided the capability to program the module to perform any one or more of these functions.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 10, 1996
    Assignee: IMP, Inc.
    Inventor: Hans W. Klein
  • Patent number: 5519349
    Abstract: A phase shifter includes first and second single pole double throw switches, a low-pass filter, and a high-pass filter. The first switch has an input terminal and first and second output terminals, and the second switch has first and second input terminals and an output terminal. The low-pass filter is interposed between the first output terminal of the first switch and the first input terminal of the second switch and includes FETs as capacitors. The high-pass filter is interposed between the second output terminal of the first switch and the second input terminal of the second switch and includes a plurality of FETs as capacitors. The input terminal of first switch and the output terminal of the second switch are an input terminal and an output terminal of the phase shifter, respectively. Each of the high-pass filter and the low-pass filter produces two different phase quantities by the on-off switching of the FETs. Therefore, four different phase quantities are obtained in the phase shifter, i.e.
    Type: Grant
    Filed: September 22, 1994
    Date of Patent: May 21, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kazuhiko Nakahara
  • Patent number: 5506542
    Abstract: A filter circuit and a filter integrated circuit capable of being used in a high frequency band includes a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: April 9, 1996
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Hamano, Izumi Amemiya, Yoichi Oikawa, Takuji Yamamoto, Takeshi Ihara, Yoshinori Nishizawa
  • Patent number: 5497116
    Abstract: The present invention relats to a method for processing a signal, and a signal processing circuit according to the method, in which circuit one or two transistors (T1, T2) switched according to the switches are used as the active member of the entire circuit, the charge passing through said transistors being controlled, in addition to the switches, by the transferrable charge itself so that on concluded transfer of charge, all current flow in the circuit stops by itself. By means of the present invention, the signal processing is, irrespective of the polarity of the signal (positive or negative) and of the threshold voltages (Uth1, Uth2) of the transistors, linear because the signal voltage (U.sub.s) is produced, as taught by the invention, relative to a reference voltage (U.sub.Ref) of predetermined magnitude in that a sum of the signal voltage (U.sub.s) and said reference voltage (U.sub.Ref) is produced and the polarity of said sum is every time the same as the polarity of the reference voltage (U.sub.
    Type: Grant
    Filed: April 12, 1994
    Date of Patent: March 5, 1996
    Assignee: Nokia Mobile Phones Ltd.
    Inventor: Juha Rapeli
  • Patent number: 5489873
    Abstract: An active low-pass filter suitable as a 90.degree. phase shifter circuit is provided which requires few external components when formed as an IC. The current resulting from the input signal outputted from a first impedance element is amplified by a first current amplifier, and the resulting output current is converted by a first converting means to a voltage, which is supplied via a second impedance element to a second current amplifier; the output current of the second current amplifier is converted by a second converting means to a voltage, which is outputted as a filter output, while the current corresponding to the output voltage of the second converting means is negatively fed back into the inputs of the first and second current amplifiers; furthermore, at least the current amplification factor of the first current amplifier is made controllable, thereby permitting the cut-off frequency to be varied arbitrarily.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: February 6, 1996
    Assignee: Motorola, Inc.
    Inventors: Takatsugu Kamata, Jun Takahashi
  • Patent number: 5475338
    Abstract: An active filter circuit has differential transistors having first conductivity type bipolar transistors and load transistors having second conductivity type bipolar transistors. A connecting node between the differential transistors and the load transistors is driven by a middle electric potential. Voltage dependent characteristics of earth capacitance including parasitic capacitances parasitic to the differential transistors and the load transistors can be kept constant by offsetting the voltage dependent characteristics of the parasitic capacitances. It is thereby possible to make the active filter circuit small in size and the consumed electric power reduced.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: December 12, 1995
    Assignee: Sony Corporation
    Inventor: Futao Yamaguchi
  • Patent number: 5463346
    Abstract: A fast response, low-pass filter comprising a slow response low-pass filter and a fast response low-pass filter. Both of these low-pass filters receive an input signal, and their respective outputs are compared to each other. When the output of the slow response filter differs from the output of the fast response filter by a predetermined value, the response time of the slow response time filter is increased so that it can more rapidly follow the input signal. The fast response time low-pass filter can be implemented with either analog low-pass filters or by digital low-pass filters.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: October 31, 1995
    Assignee: SpaceLabs Medical, Inc.
    Inventor: James R. Brooks
  • Patent number: 5459417
    Abstract: A circuit for monitoring the DC content of an AC waveform includes a differential amplifier having one input connected to the AC waveform and the other input connected to a capacitive-coupled network that eliminates any DC component in the AC waveform at the frequency being monitored. Additional circuitry is required to cancel any phase shift and reactance of the coupling capacitor. The output of the differential amplifier is a signal which represents the amplitude and polarity of the DC content.
    Type: Grant
    Filed: June 28, 1993
    Date of Patent: October 17, 1995
    Assignee: AlliedSignal Inc.
    Inventors: Samuel C. Hsieh, Charles M. Hansen, Jr.
  • Patent number: 5434535
    Abstract: An RC filter for low or very low frequency applications, comprising a resistor between the filter input and output, and an amplifier connected after the resistor and having an output fed back to the amplifier input through a capacitor. This simple design allows the known Miller Effect to be utilized to produce a filter having a high time constant while employing small-size components which occupy little space in integrated circuits.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: July 18, 1995
    Assignee: S.G.S. Thomson Microelectronics S.r.l.
    Inventors: Luciano Tomasini, Rinaldo Castello
  • Patent number: 5424675
    Abstract: A full differential type analog circuit includes a full differential type operational amplifier, a first network, a second network, and a third network. The full differential type operational amplifier has inverting and non-inverting input terminals and inverting and non-inverting output terminals. The first network is connected between the inverting input terminal and the non-inverting output terminal and has a first input terminal for inputting a signal to the inverting input terminal and a first output terminal connected to the non-inverting output terminal. The second network is connected between the non-inverting input terminal and the inverting output terminal and has a second input terminal for inputting a signal to the non-inverting input terminal and a second output terminal connected to the inverting output terminal.
    Type: Grant
    Filed: May 14, 1993
    Date of Patent: June 13, 1995
    Assignee: NEC Corporation
    Inventor: Hiroshi Matsushita
  • Patent number: 5418449
    Abstract: The disclosure relates to the servo-control of an electronic circuit that calls for the detection of the power delivered at its output. The disclosed device is essentially constituted by a field-effect transistor with zero bias V.sub.DS mounted between the ground and a matching network at output of the circuit. This transistor behaves either like a capacitor or like a diode. A low-pass filter, connected between the transistor and the network, delivers a detection voltage V.sub.det.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: May 23, 1995
    Assignee: Thomson-CSF Semiconducteurs Specifiques
    Inventors: Gerard Pataut, Stefan Dietsche
  • Patent number: 5416326
    Abstract: A six-pole band-pass filter system and circuit configured for optimal permance in an associated infrared search and track (IRST) system which outputs data in an analog format is disclosed. The key to the successful operation of the filter is its matching to the impulse response of the associated IRST system. By adjusting certain components in the filter, it can operate as an optimal, linear, one-dimensional device to detect unresolved targets against a severely cloud-cluttered background.
    Type: Grant
    Filed: June 3, 1985
    Date of Patent: May 16, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: John R. Andreotti
  • Patent number: 5392317
    Abstract: A pulse-signal extracting method and apparatus which are capable of generating an accurate pulse output even if the pulse input signal greatly pulsates due to a low-frequency noise component. A predetermined offset voltage is added to the input signal where the low-frequency noise component is superimposed on a pulse waveform which is the signal component so as to obtain an amplified signal. This amplified signal is inputted to a low-pass filter so as to output only the amplified flow-frequency component, and the original input signal is compared with the amplified low-frequency component in a comparator so as to extract the pulse waveform, which is the signal component, on the basis of the comparison result.
    Type: Grant
    Filed: February 20, 1992
    Date of Patent: February 21, 1995
    Assignee: Mitsubishi Kenki Kabushiki Kaisha
    Inventors: Yoshiki Cho, Tetsu Tashiro
  • Patent number: 5369373
    Abstract: A sine wave oscillator provides an input signal to a step-recovery diode (SRD). The SRD produces a wideband series of harmonics of the frequency of the sine wave oscillator that are represented as "lines" in a power r.f. frequency plot. The output of the SRD is supplied to one or more bandpass filters or lowpass filters which provide selection windows so that only a specified number of harmonic lines are passed within a selection window. These specified harmonic lines are then coupled to one or more high speed input switches which are coupled to one or more high speed selection switches. The high speed selection switches are each coupled to a separate bandpass filter that is tuned to a different bandpass frequency range. Each bandpass filter corresponds to one or to several adjacent lines of the selection windows.
    Type: Grant
    Filed: October 16, 1992
    Date of Patent: November 29, 1994
    Assignee: Unisys Corporation
    Inventors: George F. Nelson, David P. Andersen
  • Patent number: RE35494
    Abstract: An integrated, low-pass filter of the first order made using the switched capacitors technique utilizes advantageously a single switched capacitor and only two switches in contrast to the filters of the prior art which utilize two switched capacitors and four switches. The filter of the invention requires a smaller integration area and moreover exhibits a greater precision of its DC gain.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: April 22, 1997
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventor: Germano Nicollini