Abstract: A touch panel driving device is provided for sequentially performing a scanning of selecting a pair of transmission signal lines from N number of transmission signal lines and a pair of reception signal lines from M number of reception signal lines. The touch panel driving device includes a reception circuit for respectively receiving, from the pair of reception signal lines, reception signals whose waveforms are changed due to a capacitance change caused by a touch operation and for generating a detection value for detecting the touch operation by comparing the received reception signals, and a plurality of noise filters provided in signal paths from the M number of reception signal lines to the reception circuit for performing a filtering operation of the same filtering characteristics on each of the reception signals supplied to the reception circuit from the pair of reception signal lines.

Abstract: The position of an image is varied to thereby make it possible to achieve an increase in resolution, and at the same time, easily readjust the variation. The projector includes a vibratory device functioning as an image displacement section adapted to vary the position of the image displayed by the display section, and a control section adapted to control the vibratory device. The control section is provided with a plurality of variable resistors each adapted to adjust amplitude of a drive signal adapted to control a shift amount as the variation of the position of the image due to the vibratory device.

Abstract: Described herein is a power-efficient Gm-C filter, wherein the Gm-C filter includes several operational transconductance amplifiers (OTAs). In an example, at least two of the OTAs share a common bias current. Further, output of one of the OTAs is used to bias another one of the OTAs. Also described herein is a power-efficient clock generator circuit that is configured to output non-overlapping clock signals. The clock generator circuit includes a ring oscillator circuit, which includes several inverter stages. The clock generator circuit is well-suited for controlling operation of switches.

Abstract: A liquid discharge apparatus includes: an integrated circuit device that includes a modulation portion which generates a modulation signal by pulse-modulating a source signal; a feedback circuit; a transistor that generates an amplified modulation signal which is obtained by amplifying the modulation signal; a low-pass filter that generates a drive signal by demodulating the amplified modulation signal; and a piezoelectric element that is displaced by applying the drive signal, wherein the feedback circuit generates a feedback signal on the basis of the drive signal, and feeds back the feedback signal to the modulation portion through a feedback terminal, the modulation portion includes a first circuit block and a second circuit block, and the integrated circuit device is configured to separate the first circuit block from the second circuit block by a triple-well structure.

Abstract: In accordance with an embodiment, a circuit includes a mixer having a signal input port, a local oscillator input port and an output port, a lowpass filter circuit having an input coupled to the output port of the mixer and a terminal configured to be connected to a shunt capacitor, and a difference circuit having a first input coupled to the output port of the mixer, and a second input coupled to an output of the lowpass filter. The output of the difference circuit substantially rejects a DC signal component at the output port of the mixer.

Abstract: Soft-switching gate control circuitry is disclosed. The circuitry includes a first discharge circuit coupled across a first switching device. A first control circuit, upon a first switch input signal transitioning from a disabled state to an enabled state, is adapted to cause the first discharge circuit to transition from a high impedance state to a discharge impedance state, and when a voltage across the first switching device drops below a first threshold value, cause the first switching device to transition from an off state to an on state.

Abstract: Techniques for controlling the slew rate of a signal independently of RC time constants are disclosed. In one embodiment, a gate driver circuit for an LCD panel may include a rail-to-rail operational amplifier having an output stage configured to produce a gate activation signal for switching pixels of the LCD panel. A slew rate control circuit may be provided for adjusting the slew rate of the gate activation signal by varying a bias current of the output stage relative to a compensation capacitance and a gain of the operational amplifier. For instance, the slew rate may be increased by increasing the bias current, and decreased by decreasing the bias current without the need to adjust RC variables.

Abstract: A memory element includes a first piezotronic transistor coupled to a second piezotronic transistor; the first and second piezotronic transistors each comprising a piezoelectric (PE) material and a piezoresistive (PR) material, wherein an electrical resistance of the PR material is dependent upon an applied voltage across the PE material by way of an applied pressure to the PR material by the PE material.

Abstract: A reference voltage setting apparatus including: a current generator having a first device to supply a first dark current and a second device to supply a second dark current; a first operational amplifying unit connected to the current generator; and a voltage setting unit connected to the first operational amplifying unit and setting a reference voltage having a compensated offset voltage of the first operational amplifying unit, and an illumination sensing device and a display device including the reference voltage setting apparatus.

Abstract: A driver circuit including front and rear amplifiers each powered by the primary and secondary power supplies, where the latter power supply is generated from the former power supply. The rear amplifier includes a cascade transistor whose base bias is provided from the bias source. The bias source provides the base bias to reduce the base current when the primary power supply is active but the secondary power supply is inactive, and to be equal to the primary power supply when two power supplies become active but the rear amplifier is inactive.

Abstract: An open loop envelope tracking system calibration technique and circuitry are proposed. A radio frequency power amplifier receives a modulated signal. An envelope tracker power converter generates a modulated power amplifier supply voltage for the radio frequency power amplifier based on a control signal derived from the modulated signal. A first output power and a second output power of the radio frequency power amplifier are measured when the control signal is respectively delayed by a first delay period and a second delay period. A sensitivity of the output power of the radio frequency power amplifier is near a maximum near the first delay period and the second delay period. The first delay period and/or the second delay period are adjusted until the first output power substantially equals the second output power. The first delay period and the second delay period are used to obtain a calibrated fine tuning delay offset.

Abstract: An output stage circuit includes: a first transistor, including a first terminal coupled to a first node, a second terminal coupled to an output terminal, a third terminal coupled to an input terminal for receiving an input voltage, and a fourth terminal coupled to a first power terminal for receiving a first voltage; a second transistor, including a first terminal coupled to a second node, a second terminal coupled to the output terminal, a third terminal coupled to the input terminal for receiving the input voltage, and a fourth terminal coupled to ground; and a current source, coupled to the output terminal for providing a constant current.

Abstract: An interface circuit for driving a fully-differential circuit has a first circuit configured to decrease the voltage at its output in response to an increase in an average value of first and second input voltages. A first network receives the first input voltage and the output voltage of the first circuit to provide a first output voltage for driving the fully-differential circuit. A second network receives the second input voltage and the output voltage of the first circuit to provide a second output voltage for driving the fully-differential circuit. An impedance ratio of the first network is substantially matched to an impedance ratio of the second network.

Abstract: Embodiments of an image sensor including a pixel array with a plurality of pixels arranged into rows and columns. Control circuitry coupled to the pixels in each row, and an analog-to-digital converter is coupled to the pixels in each column of the pixel array. Each analog-to-digital converter includes a ramp comparator, and a variable current source coupled to the ramp comparator to provide a variable bias current to the ramp comparator. The bias current can adjusted during reading of a row of pixels according to a dynamic bias current profile that maintains at least a specified margin between the random noise of the pixels and an acceptable noise level. Other embodiments are disclosed and claimed.

Abstract: An active noise cancellation device (2) for a medical device includes an active circuit having a first input connection (8), a second input connection (10), and an output connection (12). The second input connection (10) is connected to at least one predetermined reference signal. The active noise cancellation device (2) further includes a low-impedance body connection electrode (4) adapted to be in electrical contact with a bloodstream of a subject, wherein the low-impedance body connection electrode (4) is connected to said first input connection (8), and a feedback branch (14) connecting the output connection (12) with the first input connection (8). The feedback branch (14) comprises a current limiting circuit (18) to limit a current through said feedback branch (14) to be lower than a predetermined current.

Abstract: A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N?1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2? radians or a multiple thereof, where N is greater than 1.

Abstract: A level shifter includes: a first buffer amplifier transferring a preset reference voltage to a first output terminal; a second buffer amplifier connected in parallel to the first buffer amplifier and transferring an input voltage to a second output terminal; a positive feedback amplifier connected in parallel to the first buffer amplifier and the second buffer amplifier, and amplifying the input voltage by a preset gain to transfer the amplified input voltage to a third output terminal; and a level regulation unit regulating levels of output signals of the first buffer amplifier, the second buffer amplifier, and the positive feedback amplifier and providing the regulated output signals to a common output node.

Abstract: A circuit includes a passive element having an impedance. An active circuit can be configured to receive an impedance signal associated with the impedance. The impedance includes a real portion and an imaginary portion. The active circuit removes at least a portion of the real portion of the impedance signal. The circuit can be utilized in a wide array of applications including radio applications.

Abstract: A variable gain amplifier includes an integrator having an input, an output and a feedback loop connected between the input and output, a plurality of input chains connected in parallel between the amplifier input and the input of the integrator, each input chain including a resistor and a first switch and a plurality of second switches, each second switch connected between an intermediate node between the resistor and first switch of a respective input chain and the feedback loop of the integrator, wherein the resistance of the resistors in the input chains is scaled by a scaling factor with respect to one another and the on-resistances of the first and second switches connected to each intermediate node are scaled by the corresponding scaling factor.

Abstract: A voltage reference is created from an operational amplifier circuit having two substantially identical P-channel metal oxide semiconductor (P-MOS) transistors with each one having a different gate dopant. The different gate dopants result in different threshold voltages for each of the two otherwise substantially identical P-MOS transistors. The difference between these two threshold voltages is then used to create the voltage reference equal to the difference. The two P-MOS transistors are configured as a differential pair in the operational amplifier circuit and the output of the operational amplifier is used as the voltage reference.

Abstract: A drive circuit includes a drive element for supplying a drive current to a driven element; a control voltage generation circuit for outputting a control voltage to the drive element to generate the drive current through inputting a reference voltage; and a switch section for shutting down the reference voltage when the driven element is not driven so that the control voltage decreases to a level not to generate the drive current.

Abstract: According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.

Abstract: A switch including a first transistor including a first main terminal connected to a first switch node, a second main terminal connected to a second switch node and a control terminal, the second switch node being connected to a first clean voltage supply, and first control circuitry connected to the control terminal of the first transistor, including a first node connected to the first clean voltage supply, a second node connected to a second voltage level, and a control input node for receiving a first input control signal variable between a supply voltage level and a third voltage level, the first control means arranged to selectively connect the control terminal of the first transistor to one of the first node and the second node based on the first input control signal.

Abstract: The present invention relates to a gain control circuit, which detects an output signal of a front-end circuit to produce a detection signal. An operation unit performs an accumulation operation to the detection signal and thereby produces an operation signal. In addition, the operation unit also resets the operation unit according to a reset signal. A reset unit produces the reset signal for every predetermined interval of time. A control unit produces a control signal according to the operation signal and a first threshold value for controlling an output gain of the front-end circuit.

Abstract: A reference voltage setting apparatus including: a current generator having a first device to supply a first dark current and a second device to supply a second dark current; a first operational amplifying unit connected to the current generator; and a voltage setting unit connected to the first operational amplifying unit and setting a reference voltage having a compensated offset voltage of the first operational amplifying unit, and an illumination sensing device and a display device including the reference voltage setting apparatus.

Abstract: An operation amplifier (op-amp) and a circuit for providing dynamic current thereof are disclosed. The circuit can be applied to any current op-amp. The circuit comprises two transistors which are simultaneously or non-simultaneously turned on as the input signals respectively received by the first input and the second input of the op-amp get a transition, namely, as the op-amp is in the transient state, so as to increase the bias current at the first input terminal or/and the second input terminal of the op-amp by a dynamic current. Therefore, not only the internal slew rate of the op-amp can be accelerated by the circuit of the present invention, but also the power consumption of the op-amp can not be increased by the circuit of the present invention as the op-amp in the steady state.

Abstract: An offset adjusting apparatus adjusting an offset of an output signal output from an output terminal of an operational amplifier including one input terminal to which an input signal is to be input via a first resistor and the other input terminal to which a reference voltage is to be applied, the operational amplifier being connected between the one input terminal and the other output terminal, the offset adjusting apparatus comprising: an adjustment resistor configured to be capable of adjusting a resistance value, the adjustment resistor including one end to which an adjustment voltage for adjusting the offset is to be applied and the other end connected to the one input terminal of the operational amplifier; and a controlling unit configured to control the adjustment voltage applied to the adjustment resistor based on a DC level of the output signal to remove the offset.

Abstract: Common mode management between a DAC, such as a current-steering DAC, and a transconductance filter in a high-frequency transmission system. In one aspect of the invention, a transmission circuit includes a DAC that provides an analog signal from an input digital signal, and a filter such as a transconductance filter connected to the DAC, the filter receiving the analog signal and filtering the analog signal for transmission. A common mode management circuit connected to the DAC and the transconductance filter provides common mode compatibility in the interface connecting the DAC and the transconductance filter.

Abstract: A receiver of a high speed digital interface includes at least one differential amplifier, a pair of resistive elements, a current source and a pair of transistors. The differential amplifier receives a small differential signal at a pair of input terminals and outputs an amplified differential signal. Each of the resistive elements has one end coupled to one of the input terminals of the differential amplifier and the other end receiving a reference voltage. The pair of transistors has drains respectively coupled to the input terminals of the differential amplifier, sources commonly coupled to the current source and gates receiving a differential feedback signal derived from the amplified differential signal.

Abstract: An operation amplifier (op-amp) and a circuit for providing dynamic current thereof are disclosed. The circuit can be applied to any current op-amp. The circuit comprises two transistors which are simultaneously or non-simultaneously turned on as the input signals respectively received by the first input and the second input of the op-amp get a transition, namely, as the op-amp is in the transient state, so as to increase the bias current at the first input terminal or/and the second input terminal of the op-amp by a dynamic current. Therefore, not only the internal slew rate of the op-amp can be accelerated by the circuit of the present invention, but also the power consumption of the op-amp can not be increased by the circuit of the present invention as the op-amp in the steady state.

Abstract: A circuit including two operational amplifiers connected in parallel. For the purpose of this explanation, assume that an equivalent input noise of a circuit with one operational amplifier is too high. Where two operational amplifiers, are connected in parallel, the signals from the operational amplifiers add as currents at the output node of the parallel combination.

Abstract: An apparatus includes an analog input buffer having one or more inputs and one or more outputs, a plurality of differential track-and-hold stages, one or more input transmission lines, and one or more output transmission lines. Each track-and-hold stage has one or more inputs and one or more outputs. The one or more input transmission lines connect the one or more outputs of the differential analog input buffer to the inputs of the track-and-hold stages. The one or more output transmission lines connect to the outputs of the track-and-hold stages. The connections to the inputs of the stages are spatially distributed along the one or more input transmission lines, and connections to the outputs of the stages are spatially distributed along the one or more output transmission lines.

Abstract: An output buffer circuit includes an input stage of which one end receives an input voltage and the other end receives an output voltage; a class AB output stage that increases a current flowing in the output stage when the difference between the input and output voltages is larger than 0; a floating current source that biases the class AB output stage; a summing circuit that is connected to the input stage, the floating current source, and the class AB output stage so as to sum up the current supplied from the input stage and the internal current supplied from the floating current source; and an offset compensating circuit that is connected to the input stage and is composed of a plurality of switching elements and resistors so as to detect an offset voltage to compensate.

Abstract: Provided are a method and system for controlling impedance in a transconductance amplifier. A system includes a first transconductance amplifier and a second transconductance amplifier configured to control electrical characteristics associated with the first transconductance amplifier. An operational amplifier is provided and has at least one input port connected to the second transconductance amplifier. Also included is a first digital to analog converter (DAC) connected to receive a current signal from the operational amplifier.

Abstract: A voltage conversion device having non-linear gain and changeable gain polarity includes a switch module, a gain decision module, a first voltage selection module, a second voltage selection module, a first switch unit, a second switch unit and a voltage output module. The switch module is used for outputting analog voltage provided by the analog voltage source or voltage corresponding to the system ground end. The gain decision module is used for determining a gain. The first voltage selection module is used for outputting a first DC voltage. The second voltage selection module is used for outputting a second DC voltage. The first switch unit is used for outputting the first DC voltage. The second switch unit is used for outputting the second DC voltage. The voltage output module is used for outputting an amplified result of a DC voltage according to the gain.

Abstract: Common mode management between a DAC, such as a current-steering DAC, and a transconductance filter in a high-frequency transmission system. In one aspect of the invention, a transmission circuit includes a DAC that provides an analog signal from an input digital signal, and a filter such as a transconductance filter connected to the DAC, the filter receiving the analog signal and filtering the analog signal for transmission. A common mode management circuit connected to the DAC and the transconductance filter provides common mode compatibility in the interface connecting the DAC and the transconductance filter.

Abstract: A folded-cascode operational amplifier including a differential input stage (19) and a class AB output stage (20) includes a first slew boost current mirror (13) and a second slew boost current mirror (14) having inputs connected to drains of the input transistors, respectively. Each current mirror amplifies excess tail current steered into it as a result of a large, rapid input signal transition. The amplified excess tail current is used to boost the slew rate of the class AB output stage in accordance with a first polarity of the difference between the first (Vin+) and second (Vin?) input voltages. The drains of the input transistors are maintained at a voltage less than a transistor threshold voltage above the ground except during slewing operation of the operational amplifier to effectively isolate the current mirrors except during slewing operation.

Abstract: A CV conversion circuit capable of measuring a plurality of capacitances with a simple circuit is provided. A time-division signal is applied to each capacitor, whereby a plurality of capacitances of the capacitors can be measured in series by a circuit with a small number of components.

Abstract: An apparatus and method for generating high-speed clock signals using a voltage-controlled-oscillator (VCO) device. The apparatus implements a linear variable gain amplifier rather than a non-linear hard limiter to remove unwanted signal modulation in VCO output signals. Implementation of the linear variable gain amplifier leads to the generation of amplitude modulation-free oscillation leading to the generation of jitter free high frequency clock signals.

Abstract: A band-gap type constant voltage generating circuit is produced in a semiconductor chip, and has a first potential terminal and a second potential terminal. A band-gap circuit includes first and second transistors having respective bases connected to each other, a first resistor connected between emitters of the first and second transistors, and a second resistor connected between the emitter of the second transistor and the first potential terminal. A constant voltage production circuit is provided between the first and second potential terminals to produce and output a constant voltage based on a base-emitter voltage of the second transistor of the band-gap circuit, and the constant voltage is fed as a feedback signal to the base of the second transistor of the band-gap circuit. A driver circuit is provided between the first and second potential terminals and connected to collectors of the first and second transistors to drive the band-gap circuit.

Abstract: A common voltage source IC device includes an operational amplifier, a push-pull circuit receiving an output signal from the operational amplifier and outputting a common voltage to a common voltage terminal; an inverting resistor connected to an inverting input of the operational amplifier; a feedback resistor connected to the common voltage terminal and the inverting input; a capacitor connected to the common voltage terminal and the inverting input; a first switching resistor connected to the inverting input and a first switching transistor, the first switching transistor connected to the common voltage terminal; a driving resistor receiving a drive voltage and connected to a non-inverting input of the operational amplifier; a variable resistor connected to the non-inverting input and a ground source; and a second switching resistor connected to the non-inverting input and a second switching transistor, the second switching transistor connected to the ground source.

Abstract: Methods and circuits for extracting a true mean of two signals are provided. A first amplifier input stage (e.g., an n-type stage) is operated when a mean of the two signals approaches an upper rail voltage. A second amplifier input stage (e.g., a p-type stage) is operated when the mean of the two signals approaches a lower rail voltage. A transitioning circuit controls how much each of the first and the second amplifier input stages contributes to an input of a high-gain amplifier output stage, when the mean of the two signal does not approach either of the rail voltages. An output of the high-gain amplifier output stage is fed back to both the first and second amplifier input stages via a feedback stage, which can be a matched buffer stage.

Abstract: A power conversion device contains an electronic circuit for sensing an output current characteristic of an output drive device. The characteristic of the current through the output drive device is sensed and communicated to a switching device for controlling a sensing current. The switching device is coupled to the output drive device and senses the output current of the output drive device. The switching device produces a sensing current proportional to the sensed output current. An internal resistance device is used for producing a sensing voltage. The internal resistance device is coupled with the switching device and receives the sensing current. The internal resistance device provides the sensing voltage from the sensing current proportional to the current through the output drive device.

Abstract: A transmission channel for a subscriber line interface circuit comprises a front end, tip/ring current-sensing transimpedance stage, containing relatively low valued tip and ring sense resistors coupled in circuit with tip and ring paths of a telecommunication wireline pair. The front end transimpedance stage transforms differential tip and ring input currents sensed by the tip and ring sense resistors into a single ended voltage, which is coupled to a transconductance amplifier filter/gain stage. The filter/gain stage is configured to provide a programmable output impedance, and converts the voltage from the current-sensing transimpedance stage into an output transmission voltage for application to a selected one of a current-sense, voltage-feed, or voltage-sense, voltage-feed telecommunication circuit.

Abstract: A fully integrated charge amplifier with DC stabilization includes a first amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal of the first amplifier, a transimpedance amplifier having an input terminal coupled to the output terminal of the first amplifier and an output terminal, and an impedance device coupled between the input terminal of the first amplifier and the output terminal of the second amplifier. The impedance device has a resistance of at least 1 M?.

Abstract: A rail-to-rail operational amplifier to extract a true mean of two signals. The amplifier includes a first amplifier input stage adapted to operate when a mean of the two signals is near an upper rail voltage. A second amplifier input stage is adapted to operate when the mean of the two signals is near a lower rail voltage. A transitioning circuit is adapted to control how much each of the first and the second amplifier input stages contributes to an input of a high-gain amplifier output stage. An output of the high-gain amplifier output stage is fed back to both the n-type amplifier input stage and the p-type amplifier input stage via a matched buffer stage.

Abstract: A receiving circuit including an amplifier for generating a receiving voltage signal, a comparator for generating a binary signal from the receiving voltage signal, and a logic maintaining circuit for receiving the binary signal and maintaining the binary signal at a shifted level for a predetermined period after the level of the binary signal is shifted. The logic maintaining circuit prevents noise pulses from appearing in a receiving signal.

Abstract: A programmable gain amplifier (PGA) controlled through a serial communications interface are fabricated on an integrated circuit (IC). A multiplexer (MUX) may also be included on the IC. The serial communications interface controls the gain of the PGA, MUX channel selection, and other functions of the PGA. Status of the PGA may also be obtained through the serial communications interface. By using a serial communications interface, the pin count of the PGA IC package may be kept to a minimum.

Abstract: A method and apparatus for delaying a clock signal involves a first clock path arranged to propagate a first clock signal; a second clock path arranged to propagate a second clock signal; and an interpolator arranged as a unity gain operational amplifier. An amount of delay between the first and second clock signals is determined by a control voltage potential.

Abstract: A driving circuit that drives a capacitive load to a target voltage within a power supply voltage range, includes: a first amplifier circuit having a first operating range, for charging and driving an output terminal and a second amplifier circuit having a second operating range, for discharging and driving the output terminal, and an input control circuit for supplying one of a voltage at an upper limit side (V1) of a range common to the first and second operating ranges, a voltage at a lower limit side (V2) of the range, and a target voltage (Vin) to an input terminal of the first or second amplifier circuit are provided. A driving period for driving the output terminal to the target voltage includes a first period (T1) during which the input control circuit supplies the voltage (V1) or the voltage (V2) to the input terminals of the first and second amplifier circuits and a second period (T2) for supplying the target voltage (Vin) to the input terminals of the first and second amplifier circuits.