With Operational Amplifier Patents (Class 327/561)
  • Patent number: 5812008
    Abstract: A power control circuit (10) contains a voltage controlled attenuator (16) in combination with a logarithmic converter (24) to produce linear amplification of an input signal (12) over as wide a frequency output range. A logarithmic converter for use in such a power control circuit is provided, including an amplifying circuitry (60) with a non-inverting (66) and inverting (70) input and an output (64), and two feedback circuits (62, 68). The feedback circuits are separably connected between the output and an input of the amplifying circuitry, so that the first feedback circuitry (62) produces a feedback signal which results in the amplifying circuitry (60) exhibiting a non-linear characteristic and the second feedback circuitry (68) contains at least one reactive element (108) to limit the feedback signal from the first feedback circuitry (62) above certain signal levels.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: September 22, 1998
    Assignee: Nokia Telecommunications Oy
    Inventor: Toll John Nigel
  • Patent number: 5804999
    Abstract: An apparatus for controlling an electrical appliance coupled with an output terminus and configured to operate in response to an alternating input signal, such as input AC power. The apparatus comprises a reference signal generator for receiving the input signal and generating a reference signal (either V.sub.RAMP or V.sub.CONTROL) in response to the input signal, and a control circuit for controlling connection of the input signal to the output terminus in response to the reference signal and to a user-defined set-point signal. The control circuit is coupled with the reference signal generator and with a set-point terminal. The set-point terminal receives the set-point signal and the control circuit controls connection of the input signal with the output terminus in response to a predetermined relationship between the reference signal and the set-point signal; the apparatus is capable of generating a modified periodically interrupted AC power output based on an AC power input.
    Type: Grant
    Filed: August 9, 1995
    Date of Patent: September 8, 1998
    Assignee: Johnson Controls, Inc.
    Inventors: David P. DeBoer, August A. Divjak
  • Patent number: 5796298
    Abstract: In accordance with the teachings of the present invention, a programmable integrated transducer amplifier circuit is provided which receives differential outputs from a transducer, such as a pressure or accelerometer transducer. The programmable integrated transducer amplifier circuit includes binary adjustable circuits that are programmed in response to binary coded signals. The binary adjustable circuits generate binary weighted currents that are employed to adjust the operating characteristics of the amplifier circuit. The binary coded signals are received from a programmable memory array which includes a plurality of memory cells that store binary information. Each of the memory cells are programmed when coupled to a programming signal. Additionally, the memory array has pretest capability for testing outputs of the memory cells prior to permanently programming the respective memory cells.
    Type: Grant
    Filed: April 14, 1995
    Date of Patent: August 18, 1998
    Assignee: Delco Electronics Corporation
    Inventors: Mark Billings Kearney, Dennis Michael Koglin, Douglas Bruce Osborn
  • Patent number: 5793249
    Abstract: The system and method of enhancing the yield of flash memory circuit is disclosed. The method comprises performing a diagonal erase of a select group of memory cells on a wafer during sort. If the memory cells do not erase in a satisfactory manner, the control voltage applied to the memory cell is adjusted based on the memory cell's erase time. The circuitry for providing the adjustment voltage includes trimming circuitry for an incrementally increasing the applicable control of voltage.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: August 11, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jian Chen, Lee E. Cleveland
  • Patent number: 5789973
    Abstract: A resistorless amplifier circuit uses integrated operational transconductance amplifiers to realize a plurality of circuit transfer functions. The preferred embodiment produces an output signal voltage V.sub.out (500) that is either g.sub.m1 /g.sub.m3 or g.sub.m1 /(g.sub.m3 -g.sub.m1) times the input signal voltage V.sub.in (400). Additionally, an alternative embodiment implements a resistorless summing and subtracting operational transconductance amplifier circuit that realizes an output signal voltage as follows: ##EQU1## The resistorless amplifier circuit includes a first operational transconductance amplifier (100) with a transconductance g.sub.m1, a second operational transconductance amplifier (200) with a transconductance g.sub.m2, and a third operational transconductance amplifier (300) with a transconductance g.sub.m3.
    Type: Grant
    Filed: September 4, 1996
    Date of Patent: August 4, 1998
    Assignee: Motorola, Inc.
    Inventors: Raymond L. Barrett, Jr., Scott R. Humphreys, Barry W. Herold
  • Patent number: 5767724
    Abstract: An electronic clamping circuit is provided. In one preferred embodiment, the clamping circuit includes a pair of diodes connected in series, both having the same bias, which are shunted across a feedback path of a transimpedance amplifier circuit. A capacitor is connected to a node in-between the diodes and a potential (e.g., ground). The arrangement of the diodes and capacitor serve to keep the amplifier circuit's operation within its linear limits without severely degrading its bandwidth.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: June 16, 1998
    Assignee: Ametek Aerospace Products, Inc.
    Inventor: Helmar R. Steglich
  • Patent number: 5763873
    Abstract: An agricultural implement for spraying herbicide on weeds in a field without spraying herbicide on bare soil includes a photodetector circuit. The photodetector circuit includes a photodetector and an active filter. The photodetector is not AC coupled in parallel with an inductor/capacitor resonant circuit which tunes the active filter. As a result, changes in photodetector capacitance due to changes in ambient lighting conditions are not impressed across the resonant inductor/capacitor circuit and therefore do not adversely change the frequency and phase characteristics of the photodetector circuit.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: June 9, 1998
    Assignee: Patchen, Inc.
    Inventors: James L. Beck, Malcolm L. Kinter
  • Patent number: 5760648
    Abstract: A differential-to-single-ended converter comprising a resistor network (205) and an operational amplifier is introduced. In comparison to prior art converters, a resistor (250) placed between the non-inverting input (264) of the operational amplifier (260) and the negative input terminal (202) of the converter (200). The common mode voltage (V.sub.nii ') at the non-inverting input (264) does not depend on the differential input voltage (V.sub.in.sup.#) of the converter (200) and has low fluctuations. This allows the use of an operational amplifier (260) with low CMRR and makes the converter (200) suitable for low voltage applications.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: June 2, 1998
    Assignee: Motorola, Inc.
    Inventors: Vladimir Koifman, Yachin Afek, Israel Kashat
  • Patent number: 5757227
    Abstract: A low noise, low power consumption, compact, ambient temperature signal amplifier for a Cadmium Zinc Telluride (CZT) radiation detector. The amplifier can be used within a larger system (e.g., including a multi-channel analyzer) to allow isotopic analysis of radionuclides in the field. In one embodiment, the circuit stages of the low power, low noise amplifier are constructed using integrated circuit (IC) amplifiers , rather than discrete components, and include a very low noise, high gain, high bandwidth dual part preamplification stage, an amplification stage, and an filter stage. The low noise, low power consumption, compact, ambient temperature amplifier enables the CZT detector to achieve both the efficiency required to determine the presence of radio nuclides and the resolution necessary to perform isotopic analysis to perform nuclear material identification.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: May 26, 1998
    Assignee: The Regents of the University of California
    Inventors: James H. McQuaid, Anthony D. Lavietes
  • Patent number: 5751184
    Abstract: A low electric power consumption filter circuit includes an amplifying portion including an odd number of serial MOS inverters. A grounded capacitance is connected between an output of the amplifying portion and ground. A pair of balancing resistances connect an output of the MOS inverter to a supply voltage and ground at a previous stage of the last MOS inverter. A feedback impedance connects an output of the amplifying portion to its input. An input impedance is connected to the input of the amplifying portion.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: May 12, 1998
    Assignees: Yozan Inc., Sharp Kabushiki Kaisha
    Inventors: Guoliang Shou, Makoto Yamamoto, Sunao Takatori
  • Patent number: 5745002
    Abstract: A switched capacitance circuit, using a switched operational amplifier structure as an input switch of the switched capacitance, is provided with a new biasing circuit. An additional switched capacitor, switched alternately to power supply and to ground, is connected to the output side of the primary switched capacitor. Precision is retained while ensuring a rail-to-rail dynamic range, without requiring boosted control phases. Special arrangements may be implemented for controlling the amplitude of switching spikes when so required. A fully differential embodiment is also feasible with additional advantages.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: April 28, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Andrea Baschirotto, Rinaldo Castello, Federico Montecchi, Angelo Nagari
  • Patent number: 5744987
    Abstract: A device for providing a balanced input over a photoelectric cell used in a motion picture film projector and for providing an unbalanced output audio signal for driving subsequent elements in an audio reproduction unit connected to the motion picture film projector, wherein the reproduced output audio signal has an improved quality over that of a previously known transformer output signal. The circuit supplies an unbalanced voltage signal in response to a current generated by a photoelectric cell having at least a first and second terminal. The circuit includes: a current to voltage converter for receiving the current from the first terminal of the photoelectric cell and providing a first output voltage and a current return unit connected to the current to voltage converter for receiving the first output voltage and for providing a second output voltage and for providing a return current along the second terminal of the photoelectric cell.
    Type: Grant
    Filed: November 8, 1994
    Date of Patent: April 28, 1998
    Assignees: Sony Corporation, Sony Pictures Entertainment, Lucent Technologies, Inc.
    Inventors: Paul M. Embree, Milton L. Embree
  • Patent number: 5734294
    Abstract: A wide band, high-order, programmable video filter is implemented using transimpedance-based active integrators. An input voltage which may for instance represent a composite video signal is converted to a current in a linear manner using resistors and provided to a current amplifier at low impedance virtual ground nodes. The current is multiplied by a gain factor .beta..sub.R within the current amplifier and supplied to integrating capacitors connected in a feedback configuration around a high input impedance differential amplifier to establish an integrated differential voltage output. The transimpedance-based active integrators may be interconnected to realize wide-band, high-order video filters suitable for use in accordance with CCIR 601 standards. Input voltage swings are not restricted by a transistor's limited range of linear operation or voltage swing limitations of internal nodes but rather may allowed to swing as long as the bias currents sustain input current excursions.
    Type: Grant
    Filed: February 15, 1996
    Date of Patent: March 31, 1998
    Assignee: Raytheon Company
    Inventors: Ignatius S. A. Bezzam, David W. Ritter
  • Patent number: 5734293
    Abstract: Current feedback amplifier circuits, and current-to-voltage converter circuits, employing operational amplifier current mirror circuits are provided. Also provided is an output compensation circuit that, in a current feedback amplifier circuit employing the output compensation circuit together with the operational amplifier current mirrors, reduces the input bias current to be comparable to the input bias current of a voltage feedback amplifier. Additionally, a circuit and method of providing a current source that is proportional to absolute temperature is provided. A current feedback amplifier circuit employing the output compensation circuit and the operational amplifier current mirrors, and having input transistors biased by the proportional to absolute temperature current source is also provided. The drift of the input bias current over temperature are thereby made predictable and, with trimming, substantially reduced.
    Type: Grant
    Filed: November 15, 1996
    Date of Patent: March 31, 1998
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 5708376
    Abstract: A variable-gain amplifying device uses different gains for amplifying an input bias voltage signal, and an input composite signal produced by superposing an input bias voltage signal on an input signal, respectively.
    Type: Grant
    Filed: June 26, 1996
    Date of Patent: January 13, 1998
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Chikaho Ikeda
  • Patent number: 5701101
    Abstract: The present invention is a charge amplifier that directly produces a low impedance voltage output proportional to the charge at its input. The invention consists of an operational amplifier, an input capacitor, a feedback capacitor and a feedback resistor in a parallel configuration. The change amplifier of the present invention can be said to be a differentiator followed by an integrator so that the "noisy" differentiation process precedes the integration and, thus the integration produces less signal degradation.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: December 23, 1997
    Assignee: The United States of America as Represented by the Secretary of the Navy
    Inventors: Robert Weinhardt, Allen J. Lindfors, James L. Rieger, deceased
  • Patent number: 5701100
    Abstract: A second-order highpass difference filter constructed according to the present invention includes a difference amplifier and a feedback processing circuit. The difference amplifier includes an operational amplifier OP.sub.1, and four resistors R.sub.1, R.sub.2, R.sub.3 and R.sub.4. The feedback processing circuit is composed of two operational amplifiers OP.sub.2 and OP.sub.3, resistors R.sub.5 and R.sub.6, and two serial capacitors C.sub.1 and C.sub.2. The inverting and noninverting terminals of the operational amplifier OP.sub.3 are connected to the output of the difference amplifier and of the operational amplifier OP.sub.2, respectively. The output of the operational amplifier OP.sub.2 is also fed back to the inverting terminal of the operational amplifier OP.sub.2 via the resistor R.sub.5, and the noninverting terminal of the operational amplifier OP.sub.2 is grounded. The output terminal of the operational amplifier OP.sub.3 is connected to the inverting terminal of the operational amplifier OP.sub.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: December 23, 1997
    Assignee: National Science Council
    Inventors: Chien-Ping Wu, Chang-Da Tsai
  • Patent number: 5663671
    Abstract: An electronic clamping circuit is provided in one preferred embodiment, the clamping circuit includes a pair of series-connected diodes, both having the same bias, which are shunted across a feedback path of a transimpedance amplifier circuit. A capacitive element is connected to a node in-between the diodes and a potential (e.g., ground). The arrangement of the diodes and capacitive element serve to keep the amplifier circuit's operation within its linear limits without severely degrading its bandwidth.
    Type: Grant
    Filed: February 1, 1996
    Date of Patent: September 2, 1997
    Assignee: Ametek Aerospace Products, Inc.
    Inventor: Helmar R. Steglich
  • Patent number: 5656969
    Abstract: Power consumption by the driving circuitry of an output stage, employing a slew-rate controlling operational amplifier, is reduced by modulating the level of the current output by the operational amplifier in function of the working conditions of the output stage. Switching delay may also be effectively reduced. An auxiliary current generator forces an additional current through the conducting one of the pair of input transistors of the operational amplifier only during initial and final phases of a transition, essentially when the slew rate control loop ceases to be effective. The boosting of the bias current through the conducting input transistor is determined by the degree of unbalance of the differential input stage of the operational amplifier, without the use of dissipative sensing elements.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: August 12, 1997
    Assignees: SGS-Thomson Microelectronics S.r.l., Consorzio per la Ricerca Sulla Microelettronica nel Mezzogiorno
    Inventors: Francesco Pulvirenti, Gregorio Bontempo, Roberto Gariboldi
  • Patent number: 5650748
    Abstract: A highly stable linear integrated circuit amplifier (11) is incorporated in a circuit (10) employing transformer (18) feedback providing thermal gain stability determined solely by the transformer turns ratio.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: July 22, 1997
    Assignee: McDonnell Douglas Corporation
    Inventors: Russell W. Johnston, Jeffrey A. Eck
  • Patent number: 5608345
    Abstract: A switched capacitor circuit is described which is programmable so that its function can be set by a user. Thus, control circuitry and selection circuitry are provided to enable one of a plurality of alternative control signals to be provided to switch circuits of the switched capacitor circuit. In this way, the function of the switched capacitor circuits can be altered. Where there are a plurality of switched capacitor circuits connected in an array, the topology of the array can be altered by suitably routing particular input signals to particular outputs by selecting the control signals to control the switched circuits. A field programmable array of this type is also described.
    Type: Grant
    Filed: February 10, 1994
    Date of Patent: March 4, 1997
    Assignee: Pilkington Micro-Electronics Limited
    Inventors: Ian C. Macbeth, Douglas M. Pattullo
  • Patent number: 5585748
    Abstract: In a voltage-frequency converter having an integration circuit for integrating an input voltage signal in positive and negative directions, a first comparator is connected to switch integration direction of the integration circuit and a second comparator is connected to compare an integration output signal and a threshold signal. A delay circuit delays one of rising and falling edges of a second comparator output signal to be used as the threshold signal. The second comparator compares the delayed signal with a reference signal varying in accordance with a temperature and produces a second comparator output signal by which the integrating direction is switched. By the use of the delayed signal and the temperature dependent reference signal, a frequency change in the second comparator output signal caused by response time delays of the comparators is compensated for.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: December 17, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hironao Yamaguchi, Takao Ban
  • Patent number: 5578958
    Abstract: A logarithmic amplifier for preventing an abnormal output from occurring when receiving an excessive input. The logarithmic amplifier is provided with an operational amplifier for logarithmic conversion purposes and a feedback circuit for feeding back an output from the operational amplifier via a resistor connected to an output terminal of the operational amplifier. An element (for example, an element consisting of a Zener diode and a diode connected in series with each other) having an effective resistance which becomes smaller when a voltage above a predetermined value is applied to the element is connected in parallel with a resistor connected to an output terminal of an operational amplifier for logarithmic conversion purposes.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: November 26, 1996
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Hiroaki Yasuda
  • Patent number: 5578949
    Abstract: A single stage voltage to current conversion switching system which includes an input terminal for receiving an input signal voltage to be converted to a current, an output terminal, and a positive channel having a first operational amplifier with a reference input and a summing input. The summing input receives the input voltage signal and introduces a first offset voltage to the input signal voltage. There is a first semiconductor circuit connected to the output of the first operational amplifier to provide a first offset current signal. There are first switching means interconnected with the first semiconductor circuit to deliver the first offset current signal to the output terminal. There is a negative channel having a second operational amplifier with a reference and a summing input that receives the input voltage signal and introduces a second offset signal to the input signal voltage.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: November 26, 1996
    Assignee: Analogic Corporation
    Inventor: Richard H. McMorrow, Jr.
  • Patent number: 5565812
    Abstract: In a remote control system, a receiver demodulates an incoming signal that is typically RF into a digital signal. Signal shaping is required in order to transform small AC signal variations into clean, full-level digital signals. An increased sensitivity signal shaper circuit uses AC coupling with a fully differential architecture. A capacitor couples the input signal to a fully differential operational amplifier where a feedback capacitor sets the gain and a switched capacitor sets the time constant and operating point. The differential operational amplifier has a differential output that is fed into a single ended output comparator that is followed by a schmidt trigger which restores the signal to full logic levels.
    Type: Grant
    Filed: March 23, 1995
    Date of Patent: October 15, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Eric G. Soenen
  • Patent number: 5552739
    Abstract: A power supply for an integrated circuit has a piecewise linear operating characteristic for improved integrated circuit testing and screening. In an integrated circuit that receives an externally applied power signal, designated V.sub.CCX, and includes a power supply for generating an internal operating voltage, designated V.sub.CCR, an on-chip power supply circuit provides V.sub.CCR as a piecewise linear function of V.sub.CCX. In a first segment of such a function, V.sub.CCR approximates V.sub.CCX for efficient low voltage operations. In a second segment, used for normal operations of the integrated circuit, V.sub.CCR rises gradually with V.sub.CCX so that test results at the edges of the segment can be guaranteed with a margin for measurement tolerance, process variation, and derating. In a third segment, V.sub.CCR follows below V.sub.CCX at a predetermined constant offset. Transitions between segments are smooth due to nonlinear devices used in the power supply circuitry.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: September 3, 1996
    Assignee: Micron Technology, Inc.
    Inventors: Brent Keeth, Paul S. Zagar, Brian M. Shirley, Stephen L. Casper
  • Patent number: 5546042
    Abstract: A voltage regulation circuit that includes a sample and hold circuit for sampling an input voltage and for holding a reference voltage generated in response to the input voltage. The sample and hold circuit includes a capacitor that holds the reference voltage. The voltage regulation circuit also includes a regulator circuit coupled to the capacitor of the sample and hold circuit. The regulator circuit outputs an output voltage using the reference voltage supplied by the capacitor. The voltage regulation circuit may be used to provide a high precision programming voltage for programming memory cells having two or more analog states.
    Type: Grant
    Filed: April 17, 1995
    Date of Patent: August 13, 1996
    Assignee: Intel Corporation
    Inventors: Kerry D. Tedrow, Stephen N. Keeney, Albert Fazio, Gregory E. Atwood, Johnny Javanifard, Kenneth Wojciechowski
  • Patent number: 5545918
    Abstract: An integrated circuit including a semiconductor substrate, a semiconductor layer formed on the substrate, a desired bipolar transistor formed in the semiconductor layer. First and second parasitic elements are formed in the integrated circuit. An element is provided which detects when the second parasitic element becomes active or which prevents increase of the collector-to-emitter voltage of the desired bipolar transistor in response to current flowing through the second parasitic transistor. This element may be a semiconductor region formed in the semiconductor layer. The transistor may be an npn or pnp type transistor manufactured according to a complementary bipolar process or other process which results in a transistor with first and second parasitic elements. The present invention is also well-suited for use in the output stage of an operational amplifier.
    Type: Grant
    Filed: March 15, 1995
    Date of Patent: August 13, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Francisco Dos Santos, Jr., Larry M. DeVito
  • Patent number: 5546045
    Abstract: An integrated circuit output stage is intended for use with an operational amplifier. The output is capable of driving capacitive load to within a V.sub.SAT of the power supply rails. The complementary output transistors are driven by way of a combination of buffers and complementary differential amplifiers which act to bias the stage in class AB. The quiescent current is stabilized and controlled, in part, by simple resistor rationing. The output transistor saturation is sensed and a current limit is imposed so that hard saturation is avoided. Frequency compensation is achieved in a manner that responds to output transistor saturation so as to improve the high frequency transient response. Feedforward capacitors are also included to further improve high frequency response.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: August 13, 1996
    Assignee: National Semiconductor Corp.
    Inventor: Don R. Sauer
  • Patent number: 5543979
    Abstract: A preamplifier circuit arrangement for a magnetic or magneto resistive transducer, such as a record/replay head, in which a cascode preamplifier stage, and a stage providing a floating reference voltage for a following amplifier, are linked by an emitter coupled pair of transistors, one in each stage, such that the d.c. currents in the two stages flow in common through the transducer.
    Type: Grant
    Filed: September 8, 1994
    Date of Patent: August 6, 1996
    Assignee: Plessey Semiconductors Limited
    Inventor: Richard Davies
  • Patent number: 5541548
    Abstract: The invention concerns an analog amplifier constructed using digital transistors. The digital transistors are those contained in a gate array, and which are used for fabrication of digital devices. The analog amplifier includes an invertor, which contains two cascode amplifiers in series. The analog amplifier also includes a differential amplifier. The invertor is contained within the feedback circuit of the differential amplifier.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 30, 1996
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventor: Harold S. Crafts
  • Patent number: 5530396
    Abstract: An active damping circuit for an electromagnetic interference (EMI) filter for power factor correction (PFC) circuit is provided which simulates a line damping impedance which actively varies according to sensed line current. The active damping circuit comprises an nth-order, Cauer-Chebyshev, low-pass filter having input series damping impedance (Z.sub.d) simulated with a power operational amplifier and high-frequency isolation transformer. The simulated damping impedance offers greatly reduced size and power dissipation as compared to prior art passive schemes which typically require large impedance components for damping. A passive damping circuit is also shown which involves providing an alternate inductive current path in parallel with a damping resistor whereby lower frequency currents are diverted through the alternate current path and higher frequency currents continue to flow through the damping resistor.
    Type: Grant
    Filed: September 19, 1994
    Date of Patent: June 25, 1996
    Assignee: Center for Innovative Technology
    Inventors: Vlatko Vlatkovic, Fred C. Lee, Dusan Borojevic
  • Patent number: 5530399
    Abstract: A transconductance scaling circuit (500) includes an operational transconductance amplifier (504) having a tunable voltage, V.sub.tune2. A feedback loop controls the tunable voltage, V.sub.tune2, in response to the digital programming of the transconductance amplifier (504) and provides the tunable voltage as a current scaling output.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: June 25, 1996
    Assignee: Motorola, Inc.
    Inventors: Mark J. Chambers, James B. Phillips
  • Patent number: 5528191
    Abstract: A logarithmic amplifier includes an operational amplifier, an element for logarithmic conversion purposes connected to a feedback circuit of the operational amplifier, an oscillation prevention circuit having a capacitor connected in parallel with the logarithmic conversion element, and a control circuit for controlling the oscillation prevention circuit in such a way that the amount of feedback by way of the oscillation prevention circuit is reduced as an input current to the operational amplifier becomes smaller. To improve the high-speed response characteristics of the logarithmic operational amplifier, the operational amplifier is made up of a composite amplifier consisting of an FET input type operational amplifier and a bipolar input type operational amplifier.
    Type: Grant
    Filed: September 12, 1995
    Date of Patent: June 18, 1996
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Hiroaki Yasuda
  • Patent number: 5517139
    Abstract: A non-linear circuit includes a first variable resistor one end of which is applied with an input signal, an amplifier whose inverting input is connected to the other end of the first variable resistor and whose non-inverting input is connected to ground, a second variable resistor one end of which is connected to the inverting input of the amplifier, a third variable resistor one end of which is connected to the output of the amplifier and the other end being connected to the other end of the second variable resistor, and a fourth variable resistor one end of which is applied with the input signal and the other end being connected to the third variable resistor.
    Type: Grant
    Filed: February 1, 1995
    Date of Patent: May 14, 1996
    Assignee: Gold Star Electron Co., Ltd.
    Inventors: Ho-sun Chung, Yil-suk Yang
  • Patent number: 5510738
    Abstract: A CMOS programmable resistor-based transconductor receives a differential input voltage and generates a differential output current. The transconductor includes a degenerate pair of transistors linearized by servo feedback, and further includes a string of series-connected resistors defining a group of tap points. Two selected tap points in the resistor string are selected by digital control of MOS switches and are connected, respectively, to the feedback input of the two amplifiers in the feedback loops. Because no DC current flows through the MOS switches into the high impedance inputs of the amplifiers, the differential input voltage is impressed across a portion of the resistor string residing between the two selected tap points, and the conversion gain is determined by the value of this portion of the resistor string.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: April 23, 1996
    Assignee: Lattice Semiconductor Crop.
    Inventors: James L. Gorecki, Yaohua Yang
  • Patent number: 5506527
    Abstract: A common dictionary definition of a "diode" is "any electronic device that restricts current flow chiefly to one direction." This definition covers not only the conventional two lead PN junction semiconductor device presently known in the prior art (referred to herein as a "conventional diode") but also the electronic device of this invention (referred to herein as a "low power diode"). A low power diode has a comparator for comparing the voltage present at the anode and cathode of the diode. When the comparator determines that the voltage present at the anode of the low power diode equals or exceeds the voltage present at the cathode of the low power diode by a predetermined forward voltage, a signal is generated. This signal turns on a transistor acting as a switch, which in turn electronically connects the anode and the cathode of the low power diode together. Unlike conventional diodes that have a forward voltage (dependent on the physical silicon junction property of the diode) of approximately 0.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: April 9, 1996
    Assignee: Hewlett-Packard Compnay
    Inventors: Daniel C. Rudolph, Charles S. Stephens
  • Patent number: 5502416
    Abstract: According to the present invention, an integrated regulator having an adjustable reset threshold is disclosed. The integrated regulator has the following elements contained within an integrated circuit device: a transistor, a voltage reference block, an internal resistive network, an operational amplifier which regulates the voltage output signal of the integrated regulator by regulating the base current of the transistor, and a comparator which senses and communicates to the user when the operational amplifier is unable to maintain the voltage output signal within an acceptable range of a desired value of the voltage output signal. External to the integrated circuit device is an external resistive network. When the reset output signal of the integrated regulator is equal to an active state, this is indicative that the operational amplifier has been unsuccessful in keeping the voltage output signal within the acceptable range of the desired value of the voltage output signal, i.e.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: March 26, 1996
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Giovanni Pietrobon
  • Patent number: 5495200
    Abstract: A biquad switched capacitor filter is preferably utilized as the output filter in a sigma delta digital-to-analog converter. The switched capacitor filter uses a cross-coupled switched capacitor circuit which delivers charge to the capacitors on both phases of the clock. As a result, the sizes of the capacitors can be reduced by a factor of two, while delivering the same charge as a single sampling circuit. By using the cross-coupled switching circuit everywhere in the filter, the sensitivity to capacitor mismatches is substantially reduced. The clock phases applied to the stages of the filter are alternated so that there is a one clock cycle delay around each loop containing two filter stages, thereby insuring the stability of the filter.
    Type: Grant
    Filed: April 6, 1993
    Date of Patent: February 27, 1996
    Assignee: Analog Devices, Inc.
    Inventors: Tom W. Kwan, Paul F. Ferguson, Jr., Wai L. Lee
  • Patent number: 5491437
    Abstract: An amplifier circuit (10) is provided. Amplifier (10) has an amplifier stage (14) that is coupled to control an output stage (18). Output stage (18) includes a sourcing circuit (20) and a sinking circuit (22). Output stage (18) also includes a mirror circuit (42) that is coupled to an output of amplifier stage (14). Output stage (18) also includes a current balancing circuit (30) coupled to mirroring circuit (42) and sourcing circuit (20). Mirroring circuit (42) draws current from balancing circuit (30) in response to a first predetermined output from amplifier stage (14) such that balancing circuit (30) causes an insignificant current to flow in sourcing circuit (20). Thus amplifier (10) operates to sink current from an external load (12). Alternatively, mirroring circuit (42) may draw an insignificant current from balancing circuit (30) in response to a second predetermined output of the amplifier stage (14). This causes a significant current flow in sourcing circuit (20).
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: February 13, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Gabriel A. Rincon, Nicolas Salamina, Marco Corsi
  • Patent number: 5481217
    Abstract: An interface circuit for converting high current output signals provided by a test equipment to corresponding low voltage signals for testing digital relays used in power transmission systems. The high current signal outputs range in value between 0.001 and 26 amperes. The interface circuit includes a current sensing resistor for converting the high current output signal provided by the test equipment to a low voltage signal. The low voltage signal is amplified to the appropriate voltage level to correspond to the test equipment current signal output. The gain of the amplifier is adjustable using a potentiometer to allow the interface circuit to be used with different digital relays having different input signal requirements.
    Type: Grant
    Filed: September 21, 1994
    Date of Patent: January 2, 1996
    Assignee: Houston Industries Incorporated
    Inventor: Dung Hieu Nguyen
  • Patent number: 5479130
    Abstract: A switched-capacitor auto-zero integrator includes and integrator circuit and a correction circuit. The integrator circuit may be any circuit including an operational amplifier having an input line and an output line, an input capacitor coupled to be charged by an Input voltage, an integrating capacitor coupled to the output line, and at least one integrating switch operable during an integrating time interval to connect the input capacitor to the integrating capacitor such that the integrating capacitor is charged to compensate for charge of the input capacitor. The correction circuit includes an offset capacitor coupled to the input line and at least one correction switch operable in an auto-zero sub-interval: and a correction sub-interval.
    Type: Grant
    Filed: February 15, 1994
    Date of Patent: December 26, 1995
    Assignee: Analog Devices, Inc.
    Inventor: Damien McCartney
  • Patent number: 5475339
    Abstract: An op amp circuit utilizes an improved current mirror circuit that includes a first transistor connected to a second transistor such that their sources and gates are commonly connected. A resistive element is connected between the drain and the gate of the first transistor such that a current passing through the second transistor is proportionally related to the current passing through the first transistor and the drain to source voltage of the first transistor accurately tracks the drain to source voltage of the second transistor. The resistive element may be a resistor or a third diode connected transistor. Additional transistors may be added in cascode configuration as needed. The op amp includes an input stage for receiving the differential input and for outputing a modified differential output that is proportional to the differential input.
    Type: Grant
    Filed: May 6, 1994
    Date of Patent: December 12, 1995
    Assignee: National Semiconductor Corporation
    Inventor: Michael X. Maida
  • Patent number: 5471169
    Abstract: The present invention is a closed-loop peak detection circuit comprising switching means, comparing means, control means, two current sources, and a holding capacitor. The switching means selectively provides one of a plurality of input signals to the comparing means. The control means is coupled to the comparing means. The control means receives first and second control signals for selecting one of three modes: reset, peak detect, and hold. First and second current sources are coupled to the control means. A capacitor is coupled to the first and second current sources for generating an output signal. The output signal is feedback coupled to the comparing means. The comparing means determines when one of the plurality of input signals exceeds the output signal. The control means enables and disables the current sources in response to the comparing means and to the first and second control signals.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: November 28, 1995
    Assignee: Silicon Systems, Inc.
    Inventor: Stan Dendinger
  • Patent number: 5436583
    Abstract: A reference period generating circuit is provided which generates a pulse having a width corresponding/to a reference period T.sub.1 in response to the input of a trigger pulse. A switch, a first resistor and a second resistor are connected in series between the first and second reference voltages. The node between the first and second resistors is connected to an inverting terminal of an operational amplifier. A non-inverting terminal thereof is connected to a third reference voltage. A clamping circuit is provided to clamp the output voltage of the operational amplifier to a predetermined value. By comparing the output voltage with a predetermined reference value by means of a comparator, a pulse representative of a timing period is generated.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: July 25, 1995
    Assignees: Rohm Co., Ltd., Teac Corporation
    Inventors: Norio Fujii, Takahiro Sakaguchi
  • Patent number: 5432470
    Abstract: There is disclosed on optoelectronic integrated circuit comprising, a plurality of channels each including an optical receiving device for converting a received optical signal to an electric signal, and an amplifier for amplifying an output signal of the optical receiving device, the channels being integrated on the same semiconductor substrate, electric power source nodes of at least two of the amplifiers of the respective channels being connected to a common electric power source node, and the common electric power source node being connected through a resistor element to an electric source power supply terminal for supplying an electric source power to the channels.
    Type: Grant
    Filed: July 29, 1992
    Date of Patent: July 11, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Goro Sasaki
  • Patent number: 5424663
    Abstract: An integrated high voltage differential sensor which uses the inverse gain of a pair of parasitic JFETs to provide a low power circuit for translating a differential high voltage signal down to a lower voltage level that can be easily sensed by the low voltage control circuitry in a power IC and without the use of a resistive voltage divider. The IC includes, between a first high voltage input and ground, a first series circuit of a first JFET, a first voltage level shifting resistor and a bias current source (I.sub.B). A second series circuit of a reference resistor (R.sub.L), a second JFET, a second voltage level shifting resistor and a bias current source (I.sub.B) is coupled between a second high voltage input and ground. A feedback circuit including an operational amplifier is coupled between a low voltage point of the first series circuit and the gates of both JFETs so as to adjust the bias voltages of the JFETs.
    Type: Grant
    Filed: April 22, 1993
    Date of Patent: June 13, 1995
    Assignee: North American Philips Corporation
    Inventor: Stephen L. Wong
  • Patent number: 5422593
    Abstract: A current-limiting circuit provides prevention of an oscillation phenomenon resulting from a feedback of the current-limiting signal, which is generated by the output of an operational amplifier, to an input of the operational amplifier via a current-mirror element. Gain adjusting elements are connected between a first input terminal of the operational amplifier and the common control terminal, and between the first input terminal and the current-mirror terminal, respectively. The gain adjusting elements' impedance ratio is used to adjust the feedback gain and thereby prevent the oscillation phenomenon. Furthermore, inputting a selected analog voltage into a second input terminal of the operational amplifier maintains the currents constant at two or more desired levels. In addition, a constant voltage source that can be used even with a low power source voltage, and which is suitable for a current-limiting circuit, is provided by connecting a depletion-type MOSFET and an enhancement-type MOSFET in series.
    Type: Grant
    Filed: May 12, 1993
    Date of Patent: June 6, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Tatsuhiko Fujihira
  • Patent number: 5414382
    Abstract: An impedance buffer circuit suitable for monolithic implementation as a capacitive load driver such as required in sample-and-hold circuit applications. This impedance buffer circuit provides the speed of the emitter-follower amplifier and the accuracy of the differential amplifier without the normal output offset, excessive overshoot and ringing or slew rate limitations. An emitter-follower amplifier element is coupled to operate in parallel with a differential amplifier element, which may be optimized for performance over the final 0.7 volt (V.sub.be) portion at each end of the output voltage range.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: May 9, 1995
    Assignee: International Business Machines Corporation
    Inventors: Tony R. Larson, Raymond S. Taylor
  • Patent number: RE35494
    Abstract: An integrated, low-pass filter of the first order made using the switched capacitors technique utilizes advantageously a single switched capacitor and only two switches in contrast to the filters of the prior art which utilize two switched capacitors and four switches. The filter of the invention requires a smaller integration area and moreover exhibits a greater precision of its DC gain.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: April 22, 1997
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventor: Germano Nicollini