Abstract: Gain linearity problems caused by impact ionization in a active MOS device are avoided by connecting an MOS shield device in series with the active MOS device so that the overall supply voltage is split across two devices, keeping both devices in a region of operation well below where impact ionization becomes a significant problem. The gate of the MOS shield device is maintained at a voltage proportional to its drain voltage, thereby keeping the device in the saturation mode and avoiding an abrupt mode change associated with prior art shield circuits.

Abstract: A method of threshold adjust implantation which involves the implanting of some of the PMOS FETs' channels on a CMOS circuit so the PMOS FETs have a threshold voltage of substantially zero volts, the implanting involves an additional implantation of ions into the PMOS FET' channels in addition to the implantation required to raise the PMOS FET' threshold voltage from the native threshold voltage to the normal threshold voltage.

Abstract: A magnetic-field sensor has an array of split-drain transistors connected in parallel, each having a first, a second, and a third drain electrode, and a negative reference current generating transistor. A biasing circuit is utilized to bias the split-drain transistors in the saturated state, and to actuate the negative reference current generating transistor to generate a negative reference current. A first, a second, and a third current mirror are all controlled by a reference voltage. The second current mirror is coupled to the second drain electrode of each of the split-drain transistors to keep the reference voltage at a reference level. The first current mirror is coupled to the first drain electrode of each of the split-drain transistors to generate a first sensed current, and the third current mirror is coupled to the third drain electrode of each of the split-drain transistors to generate a second sensed current.

Abstract: A MOSFET wherein cell includes a MOSFET transistor having a gate connected to an input voltage signal for integration, a source grounded through a high resistance, and a drain connected to a power source. An output capacitor is connected to the source of the MOSFET transistor to complete the MOSFET cell.

Abstract: A DC converter system for providing an output voltage to a load, employing a pulse width modulated switching is disclosed. The system includes a DC input voltage source and a control switch having an ON period and an OFF period. The control switch during the ON period conducts a current responsive to the voltage source. A controller is provided to vary the ON period and the OFF period of the switch, such that the ON period is inversely proportional to the voltage source and the OFF period is inversely proportional to the output voltage.

Abstract: Control voltages are generated so that each transistor in a plurality of parallel connected field effect transistors turns ON with smooth transitions between transistors and in a manner that is relatively insensitive to processing and operating temperature variations.

Abstract: An integrated power device comprises a power transistor (26) and a plurality of sense transistors (38), (40), (42), (44), and (46). Sense transistors (38), (40), (42), and (44) are constructed around the periphery of the active area occupied by power transistor (26). Sense transistor (46) is located within the interior of the active area occupied by power transistor (26) and contact is made to the necessary source region (64) of transistor (46) using a second level of metal interconnect to form a source contact (74).

Abstract: An integrated circuit which includes a pair of serially arranged P channel transistor devices connected with their source and drain terminals in series. The devices are constructed as N well devices in a P substrate. Using a pair of N well devices allows higher voltages to be divided and applied across the two devices without reaching the breakdown limits of either the oxide or the junctions between different portions of the devices used in the process. These devices have been found capable of transferring ten or more volts to circuitry for programming or erasing flash EEPROM cells even the they are a part of integrated circuitry designed for only 3.3 volt usage.

Abstract: An FET mixer circuit having a stable input impedance uses two tandem-connected GaAs MESFET's (1) and (2) of pulse doped structure instead of a conventional MESFET or a HEMT, as an active device. A gate biasing point for the FET (1) is set around a pinch-off point of a mutual conductance, and a gate biasing point for the FET (2) is set in a region which assures non-change of a mutual conductance with respect to the increase of a gate voltage. Thus, a mixer circuit having a good isolation characteristic for an RF signal and a local oscillation signal and exhibits substantially no change in the input impedance is attained.

Abstract: A circuit for providing drive current to a coil of a motor uses a sensefet current sensing device having a sense node and a source node. The source node is connected to deliver current to the coil, wherein a "sense" current proportional to said delivered current is produced on the sense node. An amplifier is connected to sense a voltage between said sense and source nodes to produce an output voltage to force a voltage on the sense node to be the same as a voltage on the source node. A pass element is connected to route said "sense" current to an output node. The circuit produces an output that is suitable for use as a feedback signal in a motor control system.

Abstract: In a GaAs IC using an E/R type DCFL circuit or E/D type DCFL circuit, a Schottky barrier diode is connected between the positive polarity power source of the DCFL circuit and a load element. A deterioration of switching speed is prevented even in case of using a power source voltage of 2 V in the GaAs IC. Addition of the Schottky barrier diode in a super buffer circuit to prevent a slow increase in output voltage in the circuit is also disclosed.