Abstract: An over-current protection circuit for limiting a power current flowing through a switch device, which generates the power current according to a control signal of a control node, is provided. The over current control circuit includes a voltage control circuit, a current sense unit, a conversion circuit, and a control switch. The voltage control circuit provides the control signal to a gate terminal of the switch device according to a limit signal. The current sense unit senses the power current flowing through the switch device to generate a sense voltage. The conversion circuit converts the sense voltage into a conversion voltage. The control switch generates the limit signal according to the conversion voltage.

Abstract: Split gate semiconductor with non-uniform trench oxide. A metal oxide semiconductor field effect transistor (MOSFET) comprises a plurality of parallel trenches. Each such trench comprises a first electrode coupled to a gate terminal of the MOSFET and a second electrode, physically and electrically isolated from the first electrode. The second electrode is beneath the first electrode in the trench. The second electrode includes at least two different widths at different depths below a primary surface of the MOSFET. The trenches may be formed in an epitaxial layer. The epitaxial layer may have a non-uniform doping profile with respect to depth below a primary surface of the MOSFET. The second electrode may be electrically coupled to a source terminal of the MOSFET.

Abstract: Systems, devices, and methods related to or that employ chalcogenide memory components and compositions are described. A memory device, such as a selector device, may be made of a chalcogenide material composition. A chalcogenide material may have a composition that includes one or more elements from the boron group, such as boron, aluminum, gallium, indium, or thallium. A selector device, for instance, may have a composition of selenium, arsenic, and at least one of boron, aluminum, gallium, indium, or thallium. The selector device may also be composed of germanium or silicon, or both. The relative amount of boron, aluminum, gallium, indium, or thallium may affect a threshold voltage of a memory component, and the relative amount may be selected accordingly. A memory component may, for instance have a composition that includes selenium, arsenic, and some combination of germanium, silicon, and at least one of boron, aluminum, gallium, indium, or thallium.

Abstract: A haptic driving apparatus provides a user with electrovibration of certain strength regardless of a variance of a surrounding environment, and an electronic device has a haptic function. The haptic driving apparatus comprises a haptic electrode driver generating a haptic driving signal to supply the generated haptic driving signal to a haptic electrode through a current monitor and varying the haptic driving signal in accordance with voltages at both ends of the current monitor.

Abstract: The invention relates to a motor vehicle component support, in particular a motor vehicle door lock (1), and to a method for the production thereof. Said motor vehicle component support is equipped with a strip conductor structure (3) composed of several strip conductors (7). According to the invention, the strip conductor structure (3) comprises at least two conductor strip sub-structures (3a, 3b) which are electrically interconnected by means of at least one connecting element (8) which is applied later.

Abstract: An electronic safety device for a protection barrier includes a transponder, a transceiver device for receiving a return signal from the transponder, the transponder being movable with respect to the transceiver and adapted to be placed at a current distance, an electric circuit which is switched when the distance is lower or higher than a reference distance and a control and switching system. The transceiver device processes the return signal to generate a control signal with an electric parameter variable in function of the distance. The control signal is a periodic signal with a frequency and has a first spectrum with a middle interval and a second spectrum with lateral intervals shifted with respect the middle interval when the distance is higher than the reference distance, the parameter being associated to a frequency value that comprises either into the middle interval or into one of the lateral intervals.

Abstract: A control circuit for a power converter includes a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is coupled with an output end of the power converter through a resistor. The driving circuit conducts a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit calculates a first difference between the first sampling value and a first reference value, and a second difference between the second sampling value and a second reference value. When the difference between the first difference and the second difference is less than a predetermined value, the signal processing circuit may therefore configure the conduction time or frequency of the switch.

Abstract: The present invention provides embodiments of an apparatus that includes a pad configurable for connection to a voltage source that provides a first voltage and a buffer connected to the pad. The buffer includes a plurality of transistors that have nominal breakdown voltages that are less than the first voltage. The buffer is configured to maintain voltage differentials on the plurality of transistors that are less than the break-down voltage of the plurality of transistors during pull-down of a pad voltage from the first voltage to a selected low voltage level or during pull-up of the pad voltage from the selected low voltage level to the first voltage.

Abstract: An equivalent circuit includes: a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; a second transistor having a second gate electrode, a second drain electrode, and a second source electrode electrically connected to the first drain electrode; and a charging and discharging circuit which includes a first capacitor having a terminal electrically connected to the second gate electrode and another terminal electrically connected to the second source electrode, and charges and discharges the first capacitor with predetermined time constants.

Abstract: A control circuit for a power converter is disclosed, having a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is used for coupling with an output end of the power converter through a resistor. The driving circuit is used for conducting a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. When the difference between the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to adjust at least one of the conduction time and the conduction frequency of the switch according to an output signal of the power converter received from the shared pin.

Abstract: An identifying circuit is connected between a Universal Serial Bus (USB) interface and a controller. The identifying circuit includes first to fourth electronic switches. When a power adapter connects to the USB interface, the first and fourth electronic switches are not turned on, and the second and third electronic switches are turned on. An identification pin of the controller receives a low level signal and determines that the power adapter connects to the USB interface. When a computer connects to the USB interface, the first and fourth electronic switches are turned on, and the second and third electronic switches are not turned on. The identification pin receives a high level signal and determines that the computer is connected to the USB interface.

Abstract: The present invention relates to a polysilicon resistor, a reference voltage circuit including the same, and a method for manufacturing the polysilicon resistor. The polysilicon resistor according includes a first polysilicon resistor and at least one of second polysilicon resistors, coupled to the first polysilicon resistor in series. The first polysilicon resistor and the at least one of the second polysilicon resistors are P-type polysilicon, and a doping concentration of the first polysilicon resistor is different from a doping concentration of the at least one of the second polysilicon resistors. The polysilicon resistor formed by serially coupling the first polysilicon resistor and the at least one of the second polysilicon resistors is applied with a constant current such that a reference voltage or a constant voltage is generated.

Abstract: A circuit for generating a reference voltage includes a first transistor configured to receive a reference system voltage, the first transistor configured as a current source, the first transistor configured to provide a current independent of the system voltage, a plurality of diode devices configured to receive the current provided by the first transistor, and a second transistor associated with the plurality of diode devices, the second transistor configured to compensate for process variations in the first transistor, such that the plurality of diode devices provides a reference voltage that is at least partially compensated for the process variations.

Abstract: A transmission channel configured to transmit high-voltage pulses and to receive echoes of the high-voltage pulses includes a high voltage buffer, a voltage clamp and a switch. The voltage clamp may include clamping transistors and switching off transistors coupled together in series with body diodes in anti-series. The transmission channel may include a reset circuit configured to bias the transmission channel between pulses. The switch may include a bootstrap circuit.

Abstract: Provided is a fully differential adaptive bandwidth phase locked loop with differential supply regulation. One fully differential phase locked loop includes a differential active loop filter and regulator coupled to an output of a differential charge pump, a differential voltage-controlled oscillator coupled to differential control voltages developed by the differential active loop filter and regulator, and a bias circuit coupled to the differential control voltages and providing a bias current to the differential charge pump.

Abstract: A communication device includes a first JK flip-flop (FF) outputting a first output signal in response to a first input signal at a J-input and a reversed signal of the first input signal at a K-input, and a second JK FF outputting a second output signal in response to a second input signal at a J-input and a reversed signal of the second input signal at a K-input. A clock input to a NAND gate (12) is replaced by a reversed signal of a Q-output of the second JK FF. A clock input to a NAND gate (13) is replaced by the reversed signal of the second input signal. A clock input to a NAND gate (22) is replaced by a reversed signal of a Q-output of the first JK FF. A clock input to a NAND gate (23) is replaced by the reversed signal of the first input signal.

Abstract: This disclosure describes systems, methods, and apparatuses for impedance-matching radio frequency power transmitted from a radio frequency generator to a plasma load in a semiconductor processing chamber. Impedance-matching can be performed via a match network having a variable-reactance circuit. The variable-reactance circuit can comprise one or more reactive elements all connected to a first terminal and selectively shorted to a second terminal via a switch. The switch can comprise a bipolar junction transistor (BJT) or insulated gate bipolar transistor (IGBT) controlled via bias circuitry. In an on-state, the BJT base-emitter junction is forward biased, and AC is conducted between a collector terminal and a base terminal. Thus, AC passes through the BJT primarily from collector to base rather than from collector to emitter. Furthermore, the classic match network topology used with vacuum variable capacitors can be modified such that voltages do not overload the BJT's in the modified topology.

Abstract: An electronic circuit apparatus for compensating for a process variation of a resistor in an electronic circuit is provided. The electronic circuit includes a detecting part for generating a tune voltage corresponding to a process variation value of the at least one resistor, and a compensating part for compensating for a process variation of the at least one resistor using the tune voltage.

Abstract: A PLL circuit includes a phase detector, a loop filter (LF), a voltage-controlled oscillator (VCO), and a frequency divider. The phase detector compares a phase of a signal Fs which is input from outside with a phase of a signal Fo/N which is input from the frequency divider. The loop filter generates a signal Vin by removing alternating current components from a signal input from the phase detector. The voltage-controlled oscillator outputs a signal Fo based on the signal Vin input from the loop filter. The frequency divider converts the signal Fo output from the voltage-controlled oscillator into Fo/N (frequency division by N), and outputs it to the phase detector.

Abstract: Described is a method for operating a power semiconductor component. A power amplifier provided with a programmable logic is assigned to this power semiconductor component. In at least one embodiment, control signals for the power semiconductor component are transmitted to the power amplifier. The power semiconductor component is influenced by the power amplifier in dependence on these control signals. The type and manner in which the power semiconductor component is influenced is determined by the programming of the logic. The power amplifier can be sent programming signals which are then processed by a processor of the power amplifier. The programming of the logic is changed by the processor in dependence on the programming signals.

Abstract: A circuit having a plurality of parallel-connected partial circuits for feeding an inverter circuit. A partial circuit comprises an unregulated voltage source with a temporally variable output DC voltage and a synchronous converter having an automatically functioning regulating circuit. The circuit is triggered according to two modes of operation. The first mode of operation is as an upward converter, when the value of the output voltage of the unregulated voltage source exceeds a threshold value, and thus the inverter circuit is supplied with the requisite input voltage. The second mode of operation is as a downward converter, when the value of an output voltage of the unregulated voltage source is below a threshold value, or when there is no output voltage from the unregulated voltage source, in which case a first capacitor is charged from the DC voltage applied to the second terminals.

Abstract: Aspects of the invention are related to a power semiconductor module applied to a multi-level converter circuit with three or more levels of voltage waveform. Aspects of the invention can include a first IGBT to which a diode is reverse parallel connected and a second IGBT having reverse blocking voltage whose emitter is connected to the emitter of the first IGBT are housed in one package, and each of the collector of the first IGBT, the collector of the second IGBT, and the connection points of the emitter of the first IGBT and the emitter of the second IGBT, is an external terminal.

Abstract: A circuit including a first transistor group and a second transistor group. The transistor groups are connected such that they are arranged to be fed with at least one input signal, and such that they are arranged to output at least two currents. At least two transistors are arranged to be biased in such a way that desired signal paths are obtained in the circuit, such that a desired output current ratio is obtained.

Abstract: A communication device includes a first JK flip-flop (FF) outputting a first output signal in response to a first input signal at a J-input and a reversed signal of the first input signal at a K-input, and a second JK FF outputting a second output signal in response to a second input signal at a J-input and a reversed signal of the second input signal at a K-input. A clock input to a NAND gate (12) is replaced by a reversed signal of a Q-output of the second JK FF. A clock input to a NAND gate (13) is replaced by the reversed signal of the second input signal. A clock input to a NAND gate (22) is replaced by a reversed signal of a Q-output of the first JK FF. A clock input to a NAND gate (23) is replaced by the reversed signal of the first input signal.

Abstract: A device and method for coupling two parts of a dc network, in which at least two capacitors respectively are installed, particularly onboard an aircraft. The device includes at least one static converter including at least one electronic coupling device, including at least one transistor and one diode, associated with an inductance, arranged between these at least two capacitors.

Abstract: MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals.

Abstract: Apparatus and methods for providing multi-mode clock signals are disclosed. In some embodiments, a multi-mode driver configured to receive a first clock signal, and to selectively output a different clock signal in response to one or more signals from a controller is provided. The driver can include an H-bridge circuit without substantial increases in the size of the design area. Advantageously, lower jitter and improved impedance matching can be accomplished.

Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.

Abstract: An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.

Abstract: A circuit (1-2) for compensating for variations in the current gain ? of a sensing transistor (Q1) having a collector coupled to a reference voltage (GND) includes a first current mirror (20) having an input coupled to a base of the sensing transistor. A second current mirror (21) has an input coupled to an output of the first current mirror. A current source (13) is coupled to provide emitter current for the sensing transistor. An output of the second current mirror circuit (21) feeds base current of the sensing transistor back to its emitter to cause the collector current of the sensing transistor to be precisely equal to the current (I1) provided by the current source.

Abstract: A vertical-current-flow device includes a trench which includes an insulated gate and which extends down into first-conductivity-type semiconductor material. A phosphosilicate glass layer is positioned above the insulated gate and a polysilicon layer is positioned above the polysilicate glass layer. Source and body diffusions of opposite conductivity types are positioned adjacent to a sidewall of the trench. A drift region is positioned to receive majority carriers which have been injected by the source, and which have passed through the body diffusion. A drain region is positioned to receive majority carriers which have passed through the drift region. The gate is capacitively coupled to control inversion of a portion of the body region. As an alternative, a dielectric layer may be used in place of the doped glass where permanent charge is positioned in the dielectric layer.

Abstract: A method of applying a wire voltage to a semiconductor device including a plurality of active regions and a field region insulating the plurality of active regions, wherein the field region includes a plurality of wires. The method includes applying an operating voltage required for an operation of the semiconductor device to at least one of the plurality of wires, and applying a voltage lower than the operating voltage to a wire adjacent to at least one of the plurality of active regions from among the plurality of wires. Thus, leakage current caused by an imaginary parasitic transistor due to a wire of the field region may be prevented.

Abstract: Conventional diode rectifiers usually suffer from a higher conduction loss. The present invention discloses a gate-controlled rectifier, which comprises a line voltage polarity detection circuit, a constant voltage source, a driving circuit and a gate-controlled transistor. The line voltage polarity detection circuit detects the polarity of the line voltage and controls the driving circuit to turn on or turn off the gate-controlled transistor. The gate-controlled transistor may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with a gate, a source and a drain or an Insulated Gate Bipolar Transistor (IGBT) with a gate, an emitter and a collector. The constant voltage source is provided or induced by external circuits and referred to the source of the MOSFET or the emitter of the IGBT. Thanks to a lower conduction loss, this gate-controlled rectifier can be applied to rectification circuits to increase the rectification efficiency.

Abstract: A power supply device comprises a driver circuit, a transistor switch, and a first transistor. The driver circuit is configured to provide a stable driving signal and a floating driving signal. The transistor switch has a first terminal, a second terminal connected to a first terminal of the driver circuit, and a third terminal connected to a second terminal of the driver circuit, and is configured to prevent a reverse current based on the floating driving signal. The first transistor has a first current electrode connected to the first terminal of the transistor switch, a second current electrode connected to the first voltage reference, and a control electrode connected to the third terminal of the driver circuit, and is configured to activate and deactivate based on the stable driving signal, and further configured to regulate an input voltage to a substantially constant direct current output voltage.

Abstract: The invention relates to a method and a corresponding circuit for protecting a power MOSFET from thermal overload when switching the MOSFET off and on, wherein the MOSFET is switched on again after at least a determined off-period has passed.

Abstract: In a lighting ballast there are typically several discrete components that combine to take an external AC signal and convert it to a DC signal, and back to an AC signal for powering a lamp. Several of these components can be housed on an application specific integrated circuit. By placing switching transistors (20, 22) their companion diodes (34, 36), and a rectifying circuit (52) on a monolithic integrated circuit (60), the ballast circuit as a whole is made more reliable and robust and can be manufactured at a lower cost than if discrete components had been used.

Abstract: A design structure embodied in a machine readable medium used in a design process includes a voltage divider device, including a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region; the first and second gates configured to have an input voltage coupled thereacross; and at least one of a source of the FET and a drain of the FET configured to have an output voltage taken therefrom; wherein the output voltage represents a divided voltage with respect to the input voltage.

Abstract: A magneto-resistance transistor including a magneto-resistant element which may function as an emitter and a passive element which may function as a collector. The base may be interposed between the passive element and the magneto-resistant element, thereby coupling the passive element with the magneto-resistant element. A magnetic field of a given strength may be applied to at least a portion of the magneto-resistant transistor, the given strength determining a resistance in the at least a portion of the magneto-resistant transistor. Thus, by adjusting the given strength of the magnetic field, the resistance may be adjusted. Therefore, different emitter current inputs may be achieved with a fixed voltage. Further, a base current may vary with a controlled variation of the emitter current input.

Abstract: One embodiment of the invention includes a power driver system. The power driver system comprises a power transistor that is activated to provide power to a load and a switching circuit configured to control the power transistor based on a control signal. The power driver system further comprises a control circuit configured to detect a flyback current from the load upon deactivation of the power transistor and to cause the switching circuit to steer the flyback current from a first flyback current path to a second flyback current path in response to detecting the flyback current path. The second flyback current path can have an impedance that is greater than the first flyback current path.

Abstract: In accordance with the present invention, the active rectifier is a circuit which directly takes the place of a passive rectifier by using a switching module (or simply a device in cases where a single device is used) controlled by a sensing circuit. Where passive devices have a single knee value determined by the physical properties of the semi-conductive material being used, the active circuit can be designed to a range of knee voltages and other performance criterion. Additional flexibility is available to the designer through the active rectifiers ability to allow for manipulation of the curve of response from the circuit in the knee region. Flexibility both in production, in designs, and in characteristics make the active rectifier highly valuable for engineering firms designing larger electronic circuits.

Abstract: Transistor devices are provided configured to operate at frequencies above a typical first cutoff frequency. In one aspect, a method is provided for configuring a transistor device to operate above a first cutoff frequency. The method comprises selecting a desired operating frequency range and a desired output power for a transistor associated with the transistor device, analyzing the effects of phase velocity mismatch on the overall gain of a plurality of different sized transistors, and evaluating the primary and secondary gain regions of the plurality of different sized transistors. The method further comprises selecting a transistor sized to provide the desired output power at or close to the desired operating frequency range based on the analysis of the phase velocity mismatch and the evaluation of the primary and secondary gain regions.

Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.

Abstract: Parasitic coupling effects between RF or microwave transistors provided in a common package are compensated by connecting one or more capacitors between the transistors. By connecting the capacitor(s) at a location that corresponds to the site of the coupling, the compensation is effective over a wide frequency band. This coupling-compensation makes it feasible to provide, in a common package, RF or microwave transistors intended to operate in quadrature, thereby improving performance matching and operating efficiency of the overall device.

Abstract: Disclosed is a method of controlling a High Electron Mobility Transistor (HEMT) through a cascode circuit, the cascode circuit including first and second switches, a capacitor connected to a source of the first switch, a source of the HEMT being connected to the drain of the first switch, and a controller for controlling the first and second switches. The method is achieved by defining state A, where the first switch is controlled to be OFF resulting in the HEMT being OFF and the second switch is controlled to be ON allowing the capacitor to be charged and stabilizing the drain voltage of the HEMT at around the HEMT gate threshold voltage. The method further defines state B, where the first switch is controlled to be ON resulting in the HEMT being ON and the second switch is controlled to be OFF almost all the time, thereby preserving the charge stored in the capacitor.

Abstract: Optical coupling device operates over a bidirectional data link between at least first and second communicators, each communicating data along a common wire of the data link. The device includes at least first and second optical couplers, each including a photon flux source and a photon flux detector. The photon flux source of the first and second optical couplers, respectively, is commanded by the first and second communicator, respectively. The photon flux detector of the first and second optical coupler, respectively, produces a signal on the data link at the first and second communicator, respectively, in response to the photon flux source of the second and first optical coupler, respectively, from the second and first communicator, respectively. An inhibitor inhibits the photon flux source of the second and first optical coupler, respectively, in response to an activation of the photon flux source of the first and second optical coupler, respectively.

Abstract: Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components with enhanced active devices which incorporate local negative feedback. One embodiment of the invention is a transconductance enhancement circuit that improves transconductance and input impedance relative to the prior art. A further development is an enhanced active cascode circuit that provides improved linearity. A high frequency bipolar transistor switch is also disclosed that incorporates lateral PNP transistors as high frequency switches with improved OFF-state to ON-state impedance ratio to realize a variable gain function.

Abstract: A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.

Abstract: Variable gain amplifiers offering high frequency response with improved linearity and reduced power dissipation are provided. An amplifier is disclosed that is constructed from a one-stage topology with multiple signal paths and compensation networks for improved linearity and stable operation. In this amplifier, improved performance is obtained by replacing single transistor components with enhanced active devices which incorporate local negative feedback. One embodiment of the invention is a transconductance enhancement circuit that improves transconductance and input impedance relative to the prior art. A further development is an enhanced active cascode circuit that provides improved linearity. A high frequency bipolar transistor switch is also disclosed that incorporates lateral PNP transistors as high frequency switches with improved OFF-state to ON-state impedance ratio to realize a variable gain function.

Abstract: An amplifier circuit includes a circuit input, and a circuit output. An inverter, including first and second MOS transistors is connected between first and second supply voltages, and has an inverter input connected to the circuit input, and an inverter output, which provides an inverter output current corresponding to a circuit input voltage. A first resistive element comprises a third MOS transistor and a fourth MOS transistor of opposite conductivity types, and each having their gate and drain terminals connected to the inverter output and the circuit output, and having their respective source terminals connected to respective ones of the first and second supply voltages. A second resistive element includes a fifth MOS transistor and a sixth MOS transistor of opposite conductivity types, and each having its drain-source path connected between the circuit output and the circuit input, and having its gate connected to a respective voltage source.

Abstract: At least one single-electron transistor is provided in a circuit configuration having single-electron components, and is connected between a first main node and a second main node. The first main node is capacitively connected between a first operating voltage connection and a second operating voltage connection. The gate electrode of the single-electron transistor is connected to a control voltage connection. The circuit configuration is suitable for logic operations on binary numbers, whose digits are stored at the first and second main nodes.