Abstract: An RDS signal is binarized by a comparator (2) and the output is sampled by a regeneration clock in synchronism with a regeneration carrier to provide sampled data. Then, by means of an accumulator (an adder 6 and a D-FF7) or a low pass filter (12), an integration result of the sampled output is obtained for each biphase symbol and by means of a biphase decoder circuit (9), the integration results are subjected to a subtraction between two symbols making up a pair. A differentially coded RDS data can be obtained using the sign of the subtraction result, which is differentially decoded in a differential decoder circuit (11) to provide an RDS data. In addition, the absolute value of the subtraction result is compared with a predetermined threshold value to provide reliability data for each differentially coded RDS data using the comparison result. The lower one of the consecutive reliability data may be assumed to be the reliability data for the RDS data.

Abstract: A phase detecting method and associated apparatus for use in a digital vestigial sideband modulation communication device. The phase detecting method has the steps of: digital-filtering I channel data applied from the exterior to restore Q channel data; compensating for a phase of the I and Q channel data by a prescribed phase error value; estimating an I channel level value which approximates the I channel data from the phase-compensated I channel data; and obtaining a difference between the phase-compensated I channel data and the estimated I channel level value, and generating as the phase error value an operation value obtained by multiplying the difference by a sign of the Q channel data.

Abstract: A system and method for demodulating digital information from a modulated signal that can be represented in a signal space diagram as an odd constellation of sample points. The system comprises filtering means for receiving the modulated signal that includes means for rotating the received sample points 45.degree. clockwise on the signal space diagram such that decision or neighborhood regions can be drawn having borders that are either parallel or perpendicular to the axes of the signal space diagram. As a result, a slicer can easily extract the symbol information from the rotated sample points with a minimum of computational complexity. Moreover, and perhaps most importantly, the rotation is accomplished through a one time modification of the tap coefficients used by the filtering means thus eliminating any additional processor real time required to perform the rotation.

Abstract: A phase decision circuit that can reduce the memory capacity of a ROM forming a look-up table. The quadrant decision section judges the quadrant to which an input signal belongs. The address conversion section converts the I-component digital signal and the Q-component digital signal of an input signal into address data based on the quadrant data. The phase angle data is read out of the ROM look-up table based on the converted address data so that the memory capacity of a ROM forming the ROM look-up table can be reduced to 1/8 of that of the conventional table, for example, in the QPSK modulation.

Abstract: A modulation/demodulation system and method comprising transmitting structure having first and second PN generators which produce distinct, synchronized, first and second PN sequences. A tapped delay line generates a plurality of symbols from the second PN sequence, each symbol corresponding to an offset of the second PN sequence by one or more chips from the epoch of the first PN sequence. A plurality of output taps are associated with the tapped delay line, with each tap corresponding to one of the symbols. A symbol selection device associated with the output taps selects from amongst the symbols based upon one or more message signal bits. The selected symbols and first PN sequence are applied to separate channels of a modulator to modulate a carrier signal. At a destination, first and second local PN generators generate first and second PN sequences which correspond to the first and second PN sequences in the transmitting structure.

Abstract: Parasitic feedback is prevented in a transmitter, a modulator, or a demodulator from having an interfering influence on the circuit section that generates the mixed frequency. The circuit has a main oscillator and a subordinate oscillator connected downstream of the main oscillator. The main oscillator generates a signal having an x.sup.th harmonic that serves to excite the subordinate oscillator. Furthermore, a frequency divider is connected downstream of the subordinate oscillator. The frequency divider divides the frequency of an output signal of the subordinate oscillator by an integer divider value. The divider value differs from the value x.

Abstract: A demodulation arrangement is disclosed which comprises a mixing circuit for deriving in-phase (I) and quadrature (Q) signals in a digital form from a received signal. The I and Q signals can then be input to a look-up table configured to output at least a data output value corresponding to a symbol constellation point and a corresponding phase output value, both selectable using. A phase processor is arranged to receive the phase output value and to calculate a phase angle value of the received signal. The phase angle value is returned as a further input to the look-up table to supplement the I and Q signals for selection of at least the data output value.

Abstract: To provide a QAM signal receiver wherein the phase distortion derived from frequency conversion into IF signal is corrected in accordance with selection of an RF channel to be received, the QAM signal receiver comprises a first and a second pre-equalizer (9 and 10) made of transversal filters for processing an in-phase and a quadrature-phase digital signal obtained from the QAM signal; a first and a second equalizer controller (12 and 13) for selecting tap gains to be applied to the first and the second pre-equalizer (9 and 10) in synchronization with selection of the RF channel according to a channel-selection signal for controlling a freqency converter (2).

Abstract: A method and apparatus for determining initial carrier and symbol phase estimates in a burst mode digital communication system are described. In-phase and quadrature sample of a BPSK preamble are sampled to obtain correlation values. Next, sum and differences of the correlation values are obtained. Then the initial carrier phase estimate (THETAHAT) and the initial symbol phase estimate (TAUHAT) are obtained through application of an algorithm. The apparatus that implements the method consists of adders, inverters, arc tangent look-up tables and divide by 2 logic units.

Abstract: A digital broadcast receiver for receiving a digital modulation signal of the present invention includes channel selection means inputting a digital modulation signal of a radio frequency band and frequency converting a desired digital modulation signal into a designated intermediate frequency signal; oscillation means for generating a local oscillation signal used for frequency conversion at the channel selection means; oscillation frequency control means for controlling a frequency of the local oscillation signal at the oscillation means; phase noise characteristic control means for improving a phase noise characteristic of the local oscillation signal generated at the oscillation means; filter means for extracting the intermediate frequency signal selected at channel selection means; orthogonal detection means for orthogonally detecting the intermediate frequency signal extracted at the filter means; A/D converter means for converting the analog output of the orthogonal detection means into a digital signa

Abstract: A method and an apparatus for generating an error estimate as input for an error recovery loop of a demodulator which receives an offset quadrature phase shift keyed (OQPSK) signal having a symbol interval. The method comprises the following operations: (a) receiving at least four consecutive complex samples z.sub.-1/2, z.sub.0, z.sub.1/2 and z.sub.1 obtained by sampling the OQPSK signal at half the symbol interval; and (b) computing the error estimate based on the complex samples z.sub.-.sub.1/2, z.sub.0, z.sub.1/2 and z.sub.1.

Abstract: A method for demodulating a radio frequency signal having a frequency, by oscillating a demodulator at a frequency different from the signal frequency, and measuring a DC offset value at this different frequency, the DC offset value being associated with interference. Then the demodulator is oscillated at the signal, thereby providing a demodulated signal. The DC offset value is subtracted from the demodulated signal in order to provide a demodulated signal with a substantially reduced DC component. The demodulated signal is then monitored for further DC offset components, and these further DC offset components are subtracted from the demodulated signal.

Abstract: A method, and related apparatus, for coherently demodulating phase-modulated data which is coherently transmitted (i.e., without the use of differential encoding of the data) on Rician fading channels. The method uses phase unwrapping and phase interpolation, in conjunction with block phase estimation, to achieve a performance comparable with coherent detection of coherently transmitted data while reducing processing requirements.

Abstract: Various modem designs are described, along with systems that use the modem designs for communicating data between a large number of remote locations and one or more central locations preferably over CATV. One aspect features a modem having a transmitter which uses a state machine and digital waveform signals stored in a memory to create a modulated signal. Another aspect features a modem having a receiver which uses a digital correlator including an SRAM for detecting a bipolar phase shift keyed signal. Still another aspect features a modem comprising an oscillator circuit having a feedback loop, wherein the feedback loop utilizes a downlink signal, and a protection circuit which prevents a malfunction in the modem from causing system-wide shutdown.

Abstract: A Vestigal Sideband (VSB) demodulator having a clock generator for generating a clock signal based on a symbol frequency of the VSB signal; an A/D converter for converting the VSB signal into a digital signal based on the clock signal of the clock generator; a first multiplier for multiplying the digital signal by a first value sequence and generating a first multiplier output signal; a second multiplier for multiplying the digital signal by a second value sequence and generating a second multiplier output signal; a complex type filter for shaping and VSB demodulation of the multiplier output signals and generating Inphase and Quadrature data output signals; a decimating circuit for decimating the Inphase and Quadrature data output signals and generating decimated signals; a complex multiplier for multiplying the decimated signals by a predetermined value and generating multiplied output signals; an error detector for detecting a frequency deviation and a phase deviation from the multiplied output signals and

Abstract: A four-stage phase demodulation low frequency wireless mouse device is disclosed, improving a shortcoming of a conventional low frequency wireless mouse device which can not effectively overcome the signal interference and prevent the misoperations by only using I and Q axes or a quadrature demodulation method and the present invention installs a phase demodulation circuit on a receiving end for generating four sets of phase signals each having a phase of 0.degree., 90.degree., 180.degree. and 270.degree. respectively. Then, each of the quadrature signals is sent into a microprocessor for processing to become a computer interfacing signal after passing through a low pass filter, a detecting circuit and a voltage comparator respectively so that the signal interference is effectively eliminated, the misoperation is obviated and the reaction speed of the signal is enhanced due to a low error rate.

Abstract: A clock recovery circuit includes an A/D converter and samples sampled signals from a received signal of a modulation rate depending on a sampling clock signal with a frequency twice the predetermined modulation rate. An amplitude detector detects an amplitude of a first sampled signal and an amplitude of a second sampled signal following the first samples signal. By comparing the amplitudes of the first and second sampled signals, a smaller one of the first and second sampled signals is selected. A phase of the sampling clock signal is controlled so that the amplitude of the smaller signal is minimized.

Abstract: A digital communications DQPSK passband detector having a matched filter, a differential decoder, and a slicer that use elementary circuit components. In the matched filter, recovered carrier reference signals are fed along with the received signal to a pair of XNOR gates. This arrangement effectively results in a multiplication operation without any complex circuit elements. The outputs of the XNOR gates control the direction of counting of a pair of binary counters that generate correlated values of the I and Q components in the received signal. Thus, the integrate/dump circuits of a conventional matched filter are replaced with simpler digital counters. A digital differential decoder to extract the phase difference information between two consecutive received symbols is built from a network of delay elements, multipliers, and adders to recover the phase data.

Abstract: In a digital demodulation apparatus of a QPSK receiver which demodulates an input signal being modulated in the QPSK method by separating into an I (In Phase) channel signal and a Q (Quadrature) channel signal by a local carrier which is synchronized with the transmitter, A .pi.

Abstract: In a demodulating method of demodulating amplitude-demodulated signals in an amplitude phase shift keying system for conducting an amplitude modulation by setting signal points as information codes on a complex plane representing a signal space of transmission signals onto circumferences of two concentric circles including a first circle having a first diameter and a second circle having a second diameter smaller than the first diameter on the complex plane, there are obtained, in accordance with an amplitude value of an amplitude component of each symbol of a received amplitude-modulated signal, a first threshold value and a second threshold value having a predetermined relationship with the amplitude value.

Abstract: In a modem signal transmitting/receiving system which includes a modem signal transmitter and a modem signal receiver connected to each other via a transmission line, a modem signal transmitter is suitable to transmit by multiplexing an analog signal such as audio and a modem carrier with digital data. Analog signals and digital data can be multiplex-transmitted at a high rate by effectively using an analog signal line. The modem signal transmitter includes a modem transmitting unit, an analog/digital converting unit which converts an analog signal into a digital signal, a demodulating unit which demodulates the digital signal with a predetermined carrier frequency signal, a decimation processing filter which decimates the demodulated signal and a deciding unit which decides a coordinate on a two-dimensional plane for the output from the decimation processing filter and then inputs the decision result to the modem transmitting unit.

Abstract: Level-holding circuits 16, 17 sample and hold the output of quadrature detecting circuit 11 at adjoining apertures of eye patterns of demodulated multi-level QAM signal components and at the middle point of the adjoining apertures, respectively. Thus, location information on a phase plane of demodulated signal such as (I0, Q0), (I1, Q1), and (I1/2, Q1/2) are obtained. Frequency deviation detecting circuit 18 calculates the amplitude and the direction of the frequency deviation of regenerated carrier based on the location information. The output of frequency deviation detecting circuit 18 is added to phase error signal in synthesizing circuit 20. The result of addition is applied to VCO 15.

Abstract: A digital demodulator compensates for frequency offset between modulated and unmodulated carrier signals by detecting the frequency offset during a preamble with a known modulation pattern. Samples obtained during the preamble are stored in a memory during clock recovery, and read from the memory after the recovered clock signal has become stable. Phase offset is detected from a histogram of the phase differences between the two carrier signals, calculated modulo a certain phase angle, and compensation for phase offset is applied. The maximum histogram value is found by comparisons made according to a single-elimination tournament plan. In a diversity receiver, the maximum histogram value is used to select the output data.

Abstract: A demodulator using quasi-synchronous detection to demodulate modulated quadrature input signals. The demodulator has a quasi-synchronous detector detecting a modulated quadrature input signal using an output signal of a fixed frequency from a local oscillator, an equalizer equalizing a quadrature channel signal which is a digital signal converted from the detected quadrature signal from the quasi-synchronous detector, and a phase rotator rotating the phase of the equalized quadrature channel signal output from the equalizer. Furthermore, the demodulator has an equalization control unit to generate a tap factor for the equalizer from the quadrature channel signal equalized by the equalizer, using a signal having substantially the same phase as the input-output signals of the equalizer.

Abstract: Disclosed is a demodulating apparatus for preventing a reduction in reliability of demodulated data even if a signal point of a multi-level QAM signal is detected, because of influence from fading or noises, in a position where such a signal is not normally existent. To this end, a modulated signal modulated by a multi-level QAM modulation system is orthogonally detected, and analog signals of I and Q channels placed in an orthogonal relationship with each other are outputted. By an identification device, the analog demodulated signals are digitized and then outputted as digital demodulated signals of I and Q channels. If a signal point outside a normal signal point arrangement is detected among the outputs, a digital demodulated signal within a normal signal point arrangement is substituted for the detected signal and then original code data is reproduced.

Abstract: To control the oscillation frequency of a local oscillator, a digital broadcast receiver demodulates a phase-reference symbol contained in an orthogonal frequency-division multiplexed broadcast signal, modifies the resulting frequency-domain data by multiplication with complex conjugates of known data encoded in the phase-reference signal, under different assumed frequency offsets, converts the modified data to time-domain data, and thereby detects a first frequency error equal to a multiple of the subcarrier spacing and a second frequency error not exceeding the subcarrier spacing. Differential phase error is also detected. The oscillation frequency is adjusted to correct the first frequency error and differential phase error; then the second frequency error is used to correct for ambiguity in the differential phase error.

Abstract: A system and method for synchronizing a Costas Loop for demodulating a received spread-spectrum signal having data and a first arbitrary phase angle, .phi.(t), using a phase detector, a phase unwrapping subsystem, an oscillator, a derotator and a decision device. A second arbitrary phase angle, .theta.(t), is generated from an in-phase component and a quadrature-phase component of the received spread-spectrum signal. The second arbitrary phase angle, .theta.(t), is proportional to the first arbitrary phase angle, .phi.(t). A value of .theta. proportional to .theta.(t) is then estimated. The estimated .theta. value is processed to obtain an estimate for the .phi.value, and a cosine and a sine of the estimated .phi. value are generated by the oscillator. The derotator derotates the in-phase-component and the quadrature-phase component of the received spread-spectrum signal with the cosine and the sine of the estimated .theta. value to generate a demodulated signal.

Abstract: Known is a zero intermediate frequency receiver or zero-IF receiver in which DC-offset correction is done in the I- and Q-paths, after mixing down of the received RF-signal or of an IF-signal. Such a DC-offset correction is not sufficient for high gain I- and Q-paths, particularly not in pagers for receiving long messages. Furthermore, no optimal power saving is achieved if such a receiver alternately operates in receive mode and sleep mode. A zero intermediate frequency receiver is proposed in which DC-offset correction is distributed over the high gain I- and Q-path. Preferably, blocking means are provided between DC-offset correction circuits and low pass filters in the I- and Q-path to prevent that an output signal of an upstream DC-offset correction circuit in the path excites a downstream low pass filter in the path during DC-offset correction. Herewith, considerable power savings are achieved.

Abstract: Apparatus and method for estimating the angle-modulation imposed on a transmitted Radio Frequency (RF) or Intermediate Frequency (IF) carrier. The method estimates angle-modulation when communications channels add distortions such as noise to transmitted signals. The system provides reconstituted frequency modulation from a feedforward demodulator. The goal is to reduce the modulation index of a desired signal and to employ a narrower band-pass filter that passes this signal while rejecting the distortion that accompanies it. A plurality of stages, 1 through M, exist within the system. Stages 2 through M contain the same components, although filter coefficients and alignment delays may differ from stage to stage. Stage 1 of the demodulator differs slightly from the remaining stages, since the only input required by Stage 1 is a complex envelope signal that contains both the desired signal and the distortion added by the channel.

Abstract: A method and apparatus for estimating a carrier frequency of an incoming signal. The carrier frequency estimator determines the phase difference between the phases for two successive modulation symbols when the two successive modulation symbols are within a particular magnitude range having at least two evenly spaced modulation phase states. The carrier frequency estimator includes a magnitude selector for selecting modulation symbols within the particular magnitude range and a phase subtractor coupled to the magnitude selector for determining phase differences between the successive modulation symbol phases. A signal receiver of the present invention uses the phase differences for tuning a locally generated frequency for tracking a carrier frequency of an incoming radio frequency (RF) signal.

Abstract: A DBS receiver front end which converts the received signal directly to the baseband representation and maintains a high performance with a new techniques for tracking and counteracting frequency drift and I/Q angular error. The DBS receiver front end comprises a tuner and a demodulator/decoder. The tuner receives a high frequency signal and converts it to a baseband signal having a frequency offset error. In one embodiment, the DBS receiver front end includes a demodulator/decoder which preserves frequency offset error tracking through a channel change. The demodulator/decoder receives the baseband signal and produces a compensation signal for canceling the frequency offset error. This is done using an element which generates a value indicative of the frequency offset error. Since the frequency offset error is independent of the selected channel, freezing the value indicative of the frequency offset error during a channel change enables a much faster acquisition of timing.

Abstract: A symbol timing recovery (STR) error detector includes a complex multiplier and a Gardner-type symbol timing error estimator for operation with carrierless amplitude phase (CAP) signals. Quadrature Ir and Qr signals from the system are input to the complex multiplier, which also receives signals from a numerically controlled oscillator operating at the CAP center frequency. The output of the complex multiplier is provided to the input of the Gardner STR error estimator. An added frequency shift allows the Gardner error estimator to function with CAP signals. The output from the error estimator is provided to a loop filter the output of which is provided to an oscillator which generates the symbol timing information for a symbol sampling network.

Abstract: The invention relates to an eye pattern which is generated upon transmission and also to a modulation and demodulation method which employs the eye pattern. The eye pattern and the modulation and demodulation method are improved in that, by devising the arrangement of signal points, the timing jitter amount is minimized and a frequency offset can be followed up accurately. The eye pattern to be generated upon transmission is constructed such that the arrangement of signal points thereof is not symmetrical with respect to the origin on a signal point arrangement plane on which the signal points are arranged.

Abstract: A method of detecting a phase associated with a sinusoidal signal over a period associated with the sinusoidal signal, the method comprising the steps of: sampling the sinusoidal signal at a prescribed sampling frequency every period thereby generating a plurality of sampling values; converting the plurality of sampling values to a plurality of digital values; respectively evaluating said plurality of digital values within a first period and a latter period associated with the period of the sinusoidal signal, the evaluation of each period generating respective resulting digital values; and determining the phase associated with the sinusoidal signal according to the resulting digital values of the first period and the latter period.

Abstract: A demodulator with a filter having a reduced number of filter taps without a sacrifice in filter accuracy. The demodulator includes elements that generate a data stream that carries a component of an input signal in response to a data stream that carries samples of the input signal. The demodulator also includes elements that generate a sample clock for sampling the input signal such that the sample clock is preselected to cause the data stream that carries the component to carry alternating samples that are substantially equal to zero. The filter in the demodulator has a set of filter taps which are arranged to tap only the samples in the data stream that carries the component that are not substantially equal to zero.

Abstract: A digital signal processor is provided which is compatible with a large variety of modulation processes (e.g., BPSK, QPSK,.pi./4 QPSK, M-ary FSK and M-ary PSK). The processor has a transmit section which can convert input data streams into baseband I and Q signals and a receive section which can recover data streams from input baseband I and Q signals. The transmit section includes a direct I/Q modulator and a common phase modulator and the receive section includes an M-FSK to M-PSK converter and a common phase demodulator. The processor is particularly suited for realization as an application-specific integrated circuit (ASIC) which can be integrated in multiband, multimode transceivers.

Abstract: A jitter suppressing circuit is provided for suppressing jitter generated in a multistate quadrature amplitude modulation type modulator or demodulator. Based on I- and Q-phase signals containing jitter, a signal point specified by the I- and Q-phase signals is obtained, and a phase difference between the signal point and an ideal signal point closest thereto is detected. Whether the ideal signal point belongs to a predetermined signal point group is then determined. When the result of determination is affirmative, the phase of the signal point specified by the I- and Q-phase signals containing jitter is corrected, on the basis of the detected phase difference.

Abstract: A device for the simultaneous demodulation of a multifrequency signal comprising a processor in which demodulation takes place by calculation. An injector's output signal is multiplied by a complex signal having sinusoids of varying frequencies corresponding to frequency-shifted carriers, thereby transposing the injector's signal on intermediate frequencies.

Abstract: A .pi./n shift PSK demodulator of this invention is formed with a digital logical means through the following method. XOR4 calculates the ex-OR operation between the present sample through .pi./4 shift QPSK output from SH2 and the previous one output from SH1. Accumulating 1 among the outputs from XOR4 in the first operation means 5 and multiplying it by .pi./8 obtains the absolute phase difference between the present and the previous symbols. The former or latter four bits from SH1 are subtracted from the corresponding former or latter four bits from SH2, and the result of each bit is summed and its sign is added to the absolute phase data in sign addition means 10. After the phase offset is subtracted from the outputs from 10, it is demodulated into the original one in judgment circuit 13.

Abstract: An input quadrature modulation signal which is converted into a digital signal is converted into a complex baseband signal in a converter 7. A rough estimation of parameters of the signal is made in a rough signal correction unit 51. Using the estimates, the complex baseband signal is corrected. Utilizing a data detection of the corrected signal, a reference signal which corresponds to a transmitted signal is formed from the detected data in a generator 52. The reference signal and the corrected signal are used to estimate parameters in a fine parameter estimation unit 23.

Abstract: The along and perpendicular rails of a received signal (e.g., modulated using multi-phase shift keying) are rotated to compensate for frequency offsets between the carrier frequency of the received signal and the reference frequency of the local oscillator. The rotation angles are updated, based on the rotated along rail, during dotting sequences in the received signal. In one implementation, the dotting sequences are detected based on the rotated perpendicular rail. The beginnings of dotting sequences are detected by thresholding the average on the perpendicular rail, and the ends of dotting sequences are detected by analyzing the encoded data for non-dotting-sequence values. In a cordless phone application, different dotting sequences may be used to distinguish base-to-handset transmissions from handset-to-base transmissions.

Abstract: A direct conversion receiver for a radio system has an antenna and blocking filter connected to an amplifier. The input signal is split and mixed with an in-phase signal and a quadrature phase signal generated by an oscillator in a mixer circuit. An output from each mixer circuit is applied to a low pass filter and to an input of a limiting circuit. The output from each low pass filter is applied to respective circuits, a first of which is arranged to sum the in-phase and quadrature phase signals, and the second of which is arranged to subtract the in-phase and quadrature phase signals to generate a respective output signal having an axis intermediate the in-phase and quadrature phase signal axes. These signals, together with the in-phase and quadrature phase signals are passed through a limiting circuit respectively, to a decoder circuit for recovering the data. The output of the limiting circuits represent signals quantized to eight possible phase states separated by 45.degree..

Abstract: A fast algorithm for performing maximum likelihood detection of data symbols transmitted as phases of a carrier signal.

Abstract: A multipoint-to-point wireless System using directional antennas in an indoor environment. Optical pulses in an asynchronous transfer mode network may be converted into radio pulses, which are transmitted by a radio transmitter to a radio receiver, and then may be reconverted into optical pulses. Transmitter antennas having predetermined beamwidths are used and positioned within the indoor environment for transmitting data signals at a selected carrier frequency. A receiver antenna with a predetermined bandwidth is positioned within the indoor environment for receiving data signals transmitted at the selected carrier frequency. Amplitude Shift Keying (ASK) is used so that the output between transmitted data packets is zero, thereby allowing other users to utilize the system during the gap between the packets.

Abstract: A burst demodulator prevents transmission efficiency from being lowered, and a dynamic range of an input strength from being narrowed, by providing a stable frame signal even if the reaction is rapid against the input and the input strength is low. A logarithm amplifier outputs an electric power strength of a modulated input signal as a logarithm value, and an integrator smooths the output of the logarithm amplifier and outputs the smoothed output as an RSSI. The comparator compares the RSSI with the appropriate reference value REF while including some margin within the noise level, and outputs the frame signal of an `LO` state when the RSSI is lower than the REF, that is, during the non-signal zone, of an `HI` state when the RSSI is higher than the REF, that is, during the signal zone. The period of the comparator output continuously remaining in the `LO` state cannot exceed one clock period even if the comparator output flutters within one time slot.

Abstract: A phase detecting method and associated apparatus for use in a digital vestigial sideband modulation communication device. The phase detecting method has the steps of: digital-filtering I channel data applied from the exterior to restore Q channel data; compensating for a phase of the I and Q channel data by a prescribed phase error value; estimating an I channel level value which approximates the I channel data from the phase-compensated I channel data; and obtaining a difference between the phase-compensated I channel data and the estimated I channel level value, and generating as the phase error value an operation value obtained by multiplying the difference by a sign of the Q channel data.

Abstract: For combining diversity path signals comprising symbols each modulated in accordance with one of a plurality of orthogonal (e.g. Walsh) functions, a diversity combiner includes, for each path, a demodulator to demodulate each modulated signal symbol in accordance with a selected one of the orthogonal functions, a phase estimator to estimate a phase rotation and amplitude of the diversity path signal from the demodulated signal, and a complex signal multiplier to derotate the phase and weight the amplitude of the diversity path modulated signal in dependence upon the estimated phase rotation and amplitude. The combiner sums real parts of the phase-derotated and weighted modulated signals of the diversity paths, demodulates the combined signal in accordance with all of the orthogonal functions, and selects the maximum demodulated signal for each symbol thereby to determine for the symbol the selected one of the orthogonal functions.

Abstract: A digital demodulator which demodulates an analog signal obtained through a quadrature amplitude modulation to produce a digital demodulated signal includes a converter to convert the analog signal into a digital signal and a signal processor to quadrature-demodulating the digital signal from the converter. Assuming that the analog signal has a carrier frequency of f.sub.IF and the signal conversion is accomplished with the sampling frequency fs, the demodulator is set to satisfy fs=4.multidot.f.sub.IF /(2n+1), where n denotes a positive integer. The signal processing section conducts the quadrature demodulation according to a quadrature local oscillation signal having a frequency fc satisfying fc=fs/4.

Abstract: A quotient coding modem comprises a modulator that encodes transmitted symbols by the equation ##EQU1## and a demodulator that decodes received symbols by the equation ##EQU2## where q(t) and q.sub.r (t) are functions of time for transmitted and received symbols s(t) and s.sub.r (t) respectively at time t, P.sub.r (t)=.vertline.q.sub.r (t).vertline..sup.2 is instantaneous received baseband power at time t, .eta. is a function of the two smallest symbol amplitudes, and P.sub.max is peak transmitted power.

Abstract: A transmission system and a transmitter (T) for such a system are disclosed for transmitting a digital signal (sr), encoded in symbols (Si), from the transmitter (T) to a receiver (R) at an arbitrary frequency position by quadrature modulation. In the transmitter, one of the two quadrature components (ki, kq) is delayed before the quadrature modulation by a given time interval (td).