Abstract: A demodulation method for tentatively demodulating a modulated input signal by a signal having a fixed frequency to form a tentative complex demodulated signal and then generating a determined complex demodulated signal from the tentative complex demodulated signal. The method includes step (a) of obtaining a determined complex demodulated signal by compensating for the tentative complex demodulated signal based on an optimum phase compensation amount; step (b) of estimating an optimum frequency compensation amount based on a shift in the optimum phase compensation amount during a predetermined cycle; and step (c) of estimating an immediately subsequent optimum phase compensation amount to be used in the steps (a) and (b) performed in repetition, based on the tentative complex demodulated signal, the determined complex demodulated signal, and the optimum frequency compensation amount.

Abstract: The invention provides a PSK signal demodulation device of small circuit scale that is capable of both rapid synchronization pull-in and stable demodulation operation following demodulation synchronization pull-in. To achieve these capabilities, the phase shift keying signal demodulation device of this invention is provided with an adaptive line enhancer demodulation circuit, a PLL demodulation circuit, and a switching circuit that switches the demodulation circuits from the adaptive line enhancer demodulation circuit to the PLL demodulation circuit. The switching circuit switches between the demodulation circuits such that, upon start of input of an N-phase PSK signal, demodulation is effected by the adaptive line enhancer demodulation circuit until phase synchronization is established between the input N-phase PSK signal and the recovered carrier, and demodulation is effected by the PLL demodulation circuit after establishment of phase synchronization.

Abstract: An automatically gain-controlled analog received signal is AD converted to a digital signal, which is subjected to quadrature demodulation processing through operation. The quadrature demodulation result is subjected to low-pass filter processing through operation, that is, a digital detection is performed by software processing to a variable in each software processing in accordance with changes in the modulation method of the received signal and in the symbol transmission rate.

Abstract: An amplitude shift keyed (ASK) receiver includes a signal receiving part receiving an amplitude shift keyed signal, a signal detecting part coupled to the signal receiving part and detecting a signal having a carrier frequency and a noise, a pulse detecting part coupled to the signal receiving part and checking the signal from the signal receiving part for compensating errors in the signal detecting part, and a signal determining part coupled to the signal detecting part and the pulse detecting part, the signal determining part determining and restoring a signal to be restored according to output signals from the signal detecting part and the pulse detecting part.

Abstract: A differentially phase shift keyed demodulator for use in an interrogator of a remote intelligent communication system. The demodulator includes a quadrature combiner delaying one of the quadrature signals and thereafter combining the delayed and undelayed signals along with a FIR matched filter, which filters the combiner output whereby the differentially phase shift keyed data on a sub-carrier can be demodulated using a simple delay and multiplying scheme in response to the filtered output.

Abstract: A data and clock recovery circuit includes a front end circuit for receiving a data signal encoded with a Manchester or other bi-phase level code having a sequence of bit frames, and for outputting a recovered data signal and a recovered clock signal in accordance with transitions in the data signal that overlap with a window signal. A window generation circuit generates the window signal in accordance with a delay control signal, and includes circuitry that delays and transforms the recovered clock signal into the window signal. A delay control circuit generates and adjusts the delay control signal. A phase comparison circuit compares the recovered clock signal with leading and lagging portions of the window signal, and generates signals that adjust the delay control signal when the recovered clock signal overlaps with either of the leading and lagging portions of the signal.

Abstract: Transmission system with a transmitter (T), a receiver (R), and a filter combination (FI1, FI2; FQ1, FQ2) for transmitting a digital signal (sr), encoded in symbols (Si), from the transmitter (T) to the receiver (R) at any frequency position by quadrature modulation, wherein one of the two quadrature signal components (ki, kq) in the transmitter is delayed before the quadrature modulation by a time interval td, particularly by td=Tsymb/4. (FIG.

Abstract: A coherent signal detector for extracting analog and digital information from a received AM-compatible digital broadcast waveform is provided. The waveform can have an in-phase component and a quadrature component. The detector can include a down converter for shifting the in-phase and quadrature components in phase, frequency, or both, in response to a phase word, thereby providing a recovered in-phase output and a recovered quadrature output. The signal detector also includes an integration circuit for integrating a portion of the recovered quadrature output over a first preselected time interval, which can be one digital time frame.

Abstract: A receiver is arranged for receiving a transmitted quadrature amplitude modulated (QAM) signal representing successive symbols, and including an in-phase (I) component and a quadrature (Q) component. In such a receiver, a timing recovery system includes a source of samples representing the QAM signal produced at a fixed frequency. A first chain of processing circuitry for the I component includes a first demodulator, coupled to the sample source, for demodulating the I component of the QAM signal to baseband; and a first interpolator, coupled to the first demodulator and responsive to a control signal, for producing I component samples taken at times synchronized to the transmitted symbols.

Abstract: A phase shift modulator at the transmitter has a control input connected to a binary signal source. A high frequency carrier signal is applied to a carrier signal input of the modulator. The modulated carrier signal is transmitted to a receiver where it is mixed with a local oscillator frequency. At the receiver, a modulated signal is amplified by a limit amplifier to form the received signal into square wave pulses of a uniform height. The demodulator detects when the spacing between the edges of the square wave signal change in response to the phase shift modulation at the transmitter. When the spacing between the edges of the square wave IF signal is detected to be shorter than the normal spacing for a steady IF signal with no modulation, this signifies a first binary value. A longer than normal spacing between the edges of the square wave IF signal signifies a second binary value. Frequency drift compensation circuits are disclosed to overcome frequency variations in the carrier and the local oscillator.

Abstract: A QAM/VSB digital receiver is disclosed which includes a source of a QAM/VSB signal. An analog-to-digital converter is coupled to the QAM/VSB signal source, and is further responsive to a sample clock signal. A filter/complement is coupled to the analog-to-digital converter and has a first output terminal which produces a low-pass filtered QAM/VSB signal, and a second output terminal which produces a high-pass filtered QAM/VSB signal complementary to the low-pass filtered QAM/VSB signal. A sample clock generating circuit is coupled to the second output terminal of the filter/complement and produces the sample clock signal in response to the high-pass filtered QAM/VSB signal.

Abstract: A digital QPSK demodulator includes a plurality of two-input-two-output (TITO) two-fold decimators where each TITO two-fold decimator operates at a rate equal to its input data rate. The in-phase I signal and the quadrature Q signal are computed in an interleaved sequence of {Q"(n), I"(n), Q"(n+1), I"(n+1), . . . } to generate Q" decimation output and I" decimation output. The TITO two-fold decimators are cascaded in a reverse order to form a programmable down-sampler which decimates the input data by factors of 1, 2, 4, 8 or more. In a first embodiment, the programmable down-sampler is coupled between a complex multiplier and an interpolator. In a second embodiment, the in-phase and quadrature signals are fed through a complex multiplier, an interpolator, then the programmable down-sampler. In the third embodiment, the in-phase and quadrature signals are fed through an interpolator, a complex multiplier, then the programmable down-sampler.

Abstract: A carrier reproducing circuit for detecting a phase error when an inputted baseband signal is out of phase and bringing the baseband signal into phase even in QAM systems in which normal signal points are located in a non-square pattern in a phase-amplitude signal space. When the baseband signal is out of phase, a first region decision circuit detects a presence of the baseband signal in a first region and outputs a first signal, and a second region decision circuit detects a presence of the baseband signal in a second region and outputs a second signal. If the second signal is not outputted over a predetermined period of time around the time at which the first signal is outputted, then a selective outputting circuit outputs a phase error detected by a phase error decision circuit with respect to the baseband signal at the time the first signal is outputted, to a control signal generator.

Abstract: The present invention relates to a clock phase detecting circuit and a clock regenerating circuit each arranged in a receiving unit of multiplex radio equipment. The receiving unit of the multiplex radio equipment includes an identifying circuit for identifying a signal obtained by demodulating a multilevel orthogonal modulation signal; a clock regenerating circuit for regenerating a signal identification clock for the identifying circuit to supply the clock to the identifying circuit; an equalizing circuit for subjecting the signal obtained by demodulating a multilevel orthogonal modulation signal to an equalizing process. A clock phase detecting unit detects the phase component of the signal identification clock based on signals input to or output from the equalizing circuit and then supplies the phase component to the clock regenerating circuit.

Abstract: A method for detecting a locked condition of a demodulator of at least one signal that may have discrete levels defining a constellation of nominal points in a plane. The method includes the steps of defining reference areas about the nominal points, a reference area being separated from another by a band or an angular sector crossing the origin of the constellation plane, and indicating a locked condition if the ratio of points occurring in the reference areas is above the probability for points to occur in the reference area, when the demodulator is wrongly adjusted.

Abstract: A receiver for decoding passband signal pulses transmitted in accordance with a M-ARY phase shift keying modulation scheme, comprises a multiphase sampler for sampling received passband signal pulses in the passband frequency range so as to generate a plurality of digital words corresponding to the sampled passband signal pulses, such that each digital word represents the phase of each sampled passband signal pulse. A phase reference register or other storage device is coupled to the multiphase sampler for storing one of the digital words as a phase reference such that other digital words generated by the multiphase sampler are compared with the digital word corresponding to the phase reference for decoding the passband signal pulses.

Abstract: For demodulation of higher-level MQAM signals without knowledge of the transmitted symbols, the clock phase error is calculated first after the sampling of the baseband signal with a clock frequency corresponding to the MQAM signal, and the corresponding time shift of the baseband signal is compensated therewith by interpolation (clock synchronization). Subsequently, the carrier frequency deviation and the carrier phase deviation are calculated feedback-free according to the principle of the maximum likelihood theory using Fourier transformation or by convolution in the time domain, and thus the data sequence is compensated.

Abstract: A method and apparatus receives a symbol and subdivides (720) the symbol into a plurality of fragments. The method and apparatus perform (704) for the plurality of fragments a plurality of correlations with at least one possible symbol value, thereby producing a plurality of complex values corresponding to each fragment and further corresponding to the at least one possible symbol value. From the plurality of complex values a plurality of overall Fourier transforms are computed (706) across a frequency range, and a peak value in the plurality of overall Fourier transforms is located (708). The symbol is then determined (710) from the peak value.

Abstract: A rectangular to phase converter (201) includes a first converter circuit (201B) which limits signals to a predetermined level. A phase selector (259) selects a relative phase from the limited signals. According to one aspect of the invention, input rectangular coordinate signals are mapped to the first quadrant in a first quadrant mapping circuit (201A) before the first quadrant signals are limited and the relative phase signal is returned to the original quadrant by an original quadrant mapping circuit (260).

Abstract: A method for providing improved carrier based data operated squelch (CDOS) includes routines for recovering the carrier signal and for analyzing the received signal. The received signal is sampled at each transition point of the carrier signal as well as the halfway points between the transition points. In addition, extra samples are taken between these samples. Using the samples, a carrier locked loop routine recovers the carrier signal. A CDOS routine analyzes the extra samples to determine the presence of data. If two successive samples are different, this means that a transition has occurred. The CDOS routine analyzes these transitions to determine whether the input signal is encoded with data. If the CDOS routine determines that the input signal is encoded with data, a CDOS counter is incremented. As the input continues to look like data, the value by which the CDOS counter is incremented is increased. When the CDOS counter reaches a certain threshold, the CDOS mutes the output circuit.

Abstract: A radio frequency (rf) receiver adapted to receive a number of different digitally modulated rf input signals such as quadrature amplitude modulated (QAM) and vestigial side band (VSB) rf input signals includes circuitry for down converting the rf input signals to an intermediate frequency (IF) range having a center frequency fc2 and a bandwidth of Bhz and converter circuitry for sampling the IF signals and then producing corresponding baseband signals. In a preferred embodiment, the intermediate frequency signals are applied to a sample and hold circuit which is sampled at a frequency fs and whose output is coupled via a low pass filter to an analog-to-digital converter whose output is then applied to a Hilbert filter for demodulating the sampled signals and producing baseband signals. In-phase (I) and quadrature (Q) signals are produced whose phase and amplitude are not a function of different components and their tolerance of different conduction paths, as in the prior art.

Abstract: An in-phase component and a quadrature component of a digitized input DQPSK modulated signal are provided from interpolation filters, respectively. An instantaneous amplitude and an instantaneous phase of the input signal for each symbol clock are detected from the in-phase and quadrature components and are fed to adders. At the same time, that one of symbols "0, 0," "0, 1," "1, 0" and "1, 1" which corresponds to the instantaneous phase is detected by a symbol detector. An ideal reference signal generating part generates an ideal amplitude component and an ideal phase component corresponding to the detected symbol and provides them to a parameter calculating part. In an I-Q origin offset detecting part, an I-Q origin offset is calculated on the basis of the relationship between a triangle formed by the current detected vector corresponding to an ideal symbol and a vector detected one symbol clock before and a triangle formed by the said two vectors.

Abstract: A receiver configured to measure phase change (.DELTA..phi.) in a signal transmitted from a microwave signal source, such as a cell site for cellular telephones, the transmitted signal including a carrier signal (F.sub.1) added to a modulation signal (F.sub.MOD), the receiver providing the phase change measurement (.DELTA..phi.) without further reference to the modulation signal (F.sub.MOD). Utilizing (.DELTA..phi.), distance from the transmitter can be calculated. The receiver includes one or more mixers for receiving the transmitted signal from the cell site and downconverting relative to an intermediate frequency signal (F.sub.IF) to produce an IF mixed signal including a sum IF mixed signal (F.sub.IF +F.sub.MOD) and a difference IF mixed signal (F.sub.IF -F.sub.MOD). The receiver then further includes components to demodulate the IF mixed signal to provide the modulated signal (F.sub.MOD) and the phase change measurement (.DELTA..phi.) with tracking of the intermediate frequency signal (F.sub.IF).

Abstract: A signal processing arrangement adjusts baud timing in a communication system receiver, wherein an information signal comprised of (sin(x))/x function contributions of successively adjacent bits is received via a memoryless channel. The information signal is sampled in accordance with a baud sampling clock signal, to derive successive samples of bits contained in the information signal. The sampling clock signal has a baud sampling clock frequency that is adjusted by a phase locked loop in accordance with a timing error signal. The signal processing arrangement comprises an intersymbol interference (ISI) correlation-driven baud timing recovery scheme which makes use of the fact that, for a given bit, at all instances in time other than where its peak occurs, the channel will contain energy from adjacent bits, so that there will be a substantial correlation of channel energy among successively adjacent bits of a transmitted sequence.

Abstract: A 64 QAM signal constellation reduces phase noise as compared with a rectangular constellation, but requires a fairly simple decoder. The constellation has decision regions which are approximately rectangular; allows for quadrant decoding; and has constellation points representable by a small number of bits.

Abstract: A differential detecting apparatus includes samplers 1 and 2, differential detection calculating unit 3, and two post-detection filters 4 and 5. Differential detection calculating unit 3 performs a differential detection with time-division multiplexing on data output from these samplers and alternately outputs a data sequence of a part of cosine component of the phase difference of the modulated signal and a data sequence of the rest of the cosine component. Differential detection calculating unit 3 also alternately outputs a data sequence of a part of sine component of the phase difference and a data sequence of the rest of the sine component. Each of post-detection filters 4 and 5 includes linear interpolating filter 35 and integral filter 36 which are connected in series. The linear interpolating filter 35 obtains a moving average from successive three pieces of input data weighted by 1:2:1 and the integral filter 36 obtains an integral value from successive k pieces of input data.

Abstract: A differential demodulator that is particularly suited for a digital audio broadcasting (DAB) system, and more particularly to the Eureka-147 (DAB) system, is disclosed. The differential demodulator of the present invention receives complex data components I and Q derived from a fast fourier transform operation and converts the data components I and Q into differential data components .DELTA.I and .DELTA.Q that are accepted by data demodulating elements of the Eureka-147 system so as to be reconstructed as digital data which, in turn, are converted into an analog form that is converted and reproduced into corresponding high quality sound. The conversion of I and Q data into .DELTA.I and .DELTA.Q data is accomplished via a network of four ROMs and one RAM, wherein the ROMs are time-shared between the multiple carriers of the Eureka-147 system.

Abstract: A modulation and demodulation scheme for video signals may be used for HDTV signals using VSB-PAM, analog NTSC signals using VSB-AM and digital video signals using QAM. VSB-PAM modulation and demodulation may be performed using in-phase and quadrature baseband filters. By adjusting the filter taps, a single modulator structure may be used for QAM and VSB-PAM modulation. Similarly, a single demodulator structure may be used for QAM and VSB-PAM demodulation. This demodulator may also be used for VSB-AM modulation.

Abstract: A method is provided of updating an estimated channel impulse response of a maximum likelihood sequence estimator within a radio receiver (12 and 13). The method includes the steps of computing a rate of change of a channel impulse response from a current estimated channel impulse response and a previous estimated channel impulse response, selecting an update step size as a function of the rate of change of the estimated channel impulse response, and updating the estimated channel impulse response of the maximum likelihood sequence estimator based upon the selected step size. Apparatus is also provided of practicing the method in receiving and decoding a signal.

Abstract: A modulation and demodulation method for communication between a transmitting side and a receiving side includes a step of at the transmitting side, producing a modulating signal, an amplitude ratio of a current instantaneous amplitude of the modulating signal and an instantaneous amplitude at n symbols previously in time (n is a natural number) of the modulating signal being set to correspond to a code to be transmitted, a step of at the transmitting side, modulating a carrier with a radio frequency or an intermediate frequency by the modulating signal to provide and transmit a modulated signal, a step of at the receiving side, receiving the transmitted modulated signal to provide a received signal, and a step of at the receiving side, deciding the transmitted code from an amplitude ratio of an instantaneous amplitude of a signal point in a signal space and an instantaneous amplitude of the signal point in the signal space n symbols previously in time with respect to the received signal.

Abstract: The demodulator is for processing a signal having a carrier modulated by (0, .pi.) phase shifts and sampled at a rate that is at least twice the frequency of the carrier co. It comprises, in cascade: a first multiplier for squaring successive samples e(t), a phase locked loop adjusted to the frequency of the carrier, thereby performing programmable digital filtering; a divider for dividing the frequency by two, reconstituting the carrier from the output of the phase locked loop; a second multiplier receiving the sampled input signal and the output signal from the divider and an output lowpass digital filter. A phase adjustment circuit is placed upstream of one of the inputs of the second multiplier.

Abstract: In a quadrature receiver for phase and/or frequency modulated signals an intermediate phase signal is quantized to produce a quantized phase signal. The receiver includes a demodulator in which pulses are generated from the quantized phase signal and it is determined whether two successive pulses have different polarities, and if so, a reconstructed baseband signal transition is produced at a predetermined reconstruction instant between the two successive pulses. The reconstruction instant is chosen in the middle between two successive pulses for FSK modulation, and it is chosen at different positions between the two pulses for other types of modulation, such as GMSK or multi-level FSK.

Abstract: This invention is a method for the detecting received signal sequences of a communication system transmitting a differentially encoded MPSK (Multiple Phase Shift Keying) or a differentially encoded 2MAPSK (2M-level Amplitude/Phase Shift Keying) signal sequence. The operation of detecting the currently received signal sample is based on a signal reference which is recursively generated by two or more previously generated signal references.

Abstract: A high-speed demodulating method of burst data capable of performing demodulation process at high speed in a single hardware structure. An input signal digitally modulated is taken in into an input unit to be sampled and latched therein by a sampling clock from a controller, and a modulation signal from the input unit is taken in into either a first demodulator or a second demodulator for each one burst data depending on the timing of a first control signal or a second control signal output by the controller, respectively, and demodulated, and a first demodulation signal produced from the first demodulator or a second demodulation signal produced from the second demodulator is taken in into an output unit by a third control signal output by the controller, and in the output unit, the first demodulation signal or the second demodulation signal is latched by a latch signal of the controller and supplied as an output signal.

Abstract: Automatic gain control (AGC) for a quadrature-amplitude-modulation (QAM) digital radio receiver, such as used for receiving digital high-definition television transmissions, is provided immunity to the effects of the ringing of intermediate-frequency (IF) amplifiers at carrier frequency in response to impulse noise. The energy associated with the ringing of the IF amplifiers is at frequencies relatively close to the carrier of the IF signal as compared to data modulation. Filtering that suppresses the energy associated with the ringing of the IF amplifiers is used to recover information concerning the envelope variations of the QAM signal free from accompanying ringing energy, which envelope variations are then peak detected to develop AGC signals for the QAM digital radio receiver.

Abstract: A phase error detecting method is applied to a VSB receiver or a QAM receiver. Q-channel data is recovered by digitally filtering transmitted I-channel data, and the phases of the I-channel data and the Q-channel data are corrected according to a fed-back phase error. A decided I-channel level value is chosen approximating the phase-corrected I-channel data among predetermined reference I-channel level values. A phase error value for the received data is obtained by subtracting the decided I-channel level value from the phase-corrected I-channel data, and multiplying the sign of the difference by the difference itself, and applying a weight value from a predetermined weighting function to the phase error value weighted phase error value is fed back to be used for phase correction of received data. Thus, the reliability of phase error detection can be increased by use of the weighting function.

Abstract: In a clock recovery circuit in a demodulator of a multi-level quadrature amplitude modulation (QAM) system, an analog/digital (A/D) converter performs an A/D conversion upon a coherent-detected baseband analog signal in synchronization with a sampling clock signal having a time period half of a symbol time period. An phase detector receives successive first, second and third sampled data from the A/D converter, determines whether or not a signal transition formed by the first and second sampled data crosses a zero value within a predetermined time deviation, and compares a polarity of the second sampled data with a polarity of one of the first and second sampled data to generate a phase detection signal. Further, a loop filter is connected to an output of the phase detector, and a voltage controlled oscillator supplies the sampling clock signal to the A/D converter in accordance with an output signal of the loop filter.

Abstract: The invention relates in particular to a method of compensating differences in group propagation times between first and second analog filters of a transmitter of signals in phase quadrature, and between third and fourth analog filters of a receiver of signals in phase quadrature. The method consists in: applying the output signals from the first and second filters respectively to the third and fourth analog filters so as to measure a time difference .DELTA.1 equal to: ?Tx+Rx!-?Ty+Ry! where Tx, Rx, Ty, and Ry are respective propagation times for the signals through the first, second, third, and fourth filters; applying the output signals from the first and second filters respectively to the fourth and third analog filters so as to measure a time difference .DELTA.2 equal to: ?Ty+Rx!-?Tx+Ry! and determining weighting coefficients from the differences .DELTA.1 and .DELTA.

Abstract: The present invention has an object to provide a matched filter circuit which is possible to synchronize a spreading code with an input signal. A matched filter according to the present invention samples input signal in response to three clocks from the first to the third shifted by a half cycle of a sampling signal so as to judge whether the sampling clock is ahead or behind of the input signal according to signs of input signal sampled. One clock is selected to be the sampling clock.

Abstract: A reduced complexity maximum likelihood multiple symbol differential detector which utilizes a maximum likelihood sequence estimation of the transmitted phase and does so by expanding the observation window to observe the received symbol over N signal intervals and making a simultaneous decision on N-1 symbols. The phase of the received signal is calculated up front and thus the detector requires only real subtractions and real additions as opposed to complex multiplications and additions. Furthermore, the detector does not sacrifice performance over conventional prior art detectors.

Abstract: In accordance with the present invention, an RFID system has a homodyne receiver having two outputs; the in-phase or I output and the quadrature or Q output. The modulated backscattered signal is composed of an information signal, modulated onto a single frequency subcarrier signal, generating a modulated subcarrier signal; this modulated subcarrier signal is then backscatter modulated onto the incoming RF signal. To demodulate this modulated backscattered signal, the I and Q outputs are combined using an IQ combiner. This IQ combiner introduces a 90.degree. phase shift, with respect to the frequency of the subcarrier signal, onto one of the demodulator outputs and then combines the outputs of the demodulator.

Abstract: A digital modulating signal, which is a binary conversion of an RDS signal by a comparator, is sampled by a D-FF with a regeneration clock synchronized with a carrier regenerated by a carrier regeneration circuit. Next, a comparator output is input by an edge detection circuit where a data edge is detected, and the edge interval between this edge and the sampling timing edge of the regeneration clock is detected by a reliability judgment circuit where the edge interval is encoded and output as reliability data. Then, the reliability data is added as LSB data to various sampling data, and data for various symbols is regenerated at the data regeneration circuit. This minimizes the influence of the error data on the data regeneration circuit even if data is sampled erroneously.

Abstract: A receiver (156) includes both a coherent and noncoherent demodulator. When the confidence that estimates of the channel is high, the coherent demodulator is implemented. When the confidence that estimates of the channel is low, the noncoherent demodulator is implemented. A controlling microprocessor (162) controls the selection process and also provides a signal (158) to enable the noncoherent demodulator in instances when noncoherent demodulation would most likely be better than coherent demodulation. As an example, such an instance would be immediately after handoff of a mobile station (505) from a source base-station (503) to a target base-station (502).

Abstract: A digital communication receiver (#10) takes one complex sample (#20) of a baseband analog signal (#12) per symbol. A rectangular to polar converter (#44) separates phase attributes of the complex samples from magnitude attributes during coarse symbol synchronization (#28). A phase processor (#48) identifies clock adjustment opportunities which occur when relatively large phase changes take place between consecutive symbols. A magnitude processor (#46) influences symbol timing only during clock adjustment opportunities. The magnitude processor (#46) advances symbol timing in a phase locked loop when decreasing magnitude changes are detected during clock adjustment opportunities and retards symbol timing when increasing magnitude changes are detected during clock adjustment opportunities during coarse symbol synchronization (#28).

Abstract: The in-phase channel 28 of a complex demodulated resonator data output signal 12 should contain all of the sensed information, and the quadrature-phase channel 32 should contain none of it. This will not happen if the phase of the reference signal 14 is incorrect. The phase may be adjusted by first filtering each demodulated channel with a respective low-pass dc-blocked filter 34, 38 which passes only the frequencies of the sensed information. If the sensed information gets through on both channels, then there will be a non-zero cross-correlation between the channels. This cross-correlation can be servoed to a minimum by use of a feedback signal 22. Doing so will cause all of the sensed information to be in one channel 28, and diagnostic information to be in the other channel 32.

Abstract: An improved method for signal demodulation, based upon the assessment of an error statistic which is independent of the content of the data stream. To determine the appropriate sampling point within a data period, multiple sampling points are utilized to generate a set of alternative decodings of the data stream. Associated with each of these alternative sets is an error statistic which is computed based upon a known characteristic of the transmitted stream. For example, in Differential QPSK, the encoded phase change is known to be a multiple of 90 degrees. The error statistic would be a function of the difference between each sampled phase and the nearest multiple of 90 degrees. This error statistic provides a quantifiable measure of quality and noise margin associated with each sampling point. The decoded stream associated with the error statistic of highest quality is then selected as the proper decoding of the transmitted data stream.

Abstract: A demodulator stage for direct demodulation of a phase quadrature modulated signal provides two baseband signals and comprises a matched 900.degree. coupler to which the modulated signal is fed and supplying two phase quadrature modulated signals. Two low-noise amplifiers with identical specifications each receive one of the phase quadrature modulated signals and supply an amplified signal. Two mixers each receive one of the amplified signals and a common local oscillator signal and supply the baseband signals. The 90.degree. coupler, the low-noise amplifiers and the two mixers can be integrated into the same MMIC. One application is to a receiver for frequency evasive phase quadrature modulated signals.

Abstract: A circuit arrangement capable of achieving both DC offset correction and automatic gain control for QAM demodulation. The QAM signal is digitized and then the positive signal samples are averaged and combined with the negative signal samples. The sum of these two averages is an indication of the DC offset while the difference of these two averages is an indication of the gain factor for automatic gain control. Common circuitry is then alternately used to process the DC offset and the gain factor for automatic gain control.

Abstract: A demodulator of the present invention comprises a clock signal generator for generating a clock signal having a frequency that is 4 times n times (n is an integer greater than zero) the carrier frequency of a received signal, an analog-to-digital (A/D) converter for converting the received signal into a digital signal, a complex signal generator clocked by the clock signal to generate a complex signal comprised of the received signal as a real part and a .pi./2 phase-shifted signal as an imaginary part, a phase rotator for generating quasi-coherent detected signals by multiplying the complex signal by specific values of the carrier frequency, and a decimation circuit clocked by a clock signal to generate the required I channel signal and Q channel signal by decimating the quasi-coherent detected signals so as to finally obtain improved accuracy for accomplishing quadrature detection and eliminate an amplitude deviation and a direct-current offset.

Abstract: The voice over data component of a personal communications system enables the operator to simultaneously transmit voice and data communication to a remote site. This voice over data function directly encodes digitized voice samples onto the carrier using quadrature amplitude modulation to transmit multiple bits of the voice sample for every baud. The system also allocates selected bauds of the carrier to voice and to data so the voice over data may be transmitted using the same allocated bandwidth. The system may also dynamically reallocate the bandwidth over the telephone line depending on the demands of the voice grade digitized signal.