Having D.c. Feedback Bias Control For Stabilization Patents (Class 330/259)
  • Patent number: 10250210
    Abstract: An amplifier comprising a differential amplifier configured to be provide a comparator function, and a gain trimming circuit is electrically configured to provide gain trimming using a T-network comprising a varistor element. In addition, a method of trimming the gain of a differential amplifier, comprising the steps of a first step, (a) providing the differential amplifier comprising resistors in both of its paths, a second step, (b) providing a varistor in a T-network between both said paths; and lastly, a third step, (c) trimming the gain of the differential amplifier by adjusting the varistor's resistance.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: April 2, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Zakaria Mengad, Steven Collins, Vladislav Vasilev
  • Patent number: 10187026
    Abstract: A transimpedance amplifier circuit includes a feedback control loop that generates a compensation current at an input of a transimpedance amplifier. The feedback control loop includes a differential integrator with an integration capacitor. A time constant associated with charging the integration capacitor is variable as a function of a pre-charge control signal. During a pre-charge phase, the pre-charge control signal is set to a first value so as to set the time constant associated with charging the integration capacitor to a first time constant value. During an operation phase, the pre-charge control signal is set to a second value so as to increase the time constant associated with charging the integration capacitor to a second time constant value greater than the first time constant value for the pre-charge phase.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: January 22, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Zamprogno, Maurizio Bongiorni, Pasquale Flora
  • Patent number: 10177725
    Abstract: A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: January 8, 2019
    Assignee: NORDIC SEMICONDUCTOR ASA
    Inventor: Phil Corbishley
  • Patent number: 10063189
    Abstract: An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: August 28, 2018
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Michel Ayraud, Sandrine Nicolas
  • Patent number: 9936293
    Abstract: According to one embodiment, a loudspeaker is provided in a case of an earphone. The case closes an external auditory canal extended from a tympanum of a listener. The earphone has an opening toward the external auditory canal. In an apparatus for generating a sound reproduction to the loudspeaker, a storage unit stores a correction filter in which a maximum of a gain at a frequency band lower than or equal to 10 kHz is larger than a maximum of a gain at a frequency band higher than 10 kHz. An acquisition unit acquires a first sound reproduction signal. A correction unit generates a second sound reproduction signal by convoluting the correction filter with the first sound reproduction signal. An output unit outputs the second sound reproduction signal to the loudspeaker.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: April 3, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiko Enamito, Takahiro Hiruma, Osamu Nishimura
  • Patent number: 9813034
    Abstract: Aspects of the disclosure provide an amplification circuit. The amplification circuit includes an amplifier and a first variable resistive device. The amplifier includes first and second input nodes configured to receive the first and second input electrical signals and first and second output nodes configured to output first and second output electrical signals having amplified voltages relative to the first and second input electrical signals. The first variable resistive device is electrically coupled to the second input node of the amplifier. The first variable resistive device being configured to have a selected resistance value to compensate for a direct current (DC) voltage difference between the first and second input electrical signals based on a DC voltage difference between first and second output electrical signals that are output from the first and second output nodes of the amplifier.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: November 7, 2017
    Assignee: Marvell World Trade Ltd.
    Inventors: Yongxu Wang, Wenrong Qian, Kapil Jain, Song Chen, Xiaoxiao Zhao
  • Patent number: 9716398
    Abstract: A driving device with correction function is provided herein and utilizes a sensing resistor to detect the variation in an operation amplifier. A signal generated by an offset voltage correction circuit is fed back to the operation amplifier and the offset voltage of the abnormal input in the operation amplifier is corrected to be zero so as to keep the operation amplifier under the best performance condition. The driving device implements in the wireless charger driving system can enhance the accuracy of the current value and can achieve good output performance and better system stability.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: July 25, 2017
    Assignee: Amtek Semiconductor Co., Ltd.
    Inventors: Teng-Hui Lee, Chen-Pin Lo, Keng-Yi Wu
  • Patent number: 9654071
    Abstract: Described herein is a preamplifier circuit for a capacitive acoustic transducer provided with a MEMS detection structure that generates a capacitive variation as a function of an acoustic signal to be detected, starting from a capacitance at rest; the preamplifier circuit is provided with an amplification stage that generates a differential output signal correlated to the capacitive variation. In particular, the amplification stage is an input stage of the preamplifier circuit and has a fully differential amplifier having a first differential input (INP) directly connected to the MEMS detection structure and a second differential input (INN) connected to a reference capacitive element, which has a value of capacitance equal to the capacitance at rest of the MEMS detection structure and fixed with respect to the acoustic signal to be detected; the fully differential amplifier amplifies the capacitive variation and generates the differential output signal.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 16, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Filippo David, Igino Padovani
  • Patent number: 9614564
    Abstract: The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventors: Kevin Chang, Stefano Giaconi
  • Patent number: 9584146
    Abstract: Systems and methods for measuring and compensating a DC-transfer characteristic of analog-to-digital converters are described. A test-signal generator comprising a sigma-delta modulator may provide calibration signals to an ADC. An output from the ADC may be filtered with a notch filter to suppress quantization noise at discrete frequencies introduced by the sigma-delta modulator. The resulting filtered signal may be compared against an input digital signal to the test-signal generator to determine a transfer characteristic of the ADC.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: February 28, 2017
    Assignee: MediaTek Inc.
    Inventors: Frank Op 't Eynde, Nathan Egan, Khurram Muhammad, Tien-Yu Lo, Chi-Lun Lo, Michael A. Ashburn
  • Patent number: 9559646
    Abstract: A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: January 31, 2017
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Siddharth Seth, Sang Won Son, Dae Hyun Kwon, Sriramkumar Venugopalan, Thomas Cho
  • Patent number: 9543904
    Abstract: Disclosed are a differential amplifier circuit and a semiconductor memory device including the same, wherein the differential amplification circuit includes: a differential amplifier activated in response to an enable signal, capable of differentially amplifying input signals inputted through input terminals and outputting output signals; and an operation control section capable of sequentially applying signals having a voltage difference increasing in stepped fashion to the input terminals of the differential amplifier, measuring voltages of the output signals of the differential amplifier to detect an input offset, and adjusting an activation timing of the enable signal depending on a detected offset.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: January 10, 2017
    Assignee: SK Hynix Inc.
    Inventors: Han Qu, Kyoung-Han Kwon
  • Patent number: 9485580
    Abstract: In an example embodiment a headset includes a phone jack, a speaker connected to the phone jack, a microphone coupled to the phone jack and a resistive switch string coupled to the phone jack to the same ring of the phone jack as the microphone. In another example an integrated circuit device includes a charge pump, a multi-voltage LDO having an input which is capable of being coupled to an output of the charge pump, an ADC; and a pull-up resistor coupled between an output of the LDO and an input of the ADC. In another example embodiment, a method for headset signal multiplexing includes providing a headset with a plurality of signal sources and voltage division multiplexing the plurality of signal sources on a common wire.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: November 1, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Kenneth Jay Helfrich, Larry D. Barnes
  • Patent number: 9294048
    Abstract: An instrumentation amplifier includes a first amplifier having one input connected to a first input of the instrumentation amplifier, a second amplifier having one input connected to a second input of the instrumentation amplifier, and a feedback network. The feedback network including an active filter having a first low pass filter characteristic with a first cut-off frequency in respect of differential mode signals at the first and second inputs of the instrumentation amplifier, and a second low pass filter characteristic with a second cut-off frequency in respect of common mode signals at the first and second inputs of the instrumentation amplifier. The disclosure also relates to a device for acquiring biopotential signals and a signal amplification method.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: March 22, 2016
    Assignee: IMEC VZW
    Inventors: Nick Van Helleputte, Refet Firat Yazicioglu
  • Patent number: 9214217
    Abstract: An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.
    Type: Grant
    Filed: August 3, 2014
    Date of Patent: December 15, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Natsuki Ikehata, Kazuo Tanaka, Takeo Toba, Masashi Arakawa
  • Patent number: 9203364
    Abstract: Two LPFs are disposed on the output side of a differential amplifier to remove an AC component contained in an output signal output from a first output terminal of the differential amplifier and an AC component contained in an output signal output from a second output terminal of the differential amplifier. The lowpass filter voltage of the output signal output from the first output terminal with the AC component removed is input to one of input terminals of one of two comparators, and the lowpass filter voltage of the output signal output from the second output terminal with the AC component removed is input to one of input terminals of the other comparator.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: December 1, 2015
    Assignee: PANASONIC CORPORATION
    Inventors: Takayuki Abe, Koji Imamura, Kazutoshi Satou, Shigeki Nakamura
  • Patent number: 9189052
    Abstract: A system, a voltage regulator and a method for regulating power are disclosed, wherein the system may include a processor, a voltage regulator circuit, and a memory unit. The voltage regulator circuit may be configured to generate a first power supply voltage provided to the memory unit. The voltage regulator circuit may be further configured to adjust a voltage level of two output nodes dependent upon a level of the first power supply voltage and a level of a reference voltage. The voltage regulator circuit may be further configured to adjust the level of the first power supply signal dependent upon the level of at least one of the two output voltages. The voltage regulating circuit may also provide the first output voltage to the second output voltage via an impedance.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: November 17, 2015
    Assignee: Apple Inc.
    Inventors: Ajay Bhatia, Michael Dreesen
  • Patent number: 9166535
    Abstract: A circuit of an operational amplifier includes an operational main circuit, a plurality of current sources, and at least one clamp circuit. The current sources are configured to connect the operational main circuit to a high voltage source or a ground voltage source. The clamp circuit is connected between the operational main circuit and at least one of the current sources. Here, a transistor device connected to the clamp circuit has a crossing-voltage endurance level which is lower than a preset crossing-voltage endurance level of the operational main circuit.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: October 20, 2015
    Assignee: Novatek Microelectronics Corp.
    Inventors: Kuo-Che Hong, Ji-Ting Chen
  • Patent number: 9058044
    Abstract: A reference voltage generation circuit includes an auto-activation unit, an operational amplifier unit, and a tail current resistor. An input of the operational amplifier is grounded via the tail current resistor. The auto-activation unit is coupled to the operational amplifier so that the circuit operates at an operating point.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: June 16, 2015
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Sterling Smith, Ying-Jia Zhu, Jian-Ping Cheng
  • Patent number: 9035696
    Abstract: An amplifier includes a first input terminal, a second input terminal, a TIA, and a compensation circuit. The TIA includes a first transistor, a second transistor, a first current source connected to the first input terminal and an emitter of the first transistor, a second current source connected to the second input terminal and an emitter of the second transistor, a first load resistor connected to a collector of the first transistor, and a second load resistor connected to a collector of the second transistor. A bias voltage is supplied to bases of the first and second transistors, the compensation circuit adjusts a first load current and a second load current based on voltage signals, and the TIA outputs the voltage signals based on collector voltages of the first and second transistors.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: May 19, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Yoshiyuki Sugimoto
  • Patent number: 9028479
    Abstract: A radio-frequency (RF) amplifier having a direct response to an arbitrary signal source to output one or more electrosurgical waveforms within an energy activation request, is disclosed. The RF amplifier includes a phase compensator coupled to an RF arbitrary source, the phase compensator configured to generate a reference signal as a function of an arbitrary RF signal from the RF arbitrary source and a phase control signal; at least one error correction amplifier coupled to the phase compensator, the at least one error correction amplifier configured to output a control signal at least as a function of the reference signal; and at least one power component coupled to the at least one error correction amplifier and to a high voltage power source configured to supply high voltage direct current thereto, the at least one power component configured to operate in response to the control signal to generate at least one component of the at least one electrosurgical waveform.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Covidien LP
    Inventor: James H. Orszulak
  • Patent number: 8975963
    Abstract: A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based on the output signal, where the offset sensor includes a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset. A T-network in the circuit includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier. Since this method reduces the low-frequency component of the signal, it also shapes and reduces the flicker noise.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 10, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Ajit Sharma, Kemal S. Demirci
  • Publication number: 20150022268
    Abstract: A DC offset cancellation circuit is provided. The DC offset cancellation circuit includes a first operational amplifier and a feedback gain circuit. The first operational amplifier includes a first input transconductance stage, a second input transconductance stage and an output stage. An input terminal of the first input transconductance stage receives an input signal of the first operational amplifier through a first input terminal of the first operational amplifier. An output terminal of the output stage outputs an output signal of the first operational amplifier through an output terminal of the first operational amplifier. An input terminal of the feedback gain circuit is coupled to the output terminal of the first operational amplifier, and an output terminal of the feedback gain circuit is coupled to the input terminal of the second transconductance stage through a second input terminal of the first operational amplifier.
    Type: Application
    Filed: November 19, 2013
    Publication date: January 22, 2015
    Applicant: Novatek Microelectronics Corp.
    Inventor: Shiau-Wen Kao
  • Patent number: 8929808
    Abstract: A power amplifier, supplied by a supply voltage, to drive an antenna to output a magnetic field, comprising a differential stage configured to output an output signal to drive the antenna, and a feedback stage configured to receive a common mode output voltage from the differential stage and to output a feedback voltage to regulate the output common mode signal to be proportional to the supply.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: January 6, 2015
    Assignee: Broadcom Corporation
    Inventors: Bojko Marholev, Aminghasem Safarian
  • Patent number: 8928409
    Abstract: According to some embodiments, a trans-capacitance amplifier is exhibiting an input current of the biasing in the range of picoAmperes while allowing large output swings. The trans-capacitance amplifier comprises an operational amplifier, a feedback capacitor, circuitry to DC bias and to AC ground the non-inverting input of the operational amplifier, and circuitry to DC bias the inverting input of the operational amplifier. According to some embodiments, the circuitry to bias the inverting input comprises a cascade of degenerated differential pairs. The first transistor of the first pair and the second transistor of the last pair have an active load. The cascade of differential pairs and the active load create a trans-conductance amplifier with a very low equivalent trans-conductance. According to some embodiments, the same invention applies to a differential trans-capacitance amplifier.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 6, 2015
    Inventor: Ion E. Opris
  • Patent number: 8907729
    Abstract: The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: December 9, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Enrico Stefano Temporiti Milani, Wissam Yussef Sabri Eyssa, Gabriele Minoia
  • Patent number: 8896378
    Abstract: A differential amplifier circuit includes a differential operational amplifier that includes a differential pair circuit and operates based on a constant bias current supplied from a bias current source circuit, and the differential amplifier circuit includes a bias current generator circuit. A current monitor circuit detects two currents flowing through the differential pair circuit in correspondence with differential input voltages inputted to the differential pair circuit, and detects a minimum current of the two currents for a difference voltage of the differential input voltages as a monitored current. A current comparator circuit compares the monitored current with the constant bias current.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Tetsuya Hirose, Yuji Osaki, Yumiko Tsuruya, Osamu Kobayashi
  • Patent number: 8890613
    Abstract: A signal amplification circuit includes a differential amplifier configured to receive a first signal and a second signal and generate an output signal, a differential amplifier configured to receive first and second signals and generate an output signal; and a controller configured to control an amount of current flowing in the differential amplifier using the output signal.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: November 18, 2014
    Assignee: SK Hynix Inc.
    Inventor: Tae-Jin Hwang
  • Patent number: 8890612
    Abstract: A transconductance amplification stage (301) includes a differential pair (306) wherein a bias current flows through each transistor (302, 304) of the pair when input voltages are equal. Tail current boosting circuitry (320), which includes a tail transistor, provides a translinear expansion of tail current of the differential pair. A feedback loop (307) dynamically biases the differential pair to maintain current through one transistor (302) of the pair at the bias current value in spite of a difference between input voltages. Another transistor (304) of the pair provides an output current responsive to a difference between input voltages. The output current is not affected by a region of operation of the tail transistor. An output structure (300, 500) includes the transconductance amplification stage and a circuit (303) for mirroring the output current. An amplifier (800) includes the output structure as a buffer between other structures (801) and an output terminal.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 18, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ricardo Pureza Coimbra, Edevaldo Pereira da Silva, Jr.
  • Patent number: 8803610
    Abstract: An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: August 12, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Natsuki Ikehata, Kazuo Tanaka, Takeo Toba, Masashi Arakawa
  • Patent number: 8736373
    Abstract: An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a ground voltage (AGND). The comparator compares an input voltage and an output voltage and outputs a control signal to the bias current source according to the compared result to control a bias current outputted by the bias current source to enhance the slew rate of the output buffer.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: May 27, 2014
    Assignee: Raydium Semiconductor Corporation
    Inventors: Chien-Ming Chen, Yann-Hsiung Liang, Hui-Wen Miao, Ko-Yang Tso
  • Patent number: 8736372
    Abstract: An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a half analog supply voltage (HAVDD), or both operated between the half analog supply voltage (HAVDD) and a ground voltage. The comparator compares an input signal with an output signal and outputs a control signal to the bias current source according to the compared result.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: May 27, 2014
    Assignee: Raydium Semiconductor Corporation
    Inventors: Chien-Ming Chen, Yann-Hsiung Liang, Hui-Wen Miao, Ko-Yang Tso
  • Patent number: 8723600
    Abstract: A circuit utilizes a MOS device in a triode mode of operation and includes a biasing circuit and a MOS device. The MOS device has a drain, a source, and a gate terminal, and is coupled to the biasing circuit. The source terminal, drain terminal, and gate terminal each has a potential and the drain and the source terminals have a resistance. The biasing circuit couples the drain and source terminals of the MOS device to the gate terminal of the MOS device. The biasing circuit couples a DC potential to the gate terminal to adjust the resistance between the source and drain terminals of the MOS device. The resistance between the source and drain terminals is a non-linear function of voltage potentials at the source and drain terminals. The biasing circuit reduces the non-linearity of the resistance between the drain and source terminals by modulating the potential at the gate terminal by a combination of source and drain terminal potentials.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: May 13, 2014
    Assignee: Invensense, Inc.
    Inventors: Baris Cagdaser, Du Chen
  • Patent number: 8717083
    Abstract: A method including receiving an input signal; amplifying the input signal to generate an output signal using a cascade of a plurality of amplifier stages including a first amplifier stage and a last amplifier stage; generating a voltage signal by sensing the output signal in a noninvasive manner so that the sensing results in substantially no change to the output signal; generating a current signal from the voltage signal using a transconductance amplifier; and injecting the current signal into an output node of the first amplifier stage in a noninvasive manner so that the injecting results in substantially no change to an amplification function of the first amplifier stage.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 6, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8692616
    Abstract: A folded cascode operational amplifier includes a constant current source to output a constant current; a differential input stage to output a part of the constant current as a differential current based on a voltage difference between voltages input to an inverting input terminal and a non-inverting input terminal, and connected to the constant current source; and an output stage to output a remaining current obtained by subtracting the differential current from the constant current as an output stage current, and connected parallel to the differential input stage facing the constant current source.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: April 8, 2014
    Assignee: Fujitsu Limited
    Inventor: Kunihiko Gotoh
  • Patent number: 8674766
    Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow
  • Patent number: 8593218
    Abstract: Aspects of the present invention provide apparatuses and methods to provide slew rate enhancement during an initial stage of operation of an amplifier and processing of an input signal with low noise introduction during a subsequent amplification stage of operation. During the initial stage, a high bandwidth component of the amplifier can be engaged to provide slew rate enhancement of the overall amplifier. The adaptive slew rate enhancement can be based on a detected imbalance of an output of a low bandwidth component of the amplifier. Once a desired operating state of the amplifier is achieved, the high bandwidth component can be disengaged. The low bandwidth component can then solely operate on a received input signal during the amplification stage. The low bandwidth component can be low power and can introduce low levels of noise, thereby ensuring minimal noise introduction and corruption of the amplified output signal of the amplifier.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: November 26, 2013
    Assignee: Analog Devices, Inc.
    Inventor: Padraig Cooney
  • Publication number: 20130278338
    Abstract: The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications.
    Type: Application
    Filed: April 17, 2013
    Publication date: October 24, 2013
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Enrico Stefano TEMPORITI MILANI, Wissam Yussef Sabri EYSSA, Gabriele MINOIA
  • Publication number: 20130271217
    Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.
    Type: Application
    Filed: June 6, 2013
    Publication date: October 17, 2013
    Inventors: Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow
  • Publication number: 20130257536
    Abstract: A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based on the output signal, where the offset sensor includes a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset. A T-network in the circuit includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier. Since this method reduces the low-frequency component of the signal, it also shapes and reduces the flicker noise.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 3, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: AJIT SHARMA, Kemal S. DEMIRCI
  • Patent number: 8482352
    Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: July 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow
  • Patent number: 8482265
    Abstract: A current balance circuit includes a first branch and a second branch in parallel between a power supply unit and at least one load, which respectively include a switch. The current balance circuit detects and compares currents flowing through the first branch and the second branch. The current balance circuit also generates triangle waves and reversed triangle waves, compares voltage of a control pole of a first switch with the triangle waves, and compares voltage of the control pole of a second switch with the reversed triangle waves. Then the current balance circuit controls if the triangle waves and the reversed triangle waves are input to the first switch and the second switch according to the currents flowing through the first branch and the second branch to adjust impedance of the first switch and the second switch to balance the currents flowing through the first branch and the second branch.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: July 9, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Yi-Guo Chiu
  • Patent number: 8456240
    Abstract: A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: June 4, 2013
    Assignee: International Business Machines Corporation
    Inventors: Fuad E. Doany, Alexander V. Rylyakov, Clint L. Schow
  • Patent number: 8456215
    Abstract: A limiting amplifier and method are provided. In one implementation an apparatus includes a plurality of amplifier stages including a first amplifier stage and a last amplifier stage configured in a cascade arrangement, and a transconductance amplifier, wherein the first amplifier stage is configured to receive an input signal; the last amplifier stage outputs an output signal; the transconductance amplifier is configured receive a voltage signal from the last amplifier stage via a first resistor; and the transconductance amplifier is configured to output a current signal to an output node of the first amplifier stage via a second resistor in a negative feedback manner.
    Type: Grant
    Filed: September 25, 2011
    Date of Patent: June 4, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8456235
    Abstract: The present invention is contrived to adopt a differential pair type amplifier circuit comprising a differential pair constituted by a first transistor receiving an input of a first signal and by a second transistor receiving an input of a third signal generated by outputting a second signal of which the voltage level is a power supply voltage. Elements requiring a matching are two transistors constituting the differential pair for the amplifier circuit. Because of this, the elements requiring a matching can be placed close to each other regardless of a layout between the amplifier circuits.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: June 4, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Suguru Tachibana, Kenta Aruga, Tatsuo Kato
  • Patent number: 8432223
    Abstract: A differential amplifier circuit can reduce consumption current and the circuit size while improving a power supply rejection ratio. The differential amplifier circuit includes a power supply line and an input part that includes an input circuit and an active load. The input circuit includes two differential input elements, and the active load includes two transistors connected to the two differential input elements. The input part generates a differential signal in response to an input signal given to the two differential input elements. The differential amplifier circuit also includes an amplifying part for generating an output voltage generating signal by amplifying the differential signal. The differential amplifier circuit also includes an output part for generating an output voltage based on the output voltage generating signal and a power supply voltage.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: April 30, 2013
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Tetsuo Oomori
  • Publication number: 20130084799
    Abstract: A power amplifier, supplied by a supply voltage, to drive an antenna to output a magnetic field, comprising a differential stage configured to output an output signal to drive the antenna, and a feedback stage configured to receive a common mode output voltage from the differential stage and to output a feedback voltage to regulate the output common mode signal to be proportional to the supply
    Type: Application
    Filed: September 29, 2011
    Publication date: April 4, 2013
    Applicant: Broadcom Corporation
    Inventors: Bojko MARHOLEV, Aminghasem SAFARIAN
  • Patent number: 8400214
    Abstract: This disclosure describes at least one class AB amplifier output stage circuit arrangement that can operate at low supply voltages, with minimum current generated. Furthermore, at least one class AB amplifier stage circuit arrangement described herein reacts favorably to a supply voltage, that is, exhibits a good power supply rejection ratio. Moreover, this disclosure describes class AB amplifier output stage circuit arrangements that include a negative channel metal oxide semiconductor (NMOS) transistor current mirror arrangement and a positive channel metal oxide semiconductor (PMOS) transistor current mirror arrangement. In some implementations, a monitoring circuit may be coupled to a class AB amplifier output stage circuit arrangement to offset mismatch that may occur in the class AB amplifier output stage.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: March 19, 2013
    Assignee: Infineon Technologies AG
    Inventor: Dieter Draxelmayr
  • Patent number: 8390742
    Abstract: In a semiconductor integrated circuit arranged to perform sag compensation for a video signal, an operational amplifier includes a non-inverted input terminal, an inverted input terminal, and an output terminal, in which a video signal is input to the non-inverted input terminal. A first resistor includes a first end connected to the inverted input terminal and a second end being grounded. The output terminal is connected to a first external terminal and the inverted input terminal is connected to a second external terminal. A second resistor includes a first end connected to the output terminal and a second end connected to the inverted input terminal. A first capacitor is disposed between the first external terminal and the second external terminal and connected in parallel to the second resistor, and the second resistor has a resistance value determined based on a capacitance value of the first capacitor.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: March 5, 2013
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Shuhei Abe, Nagayoshi Dobashi, Yoshiaki Hirano
  • Patent number: 8368673
    Abstract: An output buffer and a source driver for a display panel are provided. The output buffer includes a differential input stage, a bias current source, a feedback module, and an output stage. The differential input stage has a first input terminal and a second input terminal receiving a first input signal and a second input signal respectively, and a first output terminal. The bias module provides a bias current to the differential input stage. The output stage has a second output terminal coupled to the first input terminal for providing an output current to the second output terminal based on a signal of the first output terminal. The feedback module adjusts the bias current and the output current based on the first input signal and the second input signal. The output buffer has ability of switching the output voltage to be low level and high level in high-speed.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: February 5, 2013
    Assignees: Himax Technologies Limited, NCKU Research & Development Foundation
    Inventors: Chien-Hung Tsai, Jia-Hui Wang, Ching-Chung Lee