Abstract: A differential amplifier circuit can reduce consumption current and the circuit size while improving a power supply rejection ratio. The differential amplifier circuit includes a power supply line and an input part that includes an input circuit and an active load. The input circuit includes two differential input elements, and the active load includes two transistors connected to the two differential input elements. The input part generates a differential signal in response to an input signal given to the two differential input elements. The differential amplifier circuit also includes an amplifying part for generating an output voltage generating signal by amplifying the differential signal. The differential amplifier circuit also includes an output part for generating an output voltage based on the output voltage generating signal and a power supply voltage.

Abstract: A power amplifier, supplied by a supply voltage, to drive an antenna to output a magnetic field, comprising a differential stage configured to output an output signal to drive the antenna, and a feedback stage configured to receive a common mode output voltage from the differential stage and to output a feedback voltage to regulate the output common mode signal to be proportional to the supply

Abstract: This disclosure describes at least one class AB amplifier output stage circuit arrangement that can operate at low supply voltages, with minimum current generated. Furthermore, at least one class AB amplifier stage circuit arrangement described herein reacts favorably to a supply voltage, that is, exhibits a good power supply rejection ratio. Moreover, this disclosure describes class AB amplifier output stage circuit arrangements that include a negative channel metal oxide semiconductor (NMOS) transistor current mirror arrangement and a positive channel metal oxide semiconductor (PMOS) transistor current mirror arrangement. In some implementations, a monitoring circuit may be coupled to a class AB amplifier output stage circuit arrangement to offset mismatch that may occur in the class AB amplifier output stage.

Abstract: In a semiconductor integrated circuit arranged to perform sag compensation for a video signal, an operational amplifier includes a non-inverted input terminal, an inverted input terminal, and an output terminal, in which a video signal is input to the non-inverted input terminal. A first resistor includes a first end connected to the inverted input terminal and a second end being grounded. The output terminal is connected to a first external terminal and the inverted input terminal is connected to a second external terminal. A second resistor includes a first end connected to the output terminal and a second end connected to the inverted input terminal. A first capacitor is disposed between the first external terminal and the second external terminal and connected in parallel to the second resistor, and the second resistor has a resistance value determined based on a capacitance value of the first capacitor.

Abstract: An output buffer and a source driver for a display panel are provided. The output buffer includes a differential input stage, a bias current source, a feedback module, and an output stage. The differential input stage has a first input terminal and a second input terminal receiving a first input signal and a second input signal respectively, and a first output terminal. The bias module provides a bias current to the differential input stage. The output stage has a second output terminal coupled to the first input terminal for providing an output current to the second output terminal based on a signal of the first output terminal. The feedback module adjusts the bias current and the output current based on the first input signal and the second input signal. The output buffer has ability of switching the output voltage to be low level and high level in high-speed.

Abstract: A signal generating apparatus comprises an amplifier, which comprises differential input terminals for receiving a first input signal, a common mode output signal adjusting terminal for receiving a second input signal, and an output terminal. The signal generating apparatus may provide two or more differential output signals according to the first input signal, and provide two or more common mode output signals according to the second input signal. The amplifier provides an output signal comprising one of the differential output signals and one of the common mode output signals at the output terminal.

Abstract: A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.

Abstract: An amplifier with bias stabilizer includes first to forth transistors, an amplifier unit and a resistor. The first transistor and the second transistor are connected in series between first and second power supplies and generate a first current. The third transistor is connected in a current mirror configuration to the second transistor and generates a second current corresponding to the first current. The amplifier unit generates an output signal based on an input signal and includes a fourth transistor, the fourth transistor generating a control voltage according to the second current so as to control the first transistor. The resistor is connected in series to at least one of the first to fourth transistors.

Abstract: A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a reference voltage. A bridge circuit is differentially coupled to two supplementary current sources and controlled to rapidly switch the current from the supplementary current sources to produce output voltages at respective outputs that are approximately equal to respective one of two reference voltages.

Abstract: The instant invention relates to an apparatus and method for enhancing DC offset correction speed of a radio device. On the exemplary, the apparatus includes one or two-stage signal-processing units and a controller. Each signal-processing unit has a baseband filter, a gain stage and a DC offset correction (DCOC) loop applied on the gain stage. A connection direction of an electrode terminal of a capacitor of the baseband filter is capable of being switched by the controller to process a pre-charge or a discharge phases thereby adjusting a bandwidth of the baseband filter to be either a normal operational bandwidth or wider than the normal operational bandwidth for rapidly setting time of the baseband filter.

Abstract: A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.

Abstract: One embodiment relates to a continuous-time circuit configured with an offset cancellation loop. The continuous-time circuit includes a multi-stage amplifier chain, including a first amplifier stage and a last amplifier stage, and an offset cancellation loop. The offset cancellation loop is configured to receive an output of the last amplifier stage and to provide an offset correction voltage signal to the first amplifier stage. The offset compensation loop may create one dominant pole and a single consequential parasitic pole so as to have greater stability and may advantageously achieve a second-order roll-off in response magnitude at higher frequencies. Other embodiments, aspects, and features are also disclosed.

Abstract: One embodiment relates to a continuous-time circuit configured with an offset cancellation loop. The continuous-time circuit includes a multi-stage amplifier chain, including a first amplifier stage and a last amplifier stage, and an offset cancellation loop. The offset cancellation loop is configured to receive an output of the last amplifier stage and to provide an offset correction voltage signal to the first amplifier stage. The offset compensation loop may create one dominant pole and a single consequential parasitic pole so as to have greater stability and may advantageously achieve a second-order roll-off in response magnitude at higher frequencies. Other embodiments, aspects, and features are also disclosed.

Abstract: A receiver arrangement includes a single ended multiband feedback amplifier, at least one single ended input, differential output mixer arrangement including a main mixer and a trim mixer, and a mixer feedback loop circuit configured to receive differential output signals generated by the mixer arrangement. The mixer feedback loop circuit generates a feedback signal based on the received differential output signals and provides the feedback signal to the mixer arrangement to minimize DC-offset and second order intermodulation products. The single ended multiband feedback amplifier may include an input stage and a programmable resonance tank circuit connected to the input stage for suppressing downconverted noise from harmonics of the LO-frequency, and a configurable feedback net that shapes the frequency response of a feedback loop including the feedback net based on a band operation of the single ended multiband feedback amplifier.

Abstract: An amplifier circuit (100) has an input stage (OP1) and an output stage (Q1, Q2) operating with different supply voltages and different quiescent voltages. The output stage has a feedback input connected to receive a feedback signal from the output of the output stage. A biasing circuit (602) applies a bias signal (Ioff) to said input stage at an operating level appropriate to establish a quiescent output voltage different from a ground reference level of the input stage.

Abstract: A current control circuit for controlling a bias current of a class AB operational amplifier includes: a low current source, for generating a low bias current; a high current source, for generating a high bias current, which is greater than the low bias current; and a comparing and selecting unit, coupled to an output terminal of the class AB operational amplifier, for selecting one of the low bias current and the high bias current to output as the bias current according to an output voltage of the class AB OP.

Abstract: A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.

Abstract: A driver circuit for a semiconductor laser diode (LD) is disclosed, in which the driver circuit drives the LD in the differential mode and lowers the power consumption thereof. The driver circuit includes a differential unit to provide the modulation current to the LD, a voltage converter to provide a positive power supply to the differential unit, a detector to detect the common mode voltage of the differential outputs of the unit, and a comparing unit to control the voltage converter dynamically such that the output common mode voltage is set in a preset reference level.

Abstract: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.

Abstract: Provided is an operational amplifier circuit including a Rail-to-Rail differential amplifier including: first and second differential transistors forming a first differential pair; and third and fourth differential transistors forming a second differential pair, wherein each of the first and second differential transistors is an n-type MOS transistor, each of the third and fourth differential transistors is a p-type MOS transistor, and the operational amplifier circuit further includes: a first correction current supply unit configured to supply the first differential pair with a first correction current to adjust an input offset voltage of the operational amplifier circuit; and a second correction current supply unit configured to supply the second differential pair with a second correction current to adjust the input offset voltage of the operational amplifier circuit.

Abstract: An improved rail-to-rail (R-R) input stage circuit with dynamic bias control is described. Input stage circuit includes a differential pair circuit, a level shifted differential pair and a bias control circuit. The differential pair circuit and the level shifted differential pair are of same type, non-complementary MOS devices. In exemplary embodiments, a first and a second bias control circuits dynamically control the bias current of the level shifted differential pair and the bias current of the differential pair circuit, respectively, in response to the input common mode voltage of the rail-to-rail input stage circuit. First and second bias control circuits maintain the output impedance of the R-R input stage circuit at a desired level, as the R-R input stage circuit operates outside the input common mode voltage range supported by the level shifted differential pair and the differential pair circuit, respectively. Further exemplary embodiments include a first and a second gm control circuits.

Abstract: An amplifier circuit includes an amplifier section that includes a P-type differential section, an N-type differential section, and an output section, an offset adjustment section that adjusts an offset of the amplifier section, a first offset adjustment register that stores a first offset adjustment value for the P-type differential section, a second offset adjustment register that stores a second offset adjustment value for the N-type differential section, and a control section that sets the first offset adjustment value in the offset adjustment section in a first operation mode in which the P-type differential section operates, and sets the second offset adjustment value in the offset adjustment section in a second operation mode in which the N-type differential section operates.

Abstract: Green Design is to save the resource and energy for earth. Applying the recycling of energy concept to the electrical and electronic device and circuit, we can save many nuclear power plants to save the earth and human society. Comparing with today power amplifier PA has only 10% efficiency, the high linearity and high efficiency power-managing amplifier PMA and differential power managing amplifier DPMA can have the power efficiency more than 95%. The recycling switch inductor drive power management unit PMUx gets rid of the switch loss and has power efficiency more than 99%. The Xtaless Clock generator based on on-chip gain-boost-Q LC tank and the Spurfree and Jitterless Frequency & Phase Lock Loop FPLL. The DPMA directly supply the power to the plasma light. The charge doped light mirror reduces the voltage swing, increases the power efficiency and operating speed of plasma light, projective TV, LaserCom.

Abstract: The invention is directed to an amplifier including an absolute value circuit. The absolute value circuit may be driven by differential potentials and may include a first pair of transistors modulating a tail current of the amplifier when a differential input voltage goes high, and a second pair of transistors modulating the tail current of the amplifier when a differential input voltage goes low.

Abstract: A fully differential amplifier circuit according to one embodiment includes a first section for generating first and second output signals on first and second outputs from first and second input signals; a first feedback loop coupled to the first section, the first feedback loop including a second section for adjusting the first output signal towards a common mode voltage level, and for reducing an offset voltage of the first output signal; a second feedback loop coupled to the first section, the second feedback loop including a third section for adjusting the second output signal towards the common mode voltage level, and for reducing an offset voltage of the second output signal; and a filter section positioned on the first and second feedback loops between outputs of the second and third sections and the first section.

Abstract: In one embodiment, a method includes receiving, at a filter comprising a Miller amplifier, a differential data signal output by a limiting amplifier (LA), the data signal comprising an output direct current (DC) offset resulting at least in part from a threshold-adjustment signal applied to the LA or an intrinsic DC offset caused by physical characteristics of the LA. In one embodiment, the method additionally includes generating a compensation signal based on the threshold-adjustment signal, a polarity of the compensation signal being opposite a polarity of the threshold-adjustment signal or the DC offset, a magnitude of the compensation signal being a function of the magnitude of the threshold-adjustment signal. In one embodiment, the method further includes introducing the compensation signal to an internal node of the Miller amplifier to compensate for the DC offset to keep one or more amplifier stages of the Miller amplifier in their linear operating regions.

Abstract: In one embodiment, a method includes receiving, at a filter comprising a Miller amplifier, a differential data signal output by a limiting amplifier (LA), the data signal comprising an output direct current (DC) offset resulting at least in part from a threshold-adjustment signal applied to the LA or an intrinsic DC offset caused by physical characteristics of the LA. In one embodiment, the method additionally includes generating a compensation signal based on the threshold-adjustment signal, a polarity of the compensation signal being opposite a polarity of the threshold-adjustment signal or the DC offset, a magnitude of the compensation signal being a function of the magnitude of the threshold-adjustment signal. In one embodiment, the method further includes introducing the compensation signal to an internal node of the Miller amplifier to compensate for the DC offset to keep one or more amplifier stages of the Miller amplifier in their linear operating regions.

Abstract: Provided are a variable gain amplifier and a receiver including the same. The variable gain amplifier includes: a gain controller generating a gain control voltage; a variable gain amplifier amplifying an input signal and a feedback signal by using a voltage gain that is linearly proportional to the gain control voltage, and converting the amplified signal into a predetermined magnitude of a signal; and an offset canceller removing an offset from an output signal of the variable gain amplifier and outputting the offset removed result as the feedback signal. The variable gain amplifier includes a plurality of operational transconductance amplifiers.

Abstract: To provide a common-mode feedback circuit that feeds back signal corresponding to common-mode components of output terminal voltage of first and second amplifiers to input terminals of the first and second amplifiers via first and second passive elements connected to a common terminal, respectively.

Abstract: A differential amplifier includes a main differential amplifier circuit that receives a pair of input signals and supplies a pair of output signals based on a difference between the input signals; and a bias control differential amplifier circuit that receives the pair of output signals, controls a control terminal of a current-limiting transistor making up the main differential amplifying circuit based on an offset voltage included in the output signals, and reduces the offset voltage.

Abstract: A common-mode voltage controller for adjusting common-mode voltages between a first buffer and a second buffer at a subsequent stage or a preceding stage of the first buffer in a signal transmission circuit, comprising: a first reference voltage generation unit for generating a common-mode voltage corresponding to the first buffer; a second reference voltage generation unit for generating a common-mode voltage corresponding to the second buffer at the subsequent stage or the preceding stage; and a control signal generation unit for generating a control signal for controlling a common-mode voltage of the first buffer according to a difference voltage between an output of the first reference voltage generation unit and an output of the second reference voltage generation unit, and giving the control signal to the first buffer and first reference voltage generation unit.

Abstract: An amplifying device has an amplifier which amplifies an input signal supplied from an input terminal and outputs the amplified input signal, a feedback loop which has at least one of a resistive element and a capacitance connected between an output terminal of the amplifier and the input terminal, a variable current unit which adjusts a current value in accordance with a controlling signal and supplies an operating current to the amplifier, a signal analyzing unit which generates a time difference signal having a value corresponding to a slew rate of the input signal and outputs the time difference signal, and a controlling unit which generates the controlling signal in accordance with the time difference signal and outputs the controlling signal.

Abstract: A multi-stage Class AB amplifier system includes a first Class AB amplifier circuit configured to receive an input signal. A bias circuit is configured to receive an output of the first Class AB amplifier circuit. A second Class AB amplifier circuit is in communication with the bias circuit. The second Class AB amplifier circuit is configured to generate an output signal. A current mirror circuit is arranged between the first Class AB amplifier circuit and the bias circuit. A common-mode feedback circuit is configured to generate a feedback signal based on the output signal.

Abstract: A multi-stage Class AB amplifier system includes a first Class AB amplifier circuit and a second Class AB amplifier circuit. A current mirror circuit is in communication with the first Class AB amplifier circuit. A bias circuit is in communication with the current mirror circuit. A frequency compensation circuit is arranged between the bias circuit and the second Class AB amplifier circuit. A common-mode feedback circuit is in communication with the second Class AB amplifier circuit. The common-mode feedback circuit is configured to generate a feedback signal.

Abstract: A radio frequency (RF) power amplifier includes a low impedance pre-driver driving the input of a common-source output amplifier stage. The preamplifier includes a first transistor that has a first terminal coupled to a preamplifier RF input node, a second terminal coupled to a preamplifier RF output node, and a third terminal coupled to a supply voltage node. A first inductor is coupled between the RF output node and a bias voltage node. A voltage difference between respective first and second voltages on the RF input node and the RF output node that are substantially in phase, determines current through the first transistor.

Abstract: An exemplary negative impedance converting circuit for functioning as a voltage buffer and/or negating the impedance of a connected load. The negative impedance converting circuit includes inputs, outputs, a first transconductance stage and a second transconductance stage. The transconductance gain value of the first transconductance stage is greater than a transconductance gain value of the second transconductance stage. Exemplary embodiments of a reference voltage buffer using the negative impedance converting circuit are also described.

Abstract: The present invention relates to a DC offset canceling circuit. In one aspect of the invention, a DC offset canceling circuit with independently configurable gain and roll-off frequency is provided. In one embodiment of the present invention, the DC offset canceling circuit is used in the receive path of a down-conversion wireless receiver. In another aspect of the invention, a method for independently varying the gain and the roll-off frequency of the DC offset canceling circuit is provided. In one embodiment, the method is used to independently operate a gain control scheme and a DC offset cancellation strategy in a DC canceling circuit.

Abstract: A limiting amplifier with an input stage with dc offset cancellation, identical gain stages, an output buffer and a feedback filter. The input stage receives a differential input signal and outputs a first intermediate differential signal. The gain stages are cascaded to amplify the first intermediate differential signal and generate a second intermediate differential signal, amplified by the output buffer to produce an output signal. The feedback filter provides a dc offset voltage of the output signal to the input stage for the dc offset cancellation. The input stage comprises a resistor network coupled between a pair of input nodes and a power line and comprising a common resistor, a pair of load resistors and a shunt resistor. The load resistors share a common terminal connected to the common resistor that is connected to the power line. The shunt resistor has two terminals respectively connected to the load resistors.

Abstract: A semiconductor integrated circuit device includes: an amplifier circuit which respectively has one or more input terminals and one or more output terminals; a replica circuit which has the same DC characteristics as those of the amplifier circuit; a reference voltage generation circuit which is connected to a bias terminal of the replica circuit, and which generates a predetermined reference voltage at the bias terminal; and a feedback circuit which takes a difference between the reference voltage generated at the bias terminal of the replica circuit and the voltage generated at a bias terminal of the amplifier circuit, and which performs feedback control by providing negative feedback of the difference to the bias terminal of the amplifier circuit so that the voltage generated at the bias terminal of the amplifier circuit is made equal to the reference voltage generated at the bias terminal of the replica circuit.

Abstract: This disclosure relates to a common mode regulation in multi stage differential amplifiers.

Abstract: An operational amplifier includes an output unit, a voltage drop element and a feedback unit. The output unit is provided for sourcing an output current to an output of the operational amplifier when operating with a power unit for providing a current being multiple times the value of the output current. The voltage drop is provided for generating a voltage drop in accordance with the output current. The feedback unit is controlled with the voltage drop generated by the voltage drop element and controls the output unit and the power unit to regulate the output current in accordance with the voltage drop.

Abstract: An exemplary negative impedance converting circuit for functioning as a voltage buffer and/or negating the impedance of a connected load. The negative impedance converting circuit includes inputs, outputs, a first transconductance stage and a second transconductance stage. The transconductance gain value of the first transconductance stage is greater than a transconductance gain value of the second transconductance stage. Exemplary embodiments of a reference voltage buffer using the negative impedance converting circuit are also described.

Abstract: A method is for reducing a DC component of an input signal transposed into baseband and being generated by a first frequency transposition stage starting from an initial signal and from a transposition signal. The method includes amplifying the transposed input signal in a first amplifier. The first amplifier receives at a DC offset compensation input, a compensation signal extracted from an output signal of a second amplifier subjected to a compensation of a offset DC voltage of the second amplifier. The method also included alternating between receiving at an input of the second amplifier, a first auxiliary signal from an auto-transposition of a transposition signal in a second frequency transposition stage and a second auxiliary signal from a transposition of the initial signal in the second frequency transposition stage with the transposition signal.

Abstract: A new offset canceling circuit for a differential circuit is disclosed whose input offset voltage may be cancelled independent of the variation of the input level, accordingly, enables the cut-off frequency of the canceling circuit unchanged. The offset canceller of the invention provides a buffer amplifier and a filter. The filter includes a capacitance multiplier including an operational amplifier (Op-Amp) operating in the inverting mode and a capacitor connected between the input and output of the Op-Amp. The Op-Amp operating in the inverting mode whose closed loop gain is solely determined by resistors, and the capacitance of the capacitor is multiplied by the closed loop gain of the Op-Amp by the Miller effect.

Abstract: A multi-stage Class AB amplifier system comprises a first Class AB amplifier circuit that receives an input signal. A bias circuit receives an output of the first Class AB amplifier circuit. A second Class AB amplifier circuit having an input that communicates with an output of the bias circuit and that generates an output signal. A common-mode feedback circuit generates a feedback signal to the first Class AB amplifier circuit based on the output signal.

Abstract: A semiconductor circuit according to the present invention includes: a differential input section to receive input differential signals; a load resistance section to output a voltage according to a current output by the differential input section; differential signal output terminals to output a differential signal corresponding to the voltage output from the load resistance section; a low-pass filter to extract a direct-current component of the differential signal output from the differential signal output terminals; and a load adjustment section to feed back the direct-current component extracted by the low-pass filter to adjust a resistance value of the load resistance section.

Abstract: A circuit and method for tracking a local oscillator signal frequency in an RF tuner, for tuning input RF signals. The RF tuner includes a frequency-dependent impedance generator that generates a frequency-dependent impedance at the input by rejecting unwanted input RF signals and shunt feeding back the desired signal to the input. The desired signal frequency is centered at the local oscillator signal frequency. The frequency-dependent impedance generator is used with an amplifier circuit to generate a tracking amplifier, the frequency-dependent amplifier gain of which tracks the local oscillator signal frequency.

Abstract: A microphone preamplifier, comprising a differential input (102) stage with a first and a second input terminal and an output stage with an output terminal; where the microphone preamplifier is integrated on a semiconductor substrate. A feedback circuit, with a low-pass frequency transfer function (103), is coupled between the output terminal and the first input terminal and integrated on the semiconductor substrate. The second input terminal provides an input for a microphone signal (105). Thereby a very compact (with respect to consumed area of the semiconductor substrate), low noise preamplifier is provided.

Abstract: A fully differential amplifier circuit provided according to an aspect of the present invention contains a stabilization block to measure the common mode component at the output of an input stage, and to inject a current proportionate to the common mode component into each of a pair of paths forming the output of the input stage to stabilize a feedback loop formed by the input stage, an output stage and a common mode feedback block. In an embodiment, the stabilization block contains a buffer to receive the measured common mode component and to provide a buffered output. The injected current is generated based on the buffered output. Due to the presence of the buffer, the differential loop may not be affected by injection of the additional current, thereby avoiding any distortions in the output signal.

Abstract: Effective control of the common-mode level of amplifiers is obtained through control structures (both closed-loop and open-loop structures) which are directed to various amplifier functions such as the reduction of amplifier loading, accurate sensing of common-mode levels, mitigation of headroom restraints, and proper transistor biasing. This common-mode control is especially useful in multiplying analog-to-digital converters (MDACs) of signal processing systems.