Abstract: A low noise amplifier structure based on a Differential Difference Amplifier (DDA1) having a differential output (outp, outn) and two differential pairs of input terminals (N1, P1; N2, P2). The input signal (V.sub.IN) is applied to terminals (N2, P1) which belong to different differential pairs. In this way, none of the differential pairs receives a high input signal, and hence none of them cause unacceptable harmonic distortion. The dynamic input range is thus high. The gain of the structure is determined by a resistive circuit (R2a, R2a'; R2b, R2b') coupled to the remaining terminals (N1, P2) of the differential pairs. The common mode of these remaining terminals (N1, P2) is, independently from the output common mode, biased at the input common mode via a common mode feedback circuit (DDA2; GL1, GH1, GH3, R2a, R2a'; GL2, GH2, GH4, R2b, R2b') based on a second differential difference amplifier (DDA2).

Abstract: A low-voltage multipath-miller-zero-compensated operational amplifier is disclosed which includes a class AB front stage and a class AB back stage. The front stage has an inverted input, a non-inverted input, an inverted output, and a non-inverted output. The back stage has an output and input, which input is connected to the non-inverted output of the front stage. The output of the back stage is connected to the inverted output of the front stage. A capacitor is coupled in a feedback loop between the output and inverted input of the back stage. An operational amplifier in accordance with the present invention is particularly well-suited for use in switched-capacitor filters, continuous-time filters, microwave medical applications and general purpose amplification applications.

Abstract: A reference buffer suitable for driving switched-capacitor or resistive load circuits provides a very low output impedance. The reference buffer utilizes an amplifier with a very large and controlled transconductance configured in feedback and compensated by a load capacitance. Cascaded gain stages are used to provide a large, controlled transconductance. In one embodiment, a reference buffer amplifier includes a plurality of voltage gain amplifiers connected in cascade and at least one transconductance amplifier connected to a last-connected of the plurality of voltage gain amplifiers. The amplifier may further include at least one current mirror amplifier connected to the at least one transconductance amplifier. In another embodiment, the reference buffer amplifier includes at least one transconductance amplifier and at least one current mirror amplifier cascade-connected to the at least one transconductance amplifier. The amplifiers can be differential or single-ended.

Abstract: A new improved all monolithic transceiver may be manufactured on a single semiconductor die for operation from a single +5 v power supply. The transceiver includes a transmitter of novel design which provides zero output current for a zero signal input. The transmitter may include a linear feedback operational amplifier driver, wherein the driver bias current is enabled only in the presence of a driver input signal. The transceiver is designed to meet the requirements of both MIL-STD 1553 as well as the McDonnell Douglas(MACAIR) A3818, A4905, A5232 and A5690.

Abstract: A two-stage switched-capacitor CMOS Miller-compensated amplifier uses only n-channel transistors in its signal path to reduce the deleterious effects of parasitic capacitances in the signal path while still obtaining a high transconductance in both stages. A transistor inserted in series with the Miller capacitor between the output and input of the second stage of the amplifier introduces a feedforward zero in the left half of the S-plane of the circuit. By appropriately sizing the aspect ratio and properly biasing this transistor, the second pole of the amplifier is canceled with the introduced zero. Dummy transistors having their sources and drains connected (to serve as capacitors) are cross-connected between opposite polarity inputs and outputs of a differential pair of input transistors in the first stage to effectively cancel the gate-to-drain Miller-multiplied capacitance of the input transistors.

Abstract: A comparator with a built-in offset is disclosed. The comparator includes a bias current circuit, a differential input stage with the built-in offset, and a hysteresis circuit. The built-in offset is generated by using a resistor in the differential input stage of the comparator such that the resistor is driven by the bias current as well as the current generated by the hysteresis circuit. Additionally, a reset circuit which uses the comparator with the built-in offset is described. The reset circuit uses a voltage divider circuit to divide a first input voltage to the comparator. A band-gap voltage reference is used to provide a second input voltage to the comparator. Therefore, the reset circuit generates a reset signal when the divided voltage reaches the value of the band-gap voltage plus the offset. In another embodiment, a comparator having a differential input stage, an output stage, and a bias circuit with a hysteresis circuit is disclosed.

Abstract: An amplifier circuit having four variable impedance nodes is provided. The amplifier has split transconductance current paths. Each half of the amplifier has two such current paths and each current path has a node which may be either a high impedance or low impedance node. Connected between the two nodes is a transistor which is utilized in driving the nodes to their either high or low impedance state. The invention is particularly useful in a folded cascode amplifier used for driving loud speakers. However, the circuitry may also be used in other amplifiers or other applications. Further, the linearity of the amplifier's transfer curve may be improved to provide improved performance for high resistive loads. Thus, a class A-B amplifier is provided which can drive a wide range of resistive loads with varying linearity requirements. Moreover, the amplifier can be programmed to provide a high linearity region depending on the desired application.

Abstract: In a wideband amplifier whose bandwidth is increased using a parallel feedback transistors(PFT), capacitive elements are connected between the first and seventh nodes which are emitters of the seventh and eighth transistors which are parallel feedback transistors, and alternating current(AC) grounds, wherein outputs are supplied from the first and seventh nodes, and the emitter follower buffers are coupled to the first and seventh nodes so that a negative feedback current is leaked through the collector parasitic capacitances of emitter follower buffer transistors. The bandwidth of the amplifier is greatly increased without making the circuit complex.

Abstract: A high-pass filter includes at least one circuit unit constituted by a first branch and a second branch both connected to an input of the filter on one side and, on the other side, to an adder the output of which is the output of the filter. The first branch includes means for transferring an input signal substantially without modifying its frequency content, and the second branch comprises a low-pass filter. The circuit elements are chosen such that the components of the input signal with frequencies below the cut-off frequency of the low-pass filter are substantially cancelled out at the output of the adder. The filter is suitable for being produced within a particularly small area in an integrated circuit.

Abstract: The present invention relates to a voltage gain amplifier for converting a single analog input to a differential output and controlling a voltage gain, comprising a single input charging/discharging part, a differential output operational amplifier, a first and second input voltage transferring part, a first and second voltage holding part and a frequency compensating part, and therefore, making it possible to generate a differential input signal, which is used as an input to an ADC(Analog-to-Digital Converter) of an audio CODEC(Coder/Decoder), by using a fully-differential output operational amplifier whose output is transmitted as a differential output. Also, the present invention gives an advantage of making the chip size smaller than the prior art does, resulting from the fact that resistors are replaced by capacitors and switches when integrated into a chip.

Abstract: A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis.

Abstract: Apparatus and method utilized in conditioning an input signal from a transducer operatively coupled to a machine by self-biasing a circuit including an op-amp having an inverting signal input terminal, a non-inverting signal input terminal, bias voltage terminals and a signal output terminal. A power supply is operatively coupled to the bias voltage terminals via a single pair of supply lines and an input signal is directed to an input terminal of the op-amp. The op-amp outputs a conditioned signal to the supply lines which is superimposed with said DC bias voltage across the supply lines wherein the characteristics of the conditioned signal may be monitored via the supply lines.

Abstract: A resistorless amplifier circuit uses integrated operational transconductance amplifiers to realize a plurality of circuit transfer functions. The preferred embodiment produces an output signal voltage V.sub.out (500) that is either g.sub.m1 /g.sub.m3 or g.sub.m1 /(g.sub.m3 -g.sub.m1) times the input signal voltage V.sub.in (400). Additionally, an alternative embodiment implements a resistorless summing and subtracting operational transconductance amplifier circuit that realizes an output signal voltage as follows: ##EQU1## The resistorless amplifier circuit includes a first operational transconductance amplifier (100) with a transconductance g.sub.m1, a second operational transconductance amplifier (200) with a transconductance g.sub.m2, and a third operational transconductance amplifier (300) with a transconductance g.sub.m3.

Abstract: An innovative differential amplifier circuit, which can control the midpoint potential of a load which does not itself have any midpoint connection. This is achieved by using a proxy load element in parallel with the primary load. The proxy load is of much higher impedance value than the primary load, and does have a center tap. The potential of the center tap of the mirrored load is used for a feedback connection to a control loop which regulates the output to both the primary load and the proxy load.

Abstract: The invention presents a differential circuit capable of compensating for an error in differential output caused by voltage drop due to the emitter series resistance of transistors without being affected by the values of differential input currents and the current ratio of the input currents.

Abstract: A high-impedance circuit includes a differential pair circuit composed of a first transistor and a second transistor, and a buffer circuit. The buffer circuit includes an NPN type transistor pair composed of a cascade connection of NPN type transistors and a PNP type transistor pair composed of a cascade connection of PNP type transistors, and bases of the NPN type transistors and bases of PNP type transistors respectively corresponding to the NPN type transistors are connected to each other, respectively so as to constitute current mirror circuits. An output of the differential pair circuit is connected to a cascade connection point of the NPN type transistor pair, and an emitter of an NPN type transistor included in the NPN type transistor pair is connected to the ground via a constant current source, and the emitter is connected to bases of the first transistor and the second transistor via resistors, respectively.

Abstract: A wide band, high-order, programmable video filter is implemented using transimpedance-based active integrators. An input voltage which may for instance represent a composite video signal is converted to a current in a linear manner using resistors and provided to a current amplifier at low impedance virtual ground nodes. The current is multiplied by a gain factor .beta..sub.R within the current amplifier and supplied to integrating capacitors connected in a feedback configuration around a high input impedance differential amplifier to establish an integrated differential voltage output. The transimpedance-based active integrators may be interconnected to realize wide-band, high-order video filters suitable for use in accordance with CCIR 601 standards. Input voltage swings are not restricted by a transistor's limited range of linear operation or voltage swing limitations of internal nodes but rather may allowed to swing as long as the bias currents sustain input current excursions.

Abstract: A linear differential gain stage (31) has a first input (32), a second input (33), a first output (34), and a second output (35). A differential input voltage is coupled to an input differential transistor pair (39,40). Voltage compensation circuits (53,54) cancel non-linearities due to the input differential transistor pair (39,40). Parasitic capacitance of the input differential transistor pair (39,40) couple current to the first and second inputs (32,33) due to voltage transitions at the first and second outputs (34,35). The current to the first and second inputs (32,33) is canceled by impedance compensation circuits (55,56) that provide an equal magnitude but opposite sign current. The result is an almost infinite input impedance to the linear differential gain stage (31).

Abstract: An operational amplifier and a digital signal transfer circuit in which an output voltage does not decrease instantly even if an abrupt change of input signal due to noise causes a high-to-low transition to be superposed on an input signal. The operational amplifier includes a differential pair of transistors with a first transistor having a collector that is grounded and a second transistor having an emitter connected to the emitter of the first transistor; a current mirror circuit with a third transistor having a collector connected to an output node of the differential pair of transistors and a fourth transistor having a base connected to a base of the third transistor; a fifth transistor having a collector connected to an output terminal and a base connected to an output node of the current mirror circuit; and a capacitive element connected between the output node of the current mirror circuit and the output terminal.

Abstract: In a method and by an apparatus for correction of error signals and for forming of an arbitrary transfer function being independent of the quality of a payload (loudspeaker; H1) included in a signal amplification system, a control system (9) is used for supplying of the input signal to a basic amplifier (1) driving the payload. Said control unit includes a further amplifier (9) having an inverted input being supplied with a feedback signal from the output of the basic amplifier. In such a case the further amplifier involves only an inverted input, said input signal is supplied through one (4) of the resistors (3, 4) included in the feedback loop.

Abstract: A differential amplifier filter with two channels in phase opposition, wherein each channel includes the same network of passive components which includes two impedances coupled in series between a first input terminal of the filter and a corresponding input of the differential amplifier, a feed-forward impedance coupled between a common node of the two series impedances and an output of the same channel of the differential amplifier, and a feedback impedance coupled between a second input of the differential amplifier and an output of the other channel of the differential amplifier.

Abstract: An equalizer, for providing a tunable pole/zero compensated output signal, includes a integrated tone control circuit with a MOSFET-C configuration such that the spacing between the pole and the zero and the center frequency of the pole/zero pair can be tuned by varying the resistance of MOSFET resistors using variable voltage sources applied to the gates of the MOSFETs.

Abstract: A variable gain amplifier uses a differential attenuator to provide a differential input to which a differential input signal is applied. The differential attenuator is comprised of (N-1) .pi. attenuator stages, with each stage forming a pair of attenuator taps for providing an attenuated version of the differential input signal. The differential input forms a high-impedance input, which is essentially floating. Each pair of taps is coupled to the differential inputs of a respective gm stage. The differential outputs of the gm stages are coupled to the differential inputs of a main amplifier, which has a high open-loop gain. The transconductance of each gm stage is controlled by an interpolator which provides a bias current to each of the gm stages in a sequential manner as a gain control voltage is swept from its minimum to its maximum values. The combination of the attenuated input voltage, the varying transconductances produces a gain response that is linear-in-dB relative to the gain control voltage.

Abstract: In an amplifier circuit arrangement in which series resistive feedback is utilized in the main amplifier to minimize distortion, and a feedback amplifier is provided in a path from the output of the arrangement to the series feedback path effectively to boost the value of the feedback resistor, a further amplifier is arranged to provide positive feedback to the resistive load circuit of the main amplifier effectively to boost the value of the resistive load.

Abstract: A differential amplifier circuit of the present invention includes a device ("transistor") having a back gate electrode formed above the base region of a bipolar transistor between the emitter and collector regions. The back gate electrode of one such transistor is connected to the collector or emitter of another transistor in order to provide positive feedback so that the operation of each transistor is enhanced. The operational speed of the transistors is increased and the amplification factor of the differential amplifier circuit is improved to provide stabilized circuit operation. Accordingly, the degree of circuit integration and the operational stability of the differential amplifier are enhanced as compared with a differential amplifier circuit constructed of conventional bipolar transistors or FETs.

Abstract: An active termination resistor is provided within a feedback loop circuit thus advantageously increasing the stability of the feedback loop circuit. In particular, the active termination resistor traces the impedance of the feedback loop such that R(f).congruent.1/GM3(f). The active resistor may also be configured to track the value of the resistor to set the feedback transconductance over process and temperature variations to ensure stability of the feedback loop over these variations.

Abstract: A protection circuit includes a first protection circuit, which is coupled between a signal output terminal of an internal circuit and an external connection terminal and which prevents an abnormal voltage applied to the external connection terminal from being input to the signal output terminal. The protection circuit also includes a second protection circuit, which is coupled between a signal input terminal of the internal circuit and the external connection terminal and which prevents the abnormal voltage applied to the external connection terminal from being input to the signal input terminal. The signal input terminal is operatively coupled to the signal output terminal via the first and second protection circuit and has an impedance higher than that of the signal output terminal.

Abstract: An amplifier for providing a pole/zero compensated output signal by generating multiple pole/zero pairs at predetermined increasing frequencies, with the number of pole/zero pairs occurring at the increasing frequencies increasing geometrically. The amplifier includes three amplifier circuits cascaded in series to generate a first pole/zero pair at a predetermined frequency, and a second and a third pole/zero pair both generated at a second frequency two octaves above the first pole/zero pair. The first amplifier circuit configured to generate the first pole/zero pair and the second and third amplifier circuits each configured to generate the second and third pole/zero pairs. The relative spacing between each pole and its corresponding zero determines the amount of compensation performed.

Abstract: A high input impedance circuit includes an amplifier such as an operational amplifier comprising transistors of a first polarity which serve as a differential pair and input of the amplifier, base of one transistor being caused to serve as a positive input terminal, base of the other transistor being caused to serve as a negative input terminal. The high input impedance circuit further includes a transistor having base connected to the positive input terminal, and a second polarity opposite to the first polarity, wherein collector of the transistor of the second polarity is connected through d.c. path to a first power supply, e.g., ground, and emitter of the transistor of the second polarity is connected through d.c. path to a second power supply, e.g., power supply voltage terminal through a resistor to apply a signal in phase with an input signal delivered to the positive input terminal to the emitter of the transistor of second polarity to thereby allow input impedance to be higher.

Abstract: A liquid crystal display apparatus is driven by a voltage averaging method. The display apparatus is provided with voltages via a scanning circuit and a driver circuit from a power supplying circuit. The power supplying circuit has a voltage compensating circuit which is provided with an operational amplifier whose first input terminal is provided with a predetermined voltage and whose second input terminal is connected to an output terminal thereof through a resistor, an impedance circuit connected between the output terminal of the operational amplifier and an output terminal of the power supplying circuit, and feedback circuit for feeding back both of an alternating current component and a direct current component of an output of the impedance circuit to the second input terminal of the operational amplifier.

Abstract: A microwave differential amplifier comprises a first and a second matched NMOS device, each connected with the source to a common bias node, the gate to an input port for receiving a differential input signal and with the drains to an output port for providing a differential output signal. The Miller capacitors of each device provide the necessary feedback between the input and output ports for shifting the phase of the differential output signal with respect to the phase of the differential input signal with 45.degree. at a predetermined frequency. The operating point of the NMOS devices is maintained in the linear region of the respective transfer characteristic, using matched loads and a corresponding bias current. The loads may be resistors, in which case AGC is used for maintaining a constant bias current, or active loads. A VCO built with four such differential amplifiers in a gyrator configuration oscillates at the predetermined frequency and has eight output signals.

Abstract: The invention relates to an amplifier for audio signals comprising a first (A.sub.1) and a second (A.sub.2) stage having a global feedback loop (B) between the output of the second stage and the input of the first stage, the second stage having a local feedback loop (B.sub.2) between its output and its input. Each feedback loop has a comparator element (C.sub.1). The amplifier comprises a means preventing the offset voltage present at the output of the first stage (A.sub.1) from being reinjected as input by feedback (in particular via the amplifier output). The local feedback loop (B.sub.2) is such that the second stage (A.sub.2) receives feedback at least continuously. The low frequency interference signals produced in the second stage (A.sub.2) are reduced by the feedback of the second stage (A.sub.2).

Abstract: A high side current sense amplifier (21) comprises a first resistor, a second resistor, an amplifier (22), and a darlington transistor pair. The first resistor has a first input and a second input coupled to a non-inverting input of the amplifier (22). The darlington transistor pair has a collector coupled to the non-inverting input of the amplifier (22), a base coupled to an output of amplifier (22), an emitter. The second resistor is coupled between the emitter of the darlington transistor pair and ground. A differential voltage is applied across the first input of the first resistor and an inverting input of the amplifier (22). The darlington transistor pair converts an output voltage of the amplifier (22) to a feedback current for generating a voltage across the first resistor. Under stable conditions the voltage across the first resistor is equal to the differential voltage. The voltage gain is the ratio of the second resistor to the first resistor.

Abstract: A preamplifier and pre-emphasis network is provided having a differential plifier exhibiting common mode noise rejection. The preamplifier is particularly suited for use with a double-sided sensor element and it includes a double-sided, balanced calibration circuit. First and second variable gain buffers are joined to the differential amplifier for preventing current noise degradation at the differential amplifier inputs. A pre-emphasis network is further provided in conjunction with the variable gain buffers for providing balanced differential gain of the sensor element signal. Further elements of the invention provide for high and low pass filtering, and differential buffering of the output signal.

Abstract: A tunable quadrature phase shifter including two branches each constituted by the cascade connection of a filter, an amplifier and a summing circuit, and two cross-connections constituted by amplifiers interconnecting the filter of one branch to the summing circuit of the opposite branch. An accurate 90 degrees phase shift between the two output signals is obtained by controlling the tail currents of the four amplifiers. The phase shifter used in mobile telecommunication transceivers may be easily and accurately tuned because the signals used in the summing circuits all have a similar amplitude. It is further adapted to operate with only a 3 Volt battery supply as used in wireless phones. The bandwidth of the amplifiers is increased by using double differential pair amplifiers which behave as cascode arrangements.

Abstract: An auto-biasing virtual circuit mechanism for a bipolar transistor is independent of the biasing and the configuration of a signal waveform application circuit in which the transistor is installed. The virtual circuit comprises a plurality of AC signal coupling elements (capacitors) coupled in circuit between respective ones of a plurality of AC signal access terminals and respective ones of the base, collector and emitter electrodes of the transistor. Because of their frequency dependent impedance characteristics, each coupling capacitor effectively provides a short circuit coupling path for AC signals, while blocking or being an open circuit for DC bias inputs. Conversely, DC biasing is effected through large valued inductors, which provide short circuit coupling paths for DC bias inputs, while blocking or being open circuits for AC signal conditions.

Abstract: An AB class stage is described which comprises two complementary MOSFET final transistors connected in a push-pull manner between two supply terminals. In order to attain high linearity, low switching distortion, a high ratio between the maximum output current and the rest current, independence of the rest current from the temperature and manufacturing variables and a circuit simplicity, the circuits determining the rest current and those which provide current to the load are substantially independent of one another. More particularly, two transconductance amplifiers are provided which control the final transistors and are dimensioned so as to have zero output current in rest conditions, two voltage generators which determine the rest current and two resistors being connected between the gate electrodes of the final transistors and the supply terminals.

Abstract: A converter for converting a single-ended input V.sub.IN to a differential output signal V.sub.OUT through positive and negative output terminals is disclosed. The converter comprises a fully differential amplifier with one of its input terminals coupled to the single-ended input and its other input terminal coupled to a fixed voltage. The converter also has a first resistor ("R.sub.1 ") coupled between the single-ended input and the positive input terminal of the fully differential amplifier, a second resistor ("R.sub.2 ") coupled between the fixed voltage and the negative input terminal of the fully differential amplifier, a third resistor ("R.sub.3 ") coupled between the positive input terminal and the negative output terminal of the fully differential amplifier, and a fourth resistor ("R.sub.

Abstract: A gain cell circuit includes a logarithmic transformation circuit. The logarithmic transformation circuit includes a pair of first and second transistors, each of which has first and second current carrying electrodes and a control electrode. The control electrodes of the first and second transistors are coupled to input terminals of the logarithmic transformation circuit. The logarithmic transformation circuit further includes third and fourth transistors coupled to the first and second transistors. The third and fourth transistors have control electrodes serving as output terminals of the logarithmic transformation circuit, first current carrying electrodes connected at first and second circuit nodes to the second current carrying electrodes of the first and second transistors, and second current carrying electrodes coupled to a power supply voltage.

Abstract: A circuit and method for reducing the output impedance and the common mode gain in a differential transimpedance amplifier sets the input impedance for the differential transimpedance amplifier, giving it one value for differential inputs and another value for common mode inputs. The circuit and method sets the effective input impedance for the amplifier equal to the negative of amplifier's feedback resistor impedance for differential inputs, and to low, positive value for common mode inputs.

Abstract: An operational transconductance amplifier (500) includes an input stage (502) having a first and second amplifiers (504, 508) driving class-AB, push-pull amplifiers (506, 510). The input stage (502) receives a differential input signal at first and second amplifier inputs (528, 540). The push-pull amplifiers (506, 510) establish differential currents in a transconductance-setting resistor (512), thereby eliminating the need for static current sources. The biasing levels established by the first and second amplifiers (504, 508) to drive the push-pull amplifiers (506, 510) also control a current source (514). Currents from the current source (514) are summed and provided to amplifier outputs (594, 596).

Abstract: An IF limiting amplifier uses localized positive feedback in each amplifier stage to provide additional small signal gain while maintaining the limiting gain. The extra small signal gain results in higher overall sensitivity for the receiver at less bias current. The reduction in the number of stages needed to perform the same signal response results in a significant decrease in power consumption by the circuit.

Abstract: A differential-difference current conveyor combines features of a differential-difference amplifier and a current conveyor. The differential-difference current conveyor receives four input signals (1, 2, 3, X) and outputs one output signal Z. There is a defined relationship of voltages and currents, wherein V.sub.X =V.sub.1 -V.sub.2 +V.sub.3 ; I.sub.1 =I.sub.2 =I.sub.3 =0; and I.sub.X =I.sub.Z.

Abstract: An amplifier circuit equipped with a negative feedback loop includes a differential amplifier circuit composed of a plurality of differential amplifier stages, first and second negative feedback circuits each including a low-pass filter and being provided between an associated one of an in-phase output and an opposite-phase output and an associated one of first and second inputs of the differential amplifier circuit. This amplifier circuit further includes a suppression circuit to suppress an a.c. component of a signal to be fed back by adding signals relative to the in-phase and opposite phase outputs.

Abstract: An apparatus for detecting a geometric relation includes a device having a magnetic field source and a configuration being formed of a multiplicity of Hall elements. A magnetic induction is dependent on the relative geometric configuration between the Hall element configuration and an object having a geometric position which is to be detected. The Hall elements are disposed at a given distance from one another along a given line. An interpolation circuit interpolates the analog output signals of at least two Hall elements.

Abstract: A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis.

Abstract: An amplifier with controlled output impedance utilizing current and voltage feedback to set gain and output impedance is disclosed. The voltage feedback is provided by feedback resistor connected from the output to the inverting input. The current feedback is provided by feeding a current proportional to the output current directly to the inverting input of the amplifier. An error amplifier is used to maintain the proper ratio of the current feedback to the output current and to cancel the effects of the output device impedance on the overall output impedance. Two such amplifiers driven by complimentary signals form a differential amplifier with controlled output impedance. Because the output impedance is a function of the voltage feedback resistance and the current feedback ratio, it is possible to digitally control the output impedance by changing the feedback resistance and/or the current feedback ratio.

Abstract: An apparatus and method for improving the speed and accuracy of a feedback amplifier when the primary feedback around the amplifier configuration has been interrupted is provided. An additional feedback loop added to the input stage of the amplifier maintains the circuit response by maintaining the feedback and preventing the saturation of the circuit components.

Abstract: The invention relates to a circuit arrangement for an integrated output amplifier (1) with two constant current sources (2, 3), a voltage amplifier with two inputs (5, 6) and two outputs (7, 8) and two output transistors (Q1, Q2) coupled with these, as well as two feedback networks (9, 10) producing negative feedback which are connected between the output transistors and the corresponding input transistors of the voltage amplifier (4). The first two feedback networks (9, 10) are connected between the collectors of the output transistors (Q1, Q2) and the base electrodes of the corresponding input transistors of the voltage amplifier (4). In addition, a third feedback network (11) is connected on the input side to the base electrodes of the output transistors and on the output side to the input of a current splitting network (16) via a transistor (Q3) acting as a current sink, whereby said current splitting network has a signal input (17).

Abstract: A differential amplifier circuit that exhibits low temperature drift and a wide dynamic range includes a differential amplifier having first and second input terminals, first and second circuit nodes operatively connected to the first and second input terminals, respectively, a differential input signal pair, first and second sampling capacitors and a switching circuit. During a first operational phase, the switching circuit connects, a first plate of the first capacitor to a first input signal of the differential input signal pair, connects a first plate of the second capacitor to a second input signal of the differential input signal pair, and connects second plates of the first and second capacitors to a reference voltage.