Abstract: A differential difference amplifier is provided for amplifying an input signal having a magnitude close to zero (or a negative supply voltage) and adding an offset voltage to the amplified input signal.

Abstract: A common mode voltage detection circuit 105 detects a common mode voltage VCM from differential output terminals of a differential output circuit 101. The common mode voltage detection circuit outputs a detected voltage VCM2 in accordance with the common mode voltage VCM. An OTA 106 in the common mode feedback loop inputs or outputs multiple currents of the same phase in accordance with a voltage difference between a reference voltage VCM1 and the detected voltage VCM2. The respective multiple currents of the same phase are inputted/outputted to/from the two respective terminals of the differential output terminals. The common mode voltage can be reduced by flowing the currents into the differential output terminals, and can be increased by leading the currents from the differential output terminals. Thus, a phase margin or a gain margin of a control signal loop can be secured even with low current consumption, thereby realizing stable operation of the circuit.

Abstract: On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.

Abstract: A circuit topology for gain boosted high-swing folded cascode has been improved to maximize the available dynamic range in applications having low supply voltage requirements. The circuit includes an improved gain boost amplifier that maximizes the available dynamic range for applications having low supply voltage requirements. The improved gain boosting amplifier includes a differential pair of input transistors connected to a current mirror, wherein a pair of current sources supply current to each lead of the current mirror. One lead of the current mirror is level-shifted by a transistor coupled to another current source, wherein the coupling of the transistor and the current source form the output of the amplifier. Effectively, the amplifier consists of a level shifter and a series common-drain, common-gate amplifier. A reduction in transconductance gm from the series combination is compensated by a current mirror ratio (K:1) between the level shift and the common-drain, common-gate amplifier.

Abstract: A monolithic capacitance multiplication circuit serves to reduce the required die area when larger capacitance values are needed such as in filter and loop frequency compensation circuits. A current mirror/cascoding device arrangement reduces the effective series resistance of the multiplier capacitor. As a result, the multiplier topology exhibits improved bandwidth over prior art capacitance multiplier circuits.

Abstract: The input stage of an operational amplifier includes at least four signal-receiving stages adapted to receive four input signals. If the voltage level associated with any of the input signal changes, at least one transistor in each of the at least four signal-receiving stages conducts more current and at least one transistor in each of these stages conducts less current. The four signal-receiving stages collectively generate four intermediate signals that are delivered to the output stage of the differential amplifier, which in response, generates a pair of differential output signals. Two of the input signals are derived from the pair of differential output signals and are fed back to the input stage of the amplifier.

Abstract: A common-mode detector includes a first difference amplifier that is connected to compare a first input voltage with a feedback voltage to provide a first result, a second difference amplifier that is connected to compare a second input voltage with the feedback voltage to provide a second result, and a feedback amplifier that is connected to drive the feedback voltage to a level that is substantially the average of the first and second input voltages in response to receiving the first and second results.

Abstract: A differential to single-ended signal transfer circuit that allows increased gain and improved AC performance while reducing power supply voltage requirements. The transfer circuit includes a first operational transconductance amplifier (OTA), a second operational amplifier (OPA), first and second controlled current sources, a third current source, and first and second bipolar junction transistors. The inverting and non-inverting inputs of the transfer circuit are provided at the inverting input and the non-inverting input, respectively, of the OTA, which is coupled to the first and second controlled current sources to form a current mirror with tracking feedback. The output voltage of the transfer circuit is provided at the emitter of the first transistor, the base of which is connected to the non-inverting input INp. The first transistor is coupled to the third current source in an emitter follower configuration to provide both current gain and impedance matching.

Abstract: Expansion of the bandwidth of a wideband CMOS data amplifier is accomplished using various combinations of shunt peaking, series peaking, and miller capacitance cancellation. These various combinations are employed in any of the amplifier input stage, in intermediate stages, or in the last stage.

Abstract: An amplifier mixer device includes an amplifier structure having at least one amplifier input and at least one amplifier output. At least one of the amplifier outputs is looped back via a feedback to at least one of the amplifier inputs. The amplifier structure includes a mixer structure. The mixer structure comprises at least one switch having a switch input communicatively connected with the radio input, and a switch output communicatively connected with the mixer output. The switch input and switch output in a conducting state of the switch are electrically connected with each other and in a non-conducting state of the switch are electrically substantially not connected with each other. In use, the switch is switched from the conducting state to the non-conducting state and vice versa with the local oscillator signal.

Abstract: An amplifier includes a biasing section, first and second differential amplifying sections and an output section. The biasing section outputs first and second bias currents based on first and second power source voltages. The first differential amplifying section outputs a first amplified voltage based on the first bias current. The second differential amplifying section outputs a second amplified voltage based on the second bias current. The output section outputs the second power source voltage based on the first amplified voltage and the first power source voltage, and outputs the first power source voltage based on the second amplified voltage and the second power source voltage. Therefore, a variation of the threshold voltage is compensated to enhance display quality.

Abstract: An apparatus and method for increasing a slew rate of an operational amplifier are provided. It only requires an operational amplifier, a monitoring control device, a push-pull output device, and a second input current source pair. It uses a monitoring control device controlled by the output stage to control the supplementary device and the second input current source pair in order to increase a slew rate of an operational amplifier. This operational amplifier also provides the rail-to-rail output function. In addition, because it does not require additional circuit to increase the slew rate, the chip size is smaller. With respect to the circuit structure, it is very simple and can be applied to the pre-existing operational amplifier without re-designing the operational amplifier and thus can keep the original characteristics of the operational amplifier.

Abstract: An autozeroing floating-gate amplifier (AFGA) is implemented utilizing a programmable gain element, the characteristics of which may be changed by changing the amount of charge stored on a floating gate device.

Abstract: A method can allow a system to selectively control increasing of a bias source in a reference buffer or decreasing impedance looking into a output of the reference buffer for a temporary or selective time period, which can result in an increased overall efficiency of the system. The method can include at least the following steps. A first input signal is received at an input of a reference buffer. A second input signal is received from a load at an output of the reference buffer. A value of a bias source coupled to the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value. Alternatively, an impedance looking into the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value.

Abstract: A limiting circuit includes an input transconductance stage, an output transconductance stage, a feedback transconductance stage, first and second resistive loads, and a level limiting circuit. The input transconductance stage is operably coupled to convert an input voltage signal into an input current signal. The first resistive load is operably coupled to convert the input current signal and a feedback current signal into an intermediate output voltage signal. The output transconductance stage is operably coupled to convert the intermediate output voltage signal into an output current signal. The second resistive load is operably coupled to convert the output current signal into an output voltage signal. The feedback transconductance stage is operably coupled to produce the feedback current signal based on the output voltage signal. The level limiting module is operably coupled to limit at least one voltage level of the feedback transconductance stage.

Abstract: It is an object of the present invention to provide an output circuit capable of reducing a consumption current while an output current is suppressed in a case where limitation is placed on an output voltage so as not to fall to a predetermined voltage or less in an output circuit the emitter of which is grounded, the base of which serves as an input node for a control current and the collector of which serves as an output node. Provided are a base current supply section for supplying a base current to the output transistor according to an input signal from the outside, and a base current control section for detecting an inter-terminal voltage between the collector and emitter of the output transistor to control a base current supplied from the base current supply section so as not to cause the inter-terminal voltage to fall to a value lower than a predetermined voltage.

Abstract: An amplifier has an input terminal to receive an input signal. The amplifier includes a first gain stage comprising a pair of input transistors and a second gain stage to drive an output stage. The output stage provides inverting and non-inverting differential output signals on inverting and non-inverting output nodes. The amplifier may also include a feedback signal electrically connected between the inverting and non-inverting output nodes to emitters of the input transistors through a resistor network.

Abstract: There is provided a differential amplifier including: an output terminal through which an output voltage is outputted in response to an input voltage; a first inverter-type input unit connected between a first node and a second node to receive the input voltage; a second inverter-type input unit connected between a third node and a fourth node and receiving a reference voltage and having an output node connected to the output terminal; a circuit biased by an output of the first input unit and configuring a negative feedback loop together with the first input unit; an amplifying unit biased by the output of the first input unit to amplify the output of the first input unit; and a switching unit connected between the first node and the third node and between the second node and the fourth node in response to a voltage level of the output terminal.

Abstract: An amplifier. The novel amplifier includes a first circuit for receiving and amplifying an input signal and outputting an output signal, and a second circuit for supplying power to the first circuit, wherein the power supplied varies in accordance with variations in the output signal. The second circuit includes a bootstrapping circuit adapted to regulate the voltages across any transistors in the signal path such that the voltages remain constant. In an illustrative embodiment, the second circuit bootstraps the voltages across a PMOS current source that acts as the load to an input stage, as well as a Darlington pair in an output stage of the amplifier.

Abstract: A low-noise amplifier circuit is specified which has a switchable gain ratio. For this purpose, a parallel circuit comprising a first and a second current path (3, 4) is provided between a radio-frequency signal input and output (1, 2), with the first current path (3) having a transistor which is connected in a common-base circuit for signal amplification, and the second current path (4) having a transistor which is connected in a common-emitter circuit (7) for signal amplification, and has input impedance matching (25, 27). Owing to the good noise characteristics and the good linearity characteristics, the described low-noise amplifier circuit is suitable for use in radio-frequency receivers in which adaptive pre-amplification is required even before a frequency converter, that is to say at the radio-frequency level, because the input signal has a wide dynamic range, such as that in the case of UMTS.

Abstract: A device and method for nullifying an offset voltage in an operational amplifier, the operational amplifier having a first input, a second input, an output, and a first resistor connected between the output and the first input, the device comprising: an adjustable resistor electrically connected to the first resistor, forming a first resistor network having a first feedback ratio at the first input of the operational amplifier; a comparator having a first input and a second input, the first input electrically connected to the output of the operational amplifier through a second resistor; a third resistor connected to the second resistor, forming a second resistor network having a second feedback ratio at the first input of the comparator; and an offset measurer electrically connected to the comparator and the adjustable resistor for measuring an output value of the comparator and for adjusting the adjustable resistor based on the measured output value.

Abstract: A radio frequency (RF) switching power amplifier comprises: a switching amplifier 203 to provide an amplified signal within an RF band; and a delta signal modulator (DSM) 207 that is operable; to control the switching amplifier in a feedback configuration, to process an input signal within an intermediate frequency (IF) band where the input signal corresponds to a base band signal and the amplified signal, and to provide an output signal within the RF band to drive the switching amplifier. Certain embodiments allow for or compensate for a floating or variable IF band and multiple RF bands.

Abstract: A method for adjusting a phase angle (?) of a phase modifier (25) of a transmitting device which includes a quadrature modulator (3), a power amplifier (9), a quadrature demodulator (19) and differential amplifiers (26, 27). The power amplifier (9) is linearized via the feedback loop (16) according to the Cartesian feedback method. The phase modifier (25) supplies an oscillator signal to the quadrature demodulator (19), which signal is shifted by the phase angle (?) to be adjusted with regard to the oscillator signal that is supplied to the quadrature modulator (3). An input signal with a constant inphase component (I) and a constant quadrature phase component (Q) is applied during each transmission burst in the instance of a closed feedback loop, and the quadrature component (VQM) and/or the inphase component (VIM) is measured at a measuring point (53, 61) located behind the output of the differential amplifiers (26, 27).

Abstract: A transconductance amplifier with multi-emitter structure for balancing current of a multi-phase regulator including multiple transistors, a bias current device, multiple current mirrors, and multiple current sources. Each transistor has first and second current terminals and a current control terminal receiving a corresponding one of multiple sense voltages. Each sense voltage is indicative of output inductor current of a corresponding phase of the multi-phase regulator. The bias current device is coupled to the first current terminal of each transistor. Each current mirror has an input coupled to a second current terminal of a corresponding transistor and an output coupled to a corresponding one of multiple correction nodes. Each current source is coupled to a corresponding one of multiple correction nodes. In this manner, each correction node provides a correction current for a corresponding phase of the regulator.

Abstract: A load responds to a voltage-to-current converter including a differential amplifier. A sensing resistor is series connected with the load and first and second feedback resistors, respectively included in first and second voltage dividers having taps connected to non-inverting and inverting inputs of the amplifier. One divider is connected between a first terminal of the sensor resistor and one voltage responsive input terminal of the converter. Another divider is connected between the second terminal of the sensor resistor and a second converter input terminal, that can be grounded or voltage responsive. The feedback resistors have the same value that is much greater than the sensor resistor value. The first divider can be connected to the first or second terminal of the sensor resistor and vice versa for the second divider.

Abstract: The current limiting circuit of the present invention includes a transconductance amplifier having two outputs and forming a conventional feedback loop. A first output connects to an output transistor and a second output is a replica output used to form a rapid response feedforward path to control the gate of the output transistor, for example, an external MOSFET.

Abstract: A transconductance circuit having a feedback element for maintaining constant potential differences at a differential amplifier, which in turn allows an intermediate current signal to flow through a resistive load directly proportional to an input voltage signal. The intermediate current signal is amplified through an amplifying stage to a sub-harmonic stage.

Abstract: A compensation circuit is provided for an amplifier including at least first and second amplifier stage. The circuit includes a first capacitance including one end that communicates with an input of the first amplifier stage. An amplifier includes a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance includes a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of the second amplifier stage. A first impedence includes one end that communicates with the input of the first amplifier stage and an opposite end that communicates with an output of the second amplifier stage.

Abstract: A common-mode feedback circuit outputs a control voltage to define a common-mode operating point of a fully differential amplifier. The common-mode feedback circuit has a voltage dividing circuit and a differential amplifier. The voltage dividing circuit divides a voltage across two output ends of the fully differential amplifier. The differential amplifier receives an output voltage of the voltage dividing circuit and a reference voltage, and an output voltage of the differential amplifier is supplied as the control voltage to the fully differential amplifier.

Abstract: A voltage setting circuit includes a voltage setting region setting a voltage level corresponding to a maximum value in amplitude of a signal output from an OTA circuit, a voltage setting region setting a voltage level corresponding to a minimum value in amplitude of the signal, and an intermediate voltage setting region setting a voltage intermediate between the voltages set by the above two regions. This intermediate voltage is input to a common mode feedback circuit and in accordance with the intermediate voltage the common mode feedback circuit generates a common mode voltage fed back to the OTA circuit.

Abstract: A differential amplifier. A differential pair constructed by a first transistor and the second transistor receives differential input signals. The gate terminals of a third and fourth transistor are coupled to the source terminals of the fourth transistor and the third transistor respectively, and the third and fourth transistor construct a feedback device. This feedback device provides a positive feedback to the differential pair in the differential mode, thereby increasing AC amplitude of the differential amplifier. Further this feedback device substantially brings the drain currents of the first current path and the second current path into coincidence in the Vcom mode.

Abstract: The circuit with adaptive amplifier output common mode voltage adjustment includes: a differential pre-amplifier; a re-generated comparator having a differential input coupled to a differential output of the pre-amplifier; and a replica comparator coupled to a common mode node of the pre-amplifier for adjusting a common mode of the pre-amplifier. The replica comparator provides a trip-point reference to set the output common mode of the pre-amplifier. This sets the output common mode of the pre-amplifier to the most sensitive region of the re-generated comparator.

Abstract: Provided is a wideband amplifier which can provide an increased operation bandwidth without being limited by manufacturing process. A source follower circuit having a MOS transistor and constant-current supplies is provided in parallel to a MOS transistor serving as an amplifier of the input stage. Furthermore, the sources of the MOS transistor serving as the output of the source follower circuit are connected to the output nodes of the input stage amplifier via phase compensation capacitors, respectively. This configuration provides an increased phase allowance to the wideband amplifier, thereby providing an improved operation bandwidth without being limited by the manufacturing process employed.

Abstract: The present invention discloses an impedance matched low noise amplifier circuit (10) comprising a serially coupled first resistor (R1) and first transistor (R0), a serially coupled second resistor (R2) and second transistor (R1), a resistive sensor (RMR) coupled to the first transistor (R0) and the second transistor (R1), wherein the first resistor (R1) and the second resistor (R2) are coupled, and a transconductance feedback block (GM) coupled to the resistive sensor (RMR) and to the serially coupled resistors (R1, R2) and transistors (R0, R1).

Abstract: A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Abstract: To update the control value to a value of higher precision in a predistortion type distortion compensation apparatus for compensating the distortion occurring in an amplifier for amplifying an input signal by the control using a control value corresponding to the level of the input signal.

Abstract: The invention relates to a circuit for low noise, fully differential amplification. A feedback signal (121) is detected in a differential output step of the differential amplification circuit by means of a voltage distributor formed by a first feedback resistance (119) and a second feedback resistance (120). A first output signal (111) is provided at a first output circuit node (117) and a second output signal (112) is provided at a second output circuit node (118). The respective first and second output signals (111) or (112) form a full output signal which corresponds to an input signal formed by a first and a second input signal (101) or (102). A load current (134), an input current (132) and a reference current (132) are established by means of a load current source (128), an input current source (131) and a reference current source (127).

Abstract: There is disclosed an improved differential amplifier (20) having a feedback loop that generates an amplified output signal (Vout) from an input signal (Vin) supplied by a preceding stage. It comprises an input matching circuit (11) connected to said preceding stage, a buffer (22) and an amplification section (12) connected in series in the direct amplification line, a first amplifier (16), a RC network (17?) and a second amplifier (23) connected in series in a parallel loop between the outputs and the inputs of the amplification section that generate the feedback signal. The role of said buffer and second amplifier associated in a dedicated direct and feedback signal combining block (21) is to respectively isolate the input signal and the feedback signal from the summing nodes (A?,B?) at the amplification section inputs. As a result, the summation of the input signal and the feedback signal is improved, the DC component of the output signal is filtered out in order to significantly reduce the DC offset.

Abstract: A variable-gain amplifier with a differential input and differential output, including an attenuator block, receiving an input voltage and providing, on several outputs, voltages, each of which is equal to the attenuated input voltage; differential transconductor elements, each having a first input connected to a respective output of the attenuator block, and generating first and second positive currents and first and second negative currents; a current source assembly adapted to controlling the transconductance of each differential transconductor element according to an analog control signal; and an output block converting first and second input currents into a differential output voltage and providing a second input of each differential transconductor element with a feedback voltage depending on the output voltage.

Abstract: A technique for minimizing the effect of parasitic capacitance in a resistive gain amplifier. Instead of the resistors being formed directly over the substrate, or over an oxide of the substrate, a semiconductor element (e.g., an n-well) is used between the resistor and the substrate. For resistors in the input circuit, this semiconductor element is connected to the voltage input rather than ground. For the resistors in the feedback loop circuit, the semiconductor element is connected to the voltage output of the operational amplifier. The insertion of this semiconductor element provides the ability to programmably connect the parasitic capacitance to somewhere other than ground. By connecting the parasitic capacitance to the voltage input or voltage output, the ground connection is eliminated, eliminating the pole introduced by the parasitic capacitance.

Abstract: A circuit structure for performing current amplification. The circuit structure may be standardized as a current amplifier cell such that many types of applications requiring current amplification may be created. The basic amplifier cell, which may accept voltage or current sources as an input signal, produces two identical output signals which may be used for feedback or serve as input to additional amplifier stages. This simple structure may be extended to perform current amplification with variable gain or AC or DC voltage-to-current conversion through the use of appropriately selected resistive elements.

Abstract: A cascode amplifier circuit which generates a fast, stable and accurate bit line voltage is disclosed. According to one exemplary embodiment, the cascode amplifier circuit comprises a transistor having a source connected to a bit line voltage and a drain connected to an output voltage. The cascode amplifier circuit also comprises a differential circuit having an inverting input connected to the bit line voltage, a non-inverting input connected to a reference voltage, and an output connected to a gate of the first transistor. The operation of the transistor and the differential circuit generate a fast, stable the accurate bit line voltage.

Abstract: A differential amplifier. A differential pair constructed by a first transistor and the second transistor receives differential input signals. The gate terminals of a third and fourth transistor are coupled to the source terminals of the fourth transistor and the third transistor respectively, and the third and fourth transistor construct a feedback device. This feedback device provides a positive feedback to the differential pair in the differential mode, thereby increasing AC amplitude of the differential amplifier. Further this feedback device substantially brings the drain currents of the first current path and the second current path into coincidence in the Vcom mode.

Abstract: A system for receiving signals (e.g., optical signals) includes an input device, an amplification device, and a feedback device. The amplification device receives a signal from the input device and includes a transimpedance portion. The transimpedance portion includes a first section having a plurality of elements (e.g., resistors and transistors) and a second section having a plurality of elements (e.g., resistors and transistors). One or more of the elements (e.g. transistors or resistors) in the first and second sections are mismatched to introduce a systematic offset in the transimpedance stage, to make the net input referred offset of the amplification device unidirectional. The feedback device (e.g. an integrator) is coupled to an output of the amplification device and an input of the transimpedance portion to provide a unidirectional offset correction to the amplification device for reduced noise enhancement.

Abstract: A fully integrated charge amplifier with DC stabilization includes a first amplifier having an input terminal and an output terminal, a first capacitor coupled between the input terminal and the output terminal of the first amplifier, a transimpedance amplifier having an input terminal coupled to the output terminal of the first amplifier and an output terminal, and an impedance device coupled between the input terminal of the first amplifier and the output terminal of the second amplifier. The impedance device has a resistance of at least 1 M?.

Abstract: An input buffer circuit without a drop of a capability of a circuit and a limitation of a connection type with a circuit of a former stage is obtained. The output signal (OUTB) is inputted to a first low pass filter circuit, and the first low pass filter circuit integrates the output signal (OUTB). A result of the integration is stored as a voltage value (V2a) in the capacitor (4s). In the same manner, an output signal (OUT) is inputted to a second low pass filter circuit, and the second low pass filter circuit integrates the output signal (OUT). A result of the integration is stored as a voltage value (V2b) in a capacitor (4t). A differential amplifier circuit (5) generates appropriate voltages (V3a and V3b) according to a design specification of the transistors (1x and 1y) by amplifying the voltage values (V2a and V2b) and outputs them. The voltages (V3a and V3b) are impressed on respective back gates of the transistors (1x and 1y), respectively.

Abstract: A preamplifier system is provided for use with a magneto-resistive (MR) sensor. Included is an alternating current (AC) coupling module connected to the MR sensor for blocking a direct current (DC) voltage associated with an input signal, and filtering low frequency noise associated with the input signal. Also provided is a gain stage module coupled to the AC coupling module. The gain stage module includes a plurality of cascode field effect transistors (FETs) configured for amplifying the input signal, while reducing intrinsic noise and increasing operational bandwidth. Coupled to the gain stage module is a control circuit for feeding back an output of the gain stage module for bias regulation and disturbance rejection.

Abstract: An apparatus for converting a fully-differential input signal to an output signal which varies between two rail limits and includes: (a) a first buffer receiving one component at a first input, presenting a first buffer output signal at a first buffer output and generating a first representative signal; (b) a second buffer receiving the other component at a second input, presenting a second buffer output signal at a second buffer output and generating a second representative signal; (c) a control unit coupled with at least one of the buffer outputs and comparing the buffer output signals with a reference signal to generate at least one control signal for reducing drift in the first and second components; and (d) an output unit coupled for combining the representative signals from the buffers to present the single output signal with rail-to-rail variance at an output locus.

Abstract: A modulator driver design is disclosed that employs a differential pair amplifier coupled to feedback amplifiers through tuning networks. Each tuning network comprises a set of inductors that enables a broadband response while reducing the loading effect of the feedback amplifier. An active load is placed at the output to serve multiple purposes, including: generating a high output swing, enabling a lower power supply voltage, and allowing the entire bias circuit to be monolithically integrated.

Abstract: A gain boost circuit is provided in a differential amplifier including differentially connected first and second input transistors the drains of which are coupled to sources of first and second cascode transistors. A third cascode transistor has a source coupled to a drain of the first cascode transistor and a drain coupled to a bias current source. A gain boost amplifier has an output coupled to the gate of the third cascode transistor, a first input coupled to the drain of the first cascode transistor, and a second input coupled to the drain of the second cascode transistor.