Abstract: The invention concerns an amplifier circuit for an IC whereby continuous symmetrical signal routing can be provided from the inputs to the outputs, without branches and crossovers and at low cost. The IC can be used as amplifier, buffer, line driver and line receiver with a minimum of external wiring. Two operational amplifiers (OA1) and (OA2) are each connected as non-inverting amplifiers and include integrated feedback impedances (RF1, RF2), a joint resistor (R 3) for adjusting the differential amplification, and a subtraction stage. According to the invention two complementary, parallel-connected differential amplifiers (DIF 1 and DIF 2) form the subtraction stage, each of which has its own pair of signal outputs (O 11/O 12 or O 21/O 22) for one differential signal in each case. Each of the signal outputs (O 11/O 12 or O 21/O 22) leads to its own driver (DV 11, DV 12, DV 21 and DV 22), which are interconnected so as to create a push-pull output stage in a bridge circuit.

Abstract: A comparator is operable within a wide supply voltage range. A source follower is connected at the output side of a differential amplifier stage, and a switch closes a feedback loop from the source follower to the differential amplifier stage. A diode, which has the same conductivity type as the conductivity type of the transistor used as the switch, is provided in order to set the operating point of the differential amplifier stage.

Abstract: A pre-amplifier circuit comprises an operation amplifier having a noninverting input terminal connected to a voice input terminal, a negative feedback circuit having a first resistor which is connected between an output terminal of the operation amplifier and an inverting input terminal of the operation amplifier, and a second resistor and a switching element which are connected in series between the inverting input terminal of the operation amplifier and a ground, an operating switch for switching a small signal input mode and a large signal input mode, and an on-off control circuit for bringing the switching element into an off state to operate the operation amplifier as a buffer circuit when the operating switch is switched to the large signal input mode, while bringing the switching element into an on state to operate the operation amplifier as an amplifier circuit when the operating switch is switched to the small signal input mode.

Abstract: A low power pulse amplifier with low duty cycle errors. The amplifier provides several differential amplifier stages with a biasing and canceling network. To minimize duty cycle errors for large input signals, cascode transistors are added between the drains of the differential amplifiers and the outputs. The result is an amplifier having a duty cycle error of less than 5% at amplitude input ranges from 5 millivolts to the supply voltage.

Abstract: A differential amplifier having reduced even-order non-linearity is provided that comprises a differential amplifier and an analog voltage compensation circuit that is coupled to one of the input ports to the differential amplifier so as to provide an analog compensation voltage to that input port so as to reduce the imbalance in the differential amplifier. In a preferred embodiment of the present invention, the analog voltage compensation circuit comprises a transconductance amplifier that is coupled between the output of the differential amplifier and one of the inputs of the differential amplifier which may be used to sense the effect of the imbalance on the output of the differential amplifier, and a direct current voltage source coupled to each of the inputs to the differential amplifier.

Abstract: Disclosed is a differential amplifier including an emitter follower pair, a first differential pair, and a main differential amplifier. The emitter follower pair is operative to receive an input differential voltage signal for shifting the input differential voltage signal to develop a shifted differential voltage signal. The first differential pair is configured to feed a first differential current inversely to the emitter follower pair so that a transconductance of the emitter follower pair changes inversely to compensate for a change in a transconductance of the first differential pair. The main differential amplifier is coupled to receive the shifted differential voltage signal and is configured to amplify the shifted differential voltage signal to generate an output voltage signal.

Abstract: A current amplifier A1 includes two transistors Q1 and Q2 whose emitters are interconnected via a resistor R1. The input of the current amplifier is constituted by the emitter of the first transistor Q1, whose collector is connected to the output terminal of the amplifier A1 via a second resistor R2, and to the first resistor R1 via the main current path of the second transistor Q2. The current amplifier A1 has a simple structure and a low input impedance, as well as an easily controllable gain.

Abstract: A preamplifier amplifies a differential signal from a magneto-resistive read head. The preamplifier is designed to maximize gain and minimize introduction of noise, while maintaining wide bandwidths and common mode rejection performance. The emitters of the differential amplifier are coupled together by a third transistor and a capacitor.

Abstract: A differential amplifier provides a high common mode rejection while maintaining substantially unchanged the input dynamic range. The differential amplifier includes a comparator having inputs to which are applied the two input signals, which are also applied to an operational amplifier, so that the comparator outputs a signal whose sign is indicative of the sign of the difference between the two input signals. The output of the operational amplifier is feedback to one of the inputs of the operational amplifier through a current mirror. This feedback signal is switched between the non-inverting input of the operational amplifier and the inverting input of the operational amplifier. The switching of the feedback signal ensures negative feedback, and is dependent upon the sign of the difference detected by the comparator.

Abstract: A current charged into or discharged from a phase-compensating capacitor C1 in an output circuit is controlled by a level shift circuit so that the current is kept constant for input signals inputted to the input terminals IN+ and IN- of a differential amplifier circuit, and also a current charged into or discharged from a phase-compensating capacitor C2 is controlled by the current correcting circuit so that the current become equal to a constant current controlled by the level shift circuit, namely to a current charged into or discharged from the phase-compensating capacitor C1. Therefore, even if a quickly rising or falling signal is inputted into the differential amplifier circuit, the MOS transistor MP11 or MN11 is not set in an offset state, which prevents generation of an overshoot or an undershot in the output terminal.

Abstract: A self-biased electret microphone amplifier with phantom powering which avoids the need for JFETs and depletion mode devices, both of which are not standard devices when using BiCMOS fabrication processes. Feedback is included to provide enhanced gain, dynamic range, linearity and temperature stability, without requiring filtering, large resistances or external components. A self-biased, phantom powered, differential MOSFET amplifier receives and pre-amplifies the microphone signal. Further amplification and feedback is provided by a differential amplifier and bipolar output amplifier which operates as a common emitter amplifier for the amplified microphone output signal and as an emitter follower amplifier for the feedback signal.

Abstract: There is disclosed a transconductance amplifier receives a voltage input and provides a current output. The transconductance amplifier includes a current mirror having a lowpass filter between transistors implementing the current mirror.

Abstract: A system and method for an amplifier control circuit is provided which does not require the use of a large off-chip or on-chip capacitor for achieving a low frequency coupling corner, while still effectively allowing AC coupling the data detection circuit. In addition, the input offset voltage to the amplifier may be compensated and the inherent random low frequency input voltages provided to the amplifier may be controlled or canceled. Further, the amplifier control circuitry includes a freeze capability which allows the control circuitry to halt all updates to the input offset/low frequency control circuit when the voltage input signal is interrupted. In addition low frequency control and offset compensation updates may be performed without causing large output signal glitches so that the integrity of the received signal will not be compromised. In a preferred embodiment the system and method may be utilized for data detection circuits utilized in conjunction with optical disks.

Abstract: The invention is an amplifier configuration which provides signal gain at very low levels of distortion. The inventive amplifier configuration consists of two amplifiers whose outputs are added to give the total amplified signal. A first amplifier functions in the usual way, amplifying a signal from a voltage source and having a controllable feedback gain. A second amplifier is also fed by the voltage source but applies a feedback gain to the total amplified signal rather than to its own output signal. By selecting the feedback gains to be substantially identical, portions of voltage waveforms that have been removed or altered due to clipping or other forms of distortion are restored by the second amplifier. The invention is particularly useful when amplifier gain is low, e.g., at high frequencies. Suitable implementations are in the voltage domain, using operational amplifiers, or in the current domain, using, for example, voltage-controlled current sources.

Abstract: The present invention discloses a mixer using a replica voltage-current converter, and more particularly a mixer using the replica voltage-current (V-I) converter of the present invention, which feedbacks the output current of the replica voltage-current converter using an additional amplifier so as to improve the linearity thereof by the gain of the amplifier because the conventional mixer operating at a high speed dissipates a lot of electrical power to have low output impedance.

Abstract: A low noise differential amplifier includes a differential stage and first and second unbalanced differential feedback amplifiers. The differential stage includes first (13) and second (14) load devices coupled to first (11) and second (12) conductors, respectively, a resistor (RS), a first input transistor (Q1) having a first electrode coupled to the first conductor and a second electrode coupled by a third conductor (16) to a first terminal of the resistor (RS), and a second input transistor (Q2) having a first electrode coupled to the second conductor (12) and a second electrode coupled by a fourth conductor (17) to a second terminal of the resistor (RS). The first feedback amplifier (18) includes a third input transistor (Q5) coupled between the third conductor (16) and the first current source transistor (Q3). The first feedback amplifier (18) drives the control electrode of the first input transistor (Q1).

Abstract: The present invention describes a bipolar impedance converter circuit, which comprises a differential amplifier that has a closed-loop control circuit in its negative feedback loop. This closed-loop control circuit comprises npn transistors, which because of their relatively low stray capacitances and their fast switching speed provide an impedance converter circuit with greater invulnerability to disturbances in the supply voltage and have faster switching behavior than known circuits in the prior art, which use pnp transistors in their negative feedback loop.

Abstract: The present invention is a dual-input-to-single-output amplifier circuit having a processing amplifier, first and second coupling regions, first and second input impedance circuits, first and second feedback impedance circuits, first and second shunting impedance circuits. The processing amplifier has first and second input regions and an output region. The first and the second input regions each exhibit a relatively high circuit impedance. The output region exhibits a relatively low circuit impedance. The processing amplifier is capable of providing at the output region a signal in a first magnitude direction substantially similar to a signal provided at the second input region in the first magnitude direction but of a greater magnitude in the first magnitude direction.

Abstract: A digital data driver includes a differential amplifier having transistors which operate as a push-pull amplifier in class C mode. The transistors are conductive or non-conductive and controlled in response to a differential data input signal. The driver provides current to a load resistor of an external equipment and the direction of the current flowing therein is reversed in response to the input data. The differential amplifier transistors are connected to other transistors which provide source impedance to the external equipment. The source impedance of the driver is a controllable characteristic impedance of e.g., 50 .OMEGA..

Abstract: A linear gain controlled amplifier comprising a differential transistor pair having an input and an output. The input is connected to a current supply which includes both AC and DC components. A voltage is derived which is proportional to the DC current component and this is compared with a control signal to produce an error signal which is supplied to the gain control terminals of the differential transistor pair. Traditionally, gain control has been implemented using a closed loop consisting of a power detector, a loop filter and a gain control element. The output of the power detector is compared with a reference voltage in a comparator, the output of which is filtered by the loop filter and applied to a control input of the gain control element. Most power detectors are either inaccurate or expensive and elaborate and may exhibit a control error of several decibels.

Abstract: An amplifier having error correction and including an output stage containing output transistors being connected to the amplifier output, and an output error correction stage containing a first high open loop gain amplifier which includes one or more transistors being the first high open loop gain amplifier transistor or transistors, an output of which is connected to an input of the output stage, the amplifier including at least two local negative feedback paths, a first local negative feedback path being between an output of the output stage and an input of the first high open loop gain amplifier and a second local negative feedback path being between an output of the first high open loop gain amplifier and an input of the first high open loop gain amplifier.

Abstract: A method for generating a response in a transconductance circuit includes receiving a circuit differential voltage input and providing a differential voltage input to each of a plurality of differential pairs to control, in part, a differential current generated by each differential pair. Each differential voltage input has a different common-mode voltage level. The method also includes sinking current through each of the differential pairs to control the differential current generated by each differential pair. The magnitude of the current sunk through one of the differential pairs is different from the magnitude of the current sunk through at least one of the other differential pairs. The method also includes combining the generated differential current from each of the plurality of differential pairs to produce a differential current output.

Abstract: The AGC circuit and method especially applicable in circuits where fast response and stability of the system is necessary, such as where input signals are speech patterns. A gain feedback loop repeatedly adapts the gain and a long term average energy E.sub.mean of the output signal until it approaches a predetermined level. In each pass through the gain feedback loop the long term average energy E.sub.mean is increased by a gain compensation parameter directly proportional to a gain change, thereby rapidly adapting the long term average energy E.sub.mean to converge to the predetermined level.

Abstract: A voltage regulator capable of improving system response. The voltage regulator includes a feedback circuit and an operational amplifier. The input terminal of the feedback circuit is coupled to an output voltage terminal for attenuating signals coming out of the output terminal. The operational amplifier comprises a pre-amplifier, a clamping circuit and a power amplifier, all serially connected together. The input terminals of the pre-amplifier are respectively coupled to the output terminal of the feedback circuit and an input voltage terminal. The pre-amplifier is a device for amplifying differential voltage between input voltage signals and feedback voltage signals. The clamping circuit is a device for clamping amplified differential voltage from the pre-amplifier between a pre-defined voltage range. The power amplifier is a device for increasing the power of the differential voltage signals.

Abstract: The present invention is a differential amplifier with circuitry to eliminate the effect of transistor impedance other than an actual load impedance on voltage gain. The circuitry includes a pair of transistors 400 and 402, each with a base connected to a respective input of the differential amplifier along with a similar base connection of a respective one of transistors 100 and 102, and an emitter connected to a current source 404. A collector of transistor 400 is connected through transistor 410 to the emitter of a current sink transistor 306, while the collector of transistor 402 is connected through transistor 412 to the emitter of a current sink transistor 308. Operational amplifiers (opamps) 420 and 422 serve as voltage followers to connect the collector of transistor 100 to the base of transistor 412, and the collector of transistor 102 to the base of transistor 410.

Abstract: A differential amplifier circuit has a differential amplifier circuit section for amplifying a difference voltage between an inverting input node and a non-inverting input node, and an output buffer circuit for outputting, to an output node, the amplified difference. The differential amplifier circuit section is connected to a first high potential power supply node and a first low potential power supply node, and is driven by potentials applied to the first high potential and first low potential power supply nodes. The output buffer circuit is connected to a second high potential power supply node and a second low potential power supply node, and is driven by potentials applied to the second high potential and low potential power supply nodes.

Abstract: A transmission-line loss equalizing circuit includes an equalizer, a gain control circuit for controlling the gain of the equalizer based upon the peak value of an equalized output, a slicer for slicing the equalized output and outputting a data pulse, a timing extraction pulse and an equalization control pulse, a DC feedback level detector for detecting a DC component of the equalized output and feeding the DC component back to the equalizer, and an attenuating circuit provided as an initial stage of the equalizer. A plurality of .sqroot.fAGC circuits constructing the equalizer are cascade-connected and constructed by a differential non-inverting amplifier.

Abstract: An impedance matching circuit includes a differential amplifier providing a differential output signal across two output terminals. The differential amplifier receives the input signal whose input impedance is to be matched at one of the differential input terminals. The other one of the differential amplifier's input terminals is coupled to ground by a resistor. In one embodiment, feedback signal paths from the output terminals are provided by feedback resistors. In another embodiment, feedback signal paths from the output terminals are currents related by the ratio of the resistance of the resistor to the input impedance.

Abstract: An input amplifier for input signals with steep edges has a MOS transistor, whose source or drain is connected to a node connected to an output stage. The output signal is fed back into the amplifier which prevents the MOS transistor from being turned off by steep edge input signals. The node is pulled up to the operating voltage as soon as the input signal is present.

Abstract: A differential amplifier circuit including a differential input circuit which receives first and second input signals. The differential input circuit amplifies a potential difference between the input signals and outputs first and second voltage signals representing the potential difference. The first and second voltage signals are connected, respectively, to first and second output transistors. The first and second output transistors are serially connected to each other between a first supply voltage and a second supply voltage. A node between the first and second output transistors provides an output terminal. A control circuit receives the first and second voltage signals and controls the drain current of the first output transistor based on a difference between the first and second voltage signals.

Abstract: Each of a plurality of photodiodes forming a photodetector is mounted on a respective metal pad on the surface of a semiconductor integrated circuit chip including a corresponding number of amplifier circuits for detecting the photocurrent from respective photodiodes. Each circuit comprises a high gain, high input impedance amplifier and a feedback element, typically a resistor of high value, connected across the amplifier between input and output nodes thereof. Each photodiode mounting metal pad and each feedback resistor is connected to a common input node of a respective amplifier by metal paths within a connecting structure forming part of the integrated circuit. Adverse effects on the output current from the photodiodes are reduced by forming a junction of the path from each feedback resistor with the path from the corresponding photodiode at the metal pad on which the photodiode is mounted, and interconnecting such junction along a common path to the corresponding amplifier input node.

Abstract: A fully differential voltage-current converter, comprising a differential operational amplifier which is supplied with a differential voltage to be converted into a current, a first transistor being fedback to a noninverting input of the amplifier, a second transistor being fedback to an inverting input of the amplifier, the second transistor having the opposite polarity with respect to the first transistor, a third transistor and a fourth transistor having mutually opposite polarities being connected between a supply voltage and ground and to the second transistor in order to force a current that flows through the second transistor to be equal to a current that flows through the first transistor, a gate terminal of the first transistor being connected to a gate terminal of the fourth transistor.

Abstract: An amplifier circuit influenced less by an offset voltage and capable of permitting an as broad as possible dynamic range is provided.

Abstract: A wide-band, high-order, programmable video filter is implemented using transimpedance-based active integrators. An input voltage which may for instance represent a composite video signal is converted to a current in a linear manner using resistors and provided to a current amplifier at low impedance virtual ground nodes. The current is multiplied by a gain factor .beta..sub.R within the current amplifier and supplied to integrating capacitors connected in a feedback configuration around a high input impedance differential amplifier to establish an integrated differential voltage output. The transimpedance-based active integrators may be interconnected to realize wide-band, high-order video filters suitable for use in accordance with CCIR 601 standards. Input voltage swings are not restricted by a transistor's limited range of linear operation or voltage swing limitations of internal nodes but rather may allowed to swing as long as the bias currents sustain input current excursions.

Abstract: A differential transconductance amplifier includes two first NPN transistors, whose bases receive a differential input voltage, and whose collectors are coupled to a first supply voltage through two respective first current sources; two second NPN transistors respectively coupling the emitters of the first transistors to a second supply voltage, and whose bases are coupled to the collectors of the respective first transistors through level shifters; and a resistive means coupled between the emitters of the first transistors. Each level shifter includes a third PNP transistor coupled between the collector of the respective first transistor and the base of the respective second transistor, and whose control terminal receives a constant bias voltage independent of the differential input voltage.

Abstract: A differential circuit having a relatively simple structure capable of delivering a linear transfer characteristic and expanding an input dynamic range. An increase in magnitude of differential input voltage V.sub.in applied to each gate of differential-pair MOSFETs M1 and M2 in the differential circuit decreases control voltage V.sub.CONT in a control circuit. On the other hand, since a current fed to MOSFETs M3 and M4 in the differential circuit decreases simultaneously, a current supplied to the differential-pair MOSFETs M1 and M2 in the differential circuit increases. Thus, the present invention makes it possible to effectively expand the input dynamic range with respect to differential input voltage V.sub.in.

Abstract: An analog video buffer utilizes a complementary push-pull CMOS source follower video buffer with a feedback driver. The CMOS source follower provides a low impedance output node with high driving capabilities, high switching speed, and rail-to-rail linearity and the feedback driver isolates the output node from the feedback needed for the design of the video buffer to provide a transient response without ringing or overshoot.

Abstract: A filter circuit adjustably decreases or increases the amplitude of audio signals in a predetermined frequency range. The filter circuit includes a filter module having an RC network with at least one frequency-response-determining RC member whose resistor component R is realized in SC technology. A setting device is connected to the filter module such that its setting determines the frequency response of the SC filter. The setting device renders possible a neutral setting in which the effective audio signal path of the filter circuit circumvents the filter module so that no decrease or increase of the amplitude of individual frequency portions takes place. Furthermore, an audio signal processor comprises at least one audio signal input, at least one audio signal output, and at least one control input.

Abstract: A CMOS buffer amplifier can accept input signals and produce output signals that are within one half of the enhancement threshold voltage of the power supply voltages. These characteristics make this buffer amplifier ideal for use with low voltage CMOS circuitry with sub-micron geometries. The buffer amplifier contains two differential amplifiers, the output of both being combined and coupled to an output node. Each differential amplifier has matched input transducing devices on each of its inputs. One of these couples the input of the buffer amplifier to one of the inputs of the differential amplifier, while the other one couples the output of the buffer amplifier as feedback to the other side of the same differential amplifier. The pair of input transducing devices providing input to one differential amplifier are matched and suitable for operation in a higher voltage range than are the matched pair providing input to the other differential amplifier.

Abstract: A differential amplifier with double output stages used to eliminate the charge injection noise and switching capacitor noise is disclosed. This system includes an input stage, a middle stage, a first balanced output stage, a second balanced output stage, a negative feedback network and a common mode feedback network. The input stage processing the differential input signal, connects to the middle stage and the negative feedback network which increasing the gain of input signal and connects to the first balanced output stage and second balanced output stage. The first balanced output stage is connected to the negative feedback network for stabilizing the frequency response, and the second balanced output stage is connected to the common mode feedback network for controlling the common level of double terminals output into a setting range of voltage. Thus the output signal of the amplifier will be a clear waveform without redundant noise for next connecting circuit.

Abstract: A differential amplifier circuit which enables oscillation of pre-scaler to prevent at the time no-signal causes sensitivity not to deteriorate to an AC signal itself. The differential amplifier circuit comprises a first pair of differential device consisting of transistors to which AC signal is inputted, load resistances, and a constant-current source, a second pair of differential device which is connected so as to perform positive feedback from terminals in between both ends of load resistances, and a capacitor for performing by-pass of AC signal of the terminals.

Abstract: A three-stage amplifier including first, second, and third sequentially coupled stages is compensated without use of compensation capacitors, by applying an input signal to an input of the first stage and a first input of a first feed-forward stage, coupling an output signal of the first feed-forward stage to an output of the second stage, the second stage having an input coupled to an output of the first stage, coupling an output signal of the first stage to an input of a second feed-forward stage, coupling an output of the second feed-forward stage to an output of the third stage, coupling the input signal to an input of a third feed-forward stage, and coupling an output of the third feed-forward stage to the output of the third stage.

Abstract: A compensation scheme for differential- or single-input transconductance amplifiers relies on an active feedback path with a resistive pole-splitting compensation circuit. The resistive compensation circuit causes pole-splitting of the two dominant poles, moving one pole to a slightly lower frequency and the other to a much higher frequency compared to the dominant poles of the uncompensated amplifier. A DC-blocking capacitor may also be placed in series with the resistor of the compensation circuit to allow for proper biasing of the circuit. By selecting appropriate values for the passive elements in the compensation circuit, the compensation scheme of the present invention can cause the amplifier to operate in a stable, linear manner over the same or even a larger bandwidth than an equivalent amplifier without compensation. The present invention does not suffer the problems of standard narrowbanding compensation schemes associated with high frequency cut-off.

Abstract: A rail-to-rail type of operational amplifier is provided, which has a low offset voltage and improved bandwidth, slew rate, and phase margin. This operational amplifier includes two level-shifting input circuits for receiving two input voltages. The input voltages are further divided into four subvoltages which are then processed by a pair of differential amplifiers. The output differential currents from the differential amplifiers are further processed respectively by two current-summing circuits. The potential difference between the outputs of these two current-summing circuits is then fed to a bias circuit which, in response to the input potential difference, generates a floating bias. An output circuit takes the floating bias as input to thereby generate an output voltage which is regarded as the output of the operational amplifier.

Abstract: A differential transimpedance amplifier with reduced input impedance and increased bandwidth having a pair of input contacts, a pair of summing transistors, a pair of feedback transistors, a pair of output resistors, a pair of feedback resistors, a first and a second node and a pair of output contacts. The input contacts each being connected to one or more sources of current that are to be summed and are connected to the pair of summing transistors. The pair of feedback transistors are connected to the pair of input contacts, the pair of feedback resistors and to the first node for differentially reducing the input impedance of the pair of summing transistors and to overcome voltage excursions at the pair of input contacts to increase the operational bandwidth of the transimpedance amplifier.

Abstract: An output circuit 1 has a p-type MOS transistor Q1 connected between a power-voltage node and an output node, and an n-type MOS transistor Q2 connected between a ground-voltage node and the output node. A voltage-current conversion circuit 2 outputs a voltage according to the voltage difference between an input signal and the comparison voltage. According to the output from the voltage-current conversion circuit 2, a signal conversion circuit 3 controls the voltage of the gate electrode of the MOS transistor Q1 with a reference of a second specified voltage, and controls the voltage of the gate electrode of the n-type MOS transistor Q2 with a reference of a first specified voltage.

Abstract: A differential comparator having a low-offset comparator and two processing paths, each of which receives one of the two primary inputs to the differential comparator and generates one of the two inputs to the low-offset comparator. The output of the low-offset comparator is the output of the differential comparator. Each processing path is capable of (1) generating an offset voltage and (2) turning on and off the generation of that offset voltage. In a preferred embodiment, each processing path has a passive resistor that generates the offset voltage and a pair of shunt transistors that selectively shorts out the passive resistor. The output of the low-offset comparator is connected (either directly or indirectly through an inverter) to the gates of the shunt transistors. The shunt transistors are therefore controlled by the output of the low-offset comparator. In each of two modes of operation, a different one of the passive resistors is "on" while the other passive resistor is "off.

Abstract: A multi-stage differential amplifier includes first and second DC current paths with first and second stage amplification transistors included in each current path so that both stages share the same DC bias current. In one embodiment, an automatic gain control circuits are included in the second stage to control gain and maintain low noise figure.

Abstract: A device for converting a current pulse signal into a voltage pulse signal through a conversion from a current to a voltage includes a converting unit converting the current pulse signal into a first voltage signal, a voltage reducing unit generating a second voltage signal by reducing a magnitude of the first voltage signal, a delay unit generating a third voltage signal by delaying the second voltage signal, and a comparison unit generating the voltage pulse signal by comparing the first voltage signal with the third voltage signal.

Abstract: Various circuit techniques to implement continuous-time filters with improved performance are disclosed. The present invention uses RMC type integrators that exhibit lower harmonic distortion. In one embodiment, a novel high-gain two-pole operational amplifier is used along with RMC architecture to achieve lower harmonic distortion. In another embodiment, the present invention uses dummy polysilicon resistors to accurately compensate for the distributed parasitics of the polysilicon resistors used in RMC integrator. In yet another embodiment, the present invention provides an on-chip tuner with a differential architecture for better noise immunity.