To Eliminate Crossover Distortion Patents (Class 330/268)
  • Patent number: 5061902
    Abstract: The provision of shoot-through protection with means for producing a low impedance path from the gate of each power transistor to its source conduction electrode if the gate to source voltage at the other transistor is greater than a reference value. This additional circuitry permits the use of a desired driver circuit without modification, while preventing shoot-through whether from the driver signals or from high output voltage changes.
    Type: Grant
    Filed: October 3, 1990
    Date of Patent: October 29, 1991
    Assignee: International Business Machines Corp.
    Inventor: Gary D. Carpenter
  • Patent number: 5057790
    Abstract: An audio amplifier reduces crossover distortion typical of class AB push-pull amplifiers by including means for preventing either of the output transistors from being cut off during any portion of the audio waveform. This desirably eliminates sharp discontinuities associated with the transfer function of the amplifier. The circuit includes two base-emitter voltage multipliers and a nonlinear transconductance feedback amplifier.
    Type: Grant
    Filed: July 16, 1990
    Date of Patent: October 15, 1991
    Inventor: Ernest D. Landi
  • Patent number: 5055797
    Abstract: An automatic bias control for substantially eliminating crossover distortion in power amplifiers. The bias current is measured in terms of a voltage developed across a resistor in series with the output device. This voltage is processed by a bias control function consisting of a summing circuit, a peak minimum detection circuit, a voltage reference and a mixing circuit added to the output stage in a controlled feedback loop. Elements of these circuits include operational amplifiers. The bias control system is compatible with other feedback loops in the amplifier so that transient and drift control are achieved and no instabilities are introduced. The bias control operates in the presence of widely varying high level signals.
    Type: Grant
    Filed: January 25, 1990
    Date of Patent: October 8, 1991
    Inventor: William T. Chater
  • Patent number: 5049834
    Abstract: An amplifier having an input stage with inverting and non-inverting input terminals, a voltage amplifier stage with relay terminals and being operatively connected to the input stage, a SEPP output stage with transistors and an output terminal, and a constant-current bias circuit between the relay terminals for absorbing current bypassing between the relay terminals. The transistors are connected to the output terminal via resistors. The constant-current bias circuit is free of being in direct connection with the output terminal. The amplifier is incorporated in place of an emitter follower in a compact disc player or laser video player and may be incorporated into a driver of a loudspeaker, a magneto-optical recording system or a magnetic disc system for mass storage.
    Type: Grant
    Filed: March 21, 1990
    Date of Patent: September 17, 1991
    Inventor: Takafumi Kasai
  • Patent number: 4959623
    Abstract: A low impedance class AB buffer stage in complementary transistor technology has its quiescient current stabilized and its operation thereby made more reliable by means of suitable error op-amps that are supplied with transistor feedback loops which are connected to the stage's output terminal through resistors. In addition, for full rail-to-rail output voltage capability, transistor switching devices are added to turn off current through either of the resistors when the output voltage approaches the voltage of either power rail, and also a pair of serially rail-to-rail connected transistor is connected in parallel with the feedback loops.
    Type: Grant
    Filed: July 19, 1989
    Date of Patent: September 25, 1990
    Assignee: AT&T Bell Laboratories
    Inventor: John M. Khoury
  • Patent number: 4893091
    Abstract: A complementary current mirror includes a PNP transistor and an NPN transistor, one of which serves as a control transistor and the other of which serves as an output transistor. A V.sub.BE voltage generated by forcing a control current into or out of the emitter of the control transistor is imposed between the base and emitter of the output transistor to produce a controlled current in the collector of the output transistor. A first such current mirror, with an NPN control transistor, and a second such current mirror, with a PNP control transistor, are driven by the same control current to supply first and second input bias currents to a diamond follower circuit in the same integrated circuit as the first and second current mirror circuits to face the V.sub.BE voltage of the PNP and NPN transistors of the diamond follower circuit to be equal despite variation in saturation currents of the PNP and NPN transistsors. This results in zero input offset for the diamond follower circuit.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: January 9, 1990
    Assignee: Burr-Brown Corporation
    Inventors: William J. Lillis, Anthony D. Wang
  • Patent number: 4864249
    Abstract: A nonslewing amplifier comprises two push-pull voltage-amplification stages each having a complementary pair of grounded-emitter transistors. The first stage has a load impedance connected to each of the transistor collectors. A pair of feedback compensation capacitors are each connected from the collector output to the base input of a respective transistor of the second stage. When a large fast signal causes slewing in one half of these stages due to insufficient current from the respective load impedance to charge the associated compensation capacitor at the rate required by the signal, the transistor in the other half of the first stage draws enough current to discharge the other compensation capacitor at a rate fast enough to transmit an undistorted signal to the second stage where it is amplified and transmitted to the following drive stage. Slew limiting and transient intermodulation distortion are thereby avoided.
    Type: Grant
    Filed: December 29, 1988
    Date of Patent: September 5, 1989
    Inventor: Martin G. Reiffin
  • Patent number: 4814723
    Abstract: To obtain a constant quiescent current, high dynamics and high stability of a class AB output stage of low-frequency amplifiers, comprising an input transistor; a driving circuit comprising a current source, a first pair of driving transistors connected in series between the current source and the input transistor, a second pair of driving transistors mutually connected in series and driven by the first pair of driving transistors; as well as a pair of output transistors driven by the second pair of driving transistors, the driving circuit comprises a first resistor connected between the current source and the base of one of the first pair of driving transistors, a second resistor connected between the bases of the transistors of the first pair and a resistive network inserted in series between the transistors of the second driving pair.
    Type: Grant
    Filed: April 12, 1988
    Date of Patent: March 21, 1989
    Assignee: SGS-Thomson Microelectronics S.p.A.
    Inventor: Edoardo Botti
  • Patent number: 4803441
    Abstract: An amplifying circuit comprises a voltage-current converter for voltage-current converting an input signal to be amplified and a current-current converter including a first transistor (NPN), a second transistor (NPN), a third transistor (PNP) and a fourth transistor (PNP). Emitters of the first and third transistors are connected to each other, collector and base of the second transistor are connected to each other, collector and base of the fourth transistor are connected to each other, emitters of the second and fourth transistors are connected to each other, bases of the first and second transistors are connected to each other and bases of the third and fourth transistors are connected to each other. Output current of the voltage-current converter is supplied to the emitters of the first and third transistors and a constant current is supplied to the second and fourth transistors.
    Type: Grant
    Filed: March 10, 1987
    Date of Patent: February 7, 1989
    Assignee: Yamaha Corporation
    Inventor: Masao Noro
  • Patent number: 4728903
    Abstract: The disclosed amplifier comprises a MOSFET output stage biased for Class A operation and a bipolar current amplification stage biased for Class C operation. The latter stage is normally cut off, and at low power output levels the entire output signal current is provided by the output stage. Current sensing resistors measure the magnitude of the output current and apply to the base-emitter junctions of the current amplification transistors a bias voltage proportional to the output current. When this current reaches a predetermined magnitude the current amplification stage becomes active so as to provide additional output signal current in parallel with that provided by the output stage. As a result at higher power output levels the output stage sees a load impedance much higher than that of the loudspeaker system and therefore has a flatter load-line which maintains its operating point in the active region.
    Type: Grant
    Filed: May 2, 1986
    Date of Patent: March 1, 1988
    Inventor: Martin G. Reiffin
  • Patent number: 4713629
    Abstract: The positive and negative outputs of an operational amplifier are employed to drive two oppositely phased current mirror circuits, which in turn drive oppositely phased power amplifier stages which drive the load directly without the use of an output transformer. Negative feedback is provided from the output to the operational amplifier to enhance flat response over the frequency range of interest. The oppositely phased power output stages are supplied by a power source which provides positive and negative supply voltages with reference to reference "ground". A plurality of capacitors are selectively connected as need be between the positive and negative voltage busses and ground to bypass spurious high frequency oscillations. A relatively high voltage output is achieved from the amplifier without exceeding the breakdown voltages of the transistors by employing a plurality of cascaded "Darlington" type circuits in the power amplifier.
    Type: Grant
    Filed: November 19, 1986
    Date of Patent: December 15, 1987
    Inventor: Brahm R. Segal
  • Patent number: 4700282
    Abstract: A monolithically integratable control circuit for the switching of inductive loads, have a push-pull output stage formed by transistors each having their base terminal connected to a control circuit and to a charge extraction transistor driven to conduct at saturation in phase opposition with respect to the output transistor to which it is connected. This charge extraction transistor has its base terminal connected via a diode to the control circuit and to a biasing resistor.
    Type: Grant
    Filed: September 15, 1986
    Date of Patent: October 13, 1987
    Assignee: SGS Microelettronica SpA
    Inventors: Pietro Menniti, Angelo Alzati
  • Patent number: 4607233
    Abstract: To obtain class AB operation of a push-pull amplifier which uses a preamplifier and an output amplifier having complementary output transistors, the base-emitter voltage of the first output transistor is converted into a current by a voltage-to-current converter and this current is re-converted into a base-emitter voltage by a current-to-voltage converter and added to the base-emitter voltage of the second output transistor. The sum of said base-emitter voltages is maintained equal to a reference voltage generated across two diode-connected transistors (T.sub.7, T.sub.8) by a differential amplifier.
    Type: Grant
    Filed: February 27, 1985
    Date of Patent: August 19, 1986
    Assignee: U.S. Philips Corporation
    Inventor: Adrianus J. M. Van Tuijl
  • Patent number: 4595883
    Abstract: An emitter-follower type single-ended push-pull circuit for which no temperature compensation is required and for which it is unnecessary to adjust the idle current. First and second complementary current mirror circuits are coupled as loads of respective first and second complementary differential amplifiers. Each of the differential amplifiers includes a first transistor to which an input signal voltage is applied, a second transistor to which a voltage at the output terminal of the circuit is applied as an input signal with the second transistor being connected in parallel with the first transistor, and a third transistor to which a voltage corresponding to an emitter or source voltage of a respective one of the output transistors is applied as an input voltage. The collector or drain output of the third transistor is employed as a drive output to a respective drive transistor in the output stage.
    Type: Grant
    Filed: September 6, 1984
    Date of Patent: June 17, 1986
    Assignee: Pioneer Electronic Corporation
    Inventor: Kazuaki Nakayama
  • Patent number: 4588960
    Abstract: The invention provides a class B output stage for an amplifier, more specifically an integrated circuit amplifier for low power, low voltage application, such as a hearing aid amplifier, that is of class B type with consequent negligible quiescent power dissipation, but which avoids the input voltage deadband of conventional class B stages that results in cross-over distortion. The stage uses a bipolar transistor and a field transistor connected in series. The field effect transistor has a gate-source pinch-off voltage that is approximately equal to the base-emitter voltage of the bipolar transistor, so that they are alternately "on" as the input voltage swings over its full value. In a preferred embodiment the bipolar transistor is an npn type while the field effect transistor is a bipolar compatible p-channel junction field effect transistor (JFET) with pinch-off voltage as close as possible but just less than the base emitter voltage of the bipolar transistor.
    Type: Grant
    Filed: August 3, 1984
    Date of Patent: May 13, 1986
    Assignee: University of Toronto Innovations Foundation
    Inventors: Clement A. Salama, Satwinder D. Malhi
  • Patent number: 4587491
    Abstract: A class AB monolithic silicon IC output stage is shown wherein the main output transistors are NPN structures. The current sourcing transistor is provided with an additional scaled down reference emitter and the two emitters connected to the inputs of an op amp which has its output coupled to drive the current sink transistor. The base of the current source transistor is driven from a high gain driver transistor stage which may also contain a d-c level shifter that permits the inclusion of a complementary current sink transistor that can greatly reduce cross-over distortion while conducting only quiescent current.
    Type: Grant
    Filed: April 29, 1985
    Date of Patent: May 6, 1986
    Assignee: National Semiconductor Corporation
    Inventor: Matsuro Koterasawa
  • Patent number: 4586001
    Abstract: A Class B push-pull amplifier designed for use at low supply voltages (e.g. 1 to 2 volts) wherein complementary push-pull output transistors T.sub.3, T.sub.4 are biased by a biasing chain consisting of resistor R.sub.1, transistor T.sub.1, resistor R.sub.2, transistor T.sub.2, resistor R.sub.3, with the signal to the bases of T.sub.3, T.sub.4 being supplied from opposite ends of R.sub.2. The value of R.sub.2 is twice that of R.sub.1 and R.sub.3. The circuit is preferably used in a bridge configuration with a second similar amplifier set at unity gain driven from the first amplifier. It may be used to power the loudspeaker of a miniature radio receiver.
    Type: Grant
    Filed: April 3, 1984
    Date of Patent: April 29, 1986
    Assignee: Sinclair Research Ltd.
    Inventor: Michael R. Pye
  • Patent number: 4558288
    Abstract: An emitter-follower type SEPP circuit in which, by detecting idle currents and distortion components and feeding such signals back to an error amplifier in a real time mode, a very stable circuit with little crossover distortion is provided. The input signal is applied through opposite-polarity bias potential sources to noninverting first terminals of first and second error amplifiers, one for the positive half cycle and the other for the negative half cycle. The outputs of the two error amplifiers are applied through constant current sources to bases of respective bipolar transistors, the emitters of which are connected in a feedback arrangement to noninverting input terminals of the two amplifiers. The emitters of the two bipolar transistors are further connected through a resistance network to an output terminal. The resistance network also has a feedback terminal, which is connected through third and fourth bias potential sources to respective noninverting input terminals of the two amplifiers.
    Type: Grant
    Filed: April 11, 1984
    Date of Patent: December 10, 1985
    Assignee: Pioneer Electronic Corporation
    Inventor: Kazuaki Nakayama
  • Patent number: 4555672
    Abstract: A high frequency audio amplifier in which the positive and negative bias ports of an operational amplifier are employed to drive two oppositely phased current mirror circuits. Additionally, the outputs of the current mirror circuits are current regulated in terms of the number of base emitter voltage drops in power amplifier circuitry following the current mirrors. Further, the output stage employs parallel connected radio frequency type transistors.
    Type: Grant
    Filed: November 17, 1983
    Date of Patent: November 26, 1985
    Inventor: Brahm R. Segal
  • Patent number: 4520323
    Abstract: A SEPP class B amplifier circuit of the non-cutoff type is improved by constructing the circuit such that the idle currents from first and second amplifiers are made independent of the circuit input by providing three-terminal error amplifiers in a feedback loop which receive, as inputs, level-shifted circuit inputs and output resistance network outputs, and amplifier outputs.
    Type: Grant
    Filed: August 17, 1983
    Date of Patent: May 28, 1985
    Assignee: Pioneer Electronic Corporation
    Inventor: Kazuaki Nakayama
  • Patent number: 4491804
    Abstract: A Class AB amplifier circuit includes bias circuitry for biasing the output transistor into partial conduction independent of the base-to-emitter voltage of the transistor. The bias circuitry is a simple circuit loop including the output transistor and forms the remainder of the amplifier circuit which can be fabricated in monolithic integrated circuit form. The loop comprises a differential amplifier for providing a substantially constant offset voltage across a pair of terminals between which is connected a current biasing component. The current biasing component is connected in series with the output transistor to produce a small quiescent current to flow therethrough, the value of which is independent of the transistor's characteristics.
    Type: Grant
    Filed: November 18, 1982
    Date of Patent: January 1, 1985
    Assignee: Motorola, Inc.
    Inventors: W. Eric Main, Dennis L. Welty, Don W. Zobel
  • Patent number: 4489283
    Abstract: A power amplifier comprises a power amplifying element for driving a load wherein a forward bias voltage applied between an input terminal and an output terminal of said power amplifying element which varies depending upon an output current of said power amplifying element, is detected and converted into a calibration current to feed back the current to the input terminal of said power amplifying element to calibrate variation of the forward bias voltage of said power amplifying element in linear variation in full cycle of input signal given by a signal source and to prevent cut-off of said power amplifying element in full cycle.
    Type: Grant
    Filed: January 28, 1982
    Date of Patent: December 18, 1984
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yasuhiro Ishizaki
  • Patent number: 4484150
    Abstract: The present invention comprises an amplifier circuit (2, 1100, 1500, 1600) and transformer based power supply (24, 500, 700, 1710) wherein greater efficiency is achieved by using the input signal characteristics to control various aspects of the circuit operation. The transformer primary winding (8, 500a, 700a, 1710a) is energized by a pulsed power supply (6, 502, 702, 1702) which is duty cycle modulated in response to the signal being amplified. One embodiment of the amplifier employs output transistors (Q1101, Q1103, Q1105, Q1107, Q1109, Q1111) connected to respective stepped voltage levels. Amplifier control circuitry (1126, 1130, 1138, 1140) acts in relation to the input signal amplitude to more evenly distribute the voltage drop across the interconnected transistors (Q1101, Q1103, Q1105, Q1107, Q1111), thus reducing amplifier power requirements and minimizing distortion in the amplifier output.
    Type: Grant
    Filed: September 1, 1982
    Date of Patent: November 20, 1984
    Inventor: Robert W. Carver
  • Patent number: 4484151
    Abstract: An amplifier circuit for supplying output voltages which are much higher than the breakdown voltage of the individual components forming the amplifier comprises a control circuit (1) and an amplifier stage (2). The amplifier stage (2) comprises 2n transistors (7-12) where n is an integer greater than one, having their main current paths serially connected between two supply terminals (3, 4). The bases of the transistors (7-12) are connected to tapping points on a series chain of diodes (34-41) in the control circuit (1). Further supply sources (13-16) apply an incrementally decreasing sequence of voltages to transistors (8, 9) and (10, 11) so that the voltage across any of the transistors (7-12) is limited to one increment of the sequence of voltages.
    Type: Grant
    Filed: August 19, 1983
    Date of Patent: November 20, 1984
    Assignee: U.S. Philips Corporation
    Inventors: Aloysius J. Nijman, Franciscus A. C. M. Schoofs, Job F. P. van Mil
  • Patent number: 4482868
    Abstract: An output stage having a small quiescent current is provided. A current source portion provides an output current via an output terminal in proportion to a drive current. A current sink portion sinks output current in proportion to an input control voltage. A cross-over distortion portion and a shunt portion are coupled to the current source portion to minimize output quiescent current in proportion to the input control voltage.
    Type: Grant
    Filed: March 7, 1983
    Date of Patent: November 13, 1984
    Assignee: Motorola, Inc.
    Inventor: Roger A. Whatley
  • Patent number: 4471323
    Abstract: An electronic circuit provides short circuit protection and idle current control for a direct-coupled power amplifier.For short circuit protection, a voltage proportional to output current is monitored and is fed to a light emitting diode (LED). Light energy emitted from the LED as a function of output current is optically coupled to a phototransistor which steals drive current from the input transistor of the output amplifier hence turning off the output transistor.For automatic idling current control, the idle current of a complementary output transistor pair is sampled by operational amplifiers each having an inhibit gate connected from the output of a respective comparator. The comparator produces an inhibit output when the output transistor pair is providing load current to the load. When the pair is not providing load current, the amplifier amplifies the idling current from the pair and provides it to an LED.
    Type: Grant
    Filed: November 19, 1981
    Date of Patent: September 11, 1984
    Inventor: Ted R. Trilling
  • Patent number: 4422050
    Abstract: An single-ended push-pull amplifier comprises first and second complementary single-ended push-pull circuits connected in parallel across a power source. Each push-pull circuit has paired complementary transistors and an output connected together to drive a common load such as a loudspeaker. Inputs of the first and second push-pull circuits are connected with a bias circuit connected to receive an audio signal to be amplified. The first to fourth transistors are so controlled that the first and second transistors are operated Class A at small signal levels, and the first and fourth complementary transistor pair and the second and third complementary transistor pair are operated Class B at large signal levels, thus producing a low distortion factor and a high power efficiency.
    Type: Grant
    Filed: July 1, 1981
    Date of Patent: December 20, 1983
    Assignee: Nippon Gakki Seizo Kabushiki Kaisha
    Inventor: Kenji Suzuki
  • Patent number: 4401954
    Abstract: A power amplifier includes first and second push-pull amplifiers, each of which is supplied with a different DC supply voltage to each other. First and second switching transistors are provided to change-over a drive signal to said first and second push-pull amplifiers in accordance with the output voltage at either one of said push-pull amplifiers.
    Type: Grant
    Filed: August 13, 1981
    Date of Patent: August 30, 1983
    Assignee: Sony Corporation
    Inventor: Tadao Suzuki
  • Patent number: 4401951
    Abstract: A bias circuit for use in the single-ended push-pull circuit has NPN and PNP transistors whose emitters are connected to each other and whose collectors provide a bias voltage, diodes and resistance elements. On the operating side, the diode gives a reference voltage and the resistance element detects the voltage corresponding to the increase of the output voltage exceeding the reference voltage. Simultaneously, on the unoperating side, the diode decreases the voltage between its both terminals. Thus the bias voltage is made larger, by positive feedback operation on the operating side and by negative feedback operation on the unoperating side, enough to prevent output power transistor on the unoperating side from being cut off.
    Type: Grant
    Filed: September 29, 1980
    Date of Patent: August 30, 1983
    Assignee: Sansui Electric Co., Ltd.
    Inventor: Susumu Tanaka
  • Patent number: 4366448
    Abstract: A power-amplifying circuit embodying this invention includes a pre-amplifier stage which comprises two emitter-connected transitors, one of whose bases is supplied with an input signal and an output stage comprising complementary pair of a first transistor of a PNP type and an emitter-grounded second transistor of an NPN type which carry out a class-AB push-pull operation in accordance with the amplitude of a current from the pre-amplifier stage.
    Type: Grant
    Filed: March 26, 1980
    Date of Patent: December 28, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hiromi Kusakabe, Masahide Nagumo
  • Patent number: 4345215
    Abstract: An audio frequency power amplifier circuit comprising a voltage detector for detecting the voltage between the gates of output MOS FETs in Class B push-pull connection, and a bias generator for applying a quiescent bias voltage to the MOS FETs. The bias voltages applied to the MOS FETs are changed in proportion to the output current in such a manner that the output MOS FET to be cut off is impressed with a substantially equal bias voltage in the absence of signal. In this way, the cut off of the push-pull transistor of Class B operation is prevented, thus preventing a switching distortion.
    Type: Grant
    Filed: August 27, 1980
    Date of Patent: August 17, 1982
    Assignee: Hitachi, Ltd.
    Inventors: Nobutaka Amada, Shigeki Inoue
  • Patent number: 4342966
    Abstract: In a single-ended push-pull power amplifier circuit having a first transistor of a first driver stage, a second transistor of a first output stage where the first and second transistors are Darlington connected, a third transistor of a second driver stage and a fourth transistor of a second output stage, where the third and fourth transistors are also Darlington connected, first and second resistors are connected between the respective emitters of the first and second transistors and a common output terminal, third and fourth resistors are connected between the respective emitters of the third and fourth transistors and the common output terminal, and a bias circuit for providing a bias voltage of a fixed value between the bases of the first and third transistors, the improvement comprising at least two series circuits of resistors and constant voltage sources for passing the base currents of the second and fourth transistors between (a) the emitter of the first transistor and the emitter of the fourth transi
    Type: Grant
    Filed: August 4, 1980
    Date of Patent: August 3, 1982
    Assignee: Trio Kabushiki Kaisha
    Inventor: Eijiro Tamura
  • Patent number: 4336503
    Abstract: A driver circuit suitable for use in an operational amplifier, includes a bipolar pull-up transistor which sources current to an output terminal in proportion to an applied drive current, and an MOS pull-down transistor which sinks current from the output terminal in proportion to an applied control voltage. An MOS drive transistor provides a constant drive current for the pull-up transistor, and an MOS shunt transistor shunts the drive current away from the bipolar transistor in proportion to the control voltage. A cross-over compensation circuit develops a predetermined bias voltage on the base of the bipolar transistor relative to the voltage on the output terminal, to assure a minimum level of operation of the bipolar transistor when the output terminal is near the analog ground voltage.
    Type: Grant
    Filed: December 16, 1980
    Date of Patent: June 22, 1982
    Assignee: Motorola, Inc.
    Inventor: Roger A. Whatley
  • Patent number: 4336504
    Abstract: A push-pull output circuit which is capable of producing a relatively-high maximum output voltage without the use of a bootstrap capacitor provides positive and negative half cycle output circuits which are constructed as inverted Darlington output circuits to which current mirror circuits and level shifting elements are coupled. As a result, the distortion factor of an open loop characteristic in the push-pull output circuit is improved.
    Type: Grant
    Filed: April 21, 1980
    Date of Patent: June 22, 1982
    Assignees: Hitachi, Ltd., Hitachi Ome Electronic Co., Ltd.
    Inventors: Kunio Seki, Norihisa Katoh
  • Patent number: 4334197
    Abstract: A single-ended, push-pull, power amplifier circuit where switching distortion due to transistors and diodes is lessened.
    Type: Grant
    Filed: June 12, 1980
    Date of Patent: June 8, 1982
    Assignee: Trio Kabushiki Kaisha
    Inventor: Kazumasa Otao
  • Patent number: 4317081
    Abstract: A power amplifier has first and second, complementary power transistors with their emitter-collector paths connected in series between power supply terminals. An input signal applied to bases of these transistors operates them in a complementary manner. First and second current-voltage converters have their ends connected respectively to the respective bases of the first and second transistors. An additional two transistors have their respective bases connected to the other ends of the first and second current-voltage converters. A time constant required for the charge carrier stored in the first and second transistors to discharge is determined by the product of the base-collector capacitances of the first and second transistors multiplied by the dynamic resistances, upon conduction, of the collector-emitter path of the additional transistors.
    Type: Grant
    Filed: October 16, 1979
    Date of Patent: February 23, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Toshio Kobayashi
  • Patent number: 4316149
    Abstract: A power amplifier being controlled by a feedback signal which is related to a product of currents each flowing through power transistors in an SEPP configuration. Current detecting transistors are connected in parallel at their base-emitter paths to the base-emitter paths of the power transistors, respectively, and detect respective currents flowing through the power transistors. An operating circuit is coupled to the current detecting transistors, and generates a current related to the product of the detected currents.
    Type: Grant
    Filed: March 28, 1980
    Date of Patent: February 16, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hiroyasu Yamaguchi
  • Patent number: 4306199
    Abstract: A push-pull amplifier comprises first and second output circuits each comprising at least one transistor which circuits are mutually connected in push-pull configuration, first and second detection circuits for respectively detecting the differences between the input and output voltages of the first and second output circuits, and first and second variable bias circuits operating in response to the detection outputs of the first and second detection circuits, respectively, to apply constant bias voltages to the transistors of the first and second output circuits in the case where the absolute values of the output currents of the first and second output circuits are below a specific level and to apply, as bias voltages, voltages equal to the sums of the constant bias voltages and voltages corresponding to the detection outputs of the first and second detection circuits to the first and second output circuits in the case where the absolute values of the output currents are above a specific level.
    Type: Grant
    Filed: July 17, 1979
    Date of Patent: December 15, 1981
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Hikaru Kondou
  • Patent number: 4297644
    Abstract: A complementary field-effect transistor (FET) amplifier with means for controlling peak cross-over current. A substantially constant current is established in the drain-source conduction paths of a pair of reference transistors by degenerative feedback from the conduction paths to the respective gate electrodes thereof; wherein the reference transistors have similar characteristics to the respective amplifier transistors. The resulting sum of the gate-to-source voltages of the reference transistors is used to apply a bias voltage between the gate electrodes of the transistors in the FET amplifier so that the sum of the gate-to-source voltages of the amplifier transistors is equal to the sum of the respective gate-to-source voltages of the reference transistors during the cross-over current condition. Cross-over current is thereby limited to a predetermined value proportional to the substantially constant current established through the reference transistors.
    Type: Grant
    Filed: November 23, 1979
    Date of Patent: October 27, 1981
    Assignee: RCA Corporation
    Inventor: Adel A. A. Ahmed
  • Patent number: 4293875
    Abstract: The video amplifier circuit comprises a complementary symmetrical arrangement of a first and second solid state transistor element with the video input source coupled through a level shifting circuit to the first element and through a DC level shifting circuit to the second element and with means provided for operating each element in a clamped mode approaching saturation. Additional circuit modifications include means for modulating the video input signal with a high frequency signal to cause continuous gray scale variation.
    Type: Grant
    Filed: January 3, 1980
    Date of Patent: October 6, 1981
    Assignee: Telegram Communications Corp.
    Inventor: Bernard R. Katz
  • Patent number: 4274059
    Abstract: Two closed loops including a base bias controlling circuit are provided in a single ended push-pull amplifier. The base bias controlling circuit controls base bias voltages of respective transistors constituting the final stage of the push-pull operation so that a predetermined small amount of collector current flows via each of the collector-emitter paths of the transistors irrespective of the presence and absence of the input signal. Because of the predetermined collector currents, none of the transistors is held at cutoff in operation, thereby preventing the occurrence of the crossover distortion.
    Type: Grant
    Filed: November 27, 1978
    Date of Patent: June 16, 1981
    Assignee: Victor Company of Japan, Limited
    Inventor: Yasuhisa Okabe
  • Patent number: 4254379
    Abstract: A push-pull amplifier circuit comprises first and second output transistors whose emitters are commonly connected respectively through resistors to an output point, together with base biasing circuits connected between the bases of the first and second output transistors, to perform push-pull operation. The base biasing circuits comprise first and second current detecting elements for detecting the currents of the first and second output transistors, first and second variable bias generators controlled by the first and second current detecting element and reference bias generators. The operations of the first and second output transistors are effected in the active regions at all times.
    Type: Grant
    Filed: February 15, 1979
    Date of Patent: March 3, 1981
    Assignee: Pioneer Electronic Corporation
    Inventor: Yoshihiro Kawanabe
  • Patent number: 4218638
    Abstract: A vertical deflection amplifier includes a driver amplifier stage having a source of sawtooth deflection signals at the vertical rate and direct current feedback from the vertical deflection winding as inputs. The driver amplifier stage drives a pair of voltage translation stages each of which drives a transistor in a complementary-symmetry output stage. The voltage translation stages are independent of each other and are biased to operate as constant current sources with no signal present for controlling the quiescent current of the output stage. The improved vertical amplifier can thus be utilized to pass a horizontal rate signal combined with the vertical rate signal to effect image rotation when the deflection amplifier is used with an image pickup tube.
    Type: Grant
    Filed: October 30, 1978
    Date of Patent: August 19, 1980
    Assignee: RCA Corporation
    Inventor: David W. Breithaupt
  • Patent number: 4217556
    Abstract: An output amplifying circuit which comprises a Push Pull amplifier section, a power supply circuit section and an amplifier section for amplifying a power source. The circuit eliminates an occurrence of switching distortion and minimizes heat loss therein. The input terminals of the Push Pull amplifier section and the power source amplifier section are connected in common, while the positive and the negative terminals of the power source amplifier section are connected to those of the power supply circuit section, respectively.
    Type: Grant
    Filed: December 8, 1978
    Date of Patent: August 12, 1980
    Assignee: Pioneer Electronic Corporation
    Inventors: Hideo Ito, Yoshihiro Kawanabe
  • Patent number: 4215318
    Abstract: A push-pull amplifier having a pair of output transistors and a pair of emitter coupled resistors, one terminal of each resistor coupled to an emitter of a respective transistor and the other terminals being commonly connected to an output point. A comparison circuit is employed for comparing the voltages across each of the emitter resistors with a predetermined voltage. A bias circuit is connected in series between the bases of the output transistors and a short circuit controlled by the output of the comparison circuit selectively shorts a resistor element in the bias circuit.
    Type: Grant
    Filed: December 7, 1978
    Date of Patent: July 29, 1980
    Assignee: Pioneer Electronic Corporation
    Inventor: Yoshihiro Kawanabe
  • Patent number: 4189738
    Abstract: There is provided a semiconductor integrated circuit device having a Class B push-pull circuit including a first transistor of which the base is connected with a signal source and the collector to a positive power source, and a second transistor of which the collector is connected with the emitter of the first transistor, the base to the signal source, and the emitter to ground. The first transistor has a large area of safe operation compared with the second transistor.
    Type: Grant
    Filed: September 28, 1978
    Date of Patent: February 19, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Hajime Sawazaki
  • Patent number: 4176323
    Abstract: A transistorized power amplifier includes a differential pair coupled to a push-pull driver. The latter provides an amplified signal to an output stage through a compound driver, which comprises a pair of complementary transistors. The collector of the input transistor of the compound driver is connected to the base of the other transistor in the compound driver.
    Type: Grant
    Filed: June 21, 1978
    Date of Patent: November 27, 1979
    Assignee: Harman International Industries, Inc.
    Inventor: Robert Odell
  • Patent number: 4159450
    Abstract: A complementary or quasi-complementary Class B transistor amplifier stage, the halves of which have their output circuits serially connected between relatively negative and relatively positive operating supply voltages to receive direct current and are operated in push-pull with each other for signal to supply a common load from the interconnection of their output circuits, has driver circuitry including a pair of field effect transistors operated in push-pull to supply respective halves of the Class B transistor amplifier. A p-channel field effect transistor with source electrode connected to the relatively positive operating supply voltage drives one half of the Class B transistor amplifier stage from its drain electrode, and an n-channel field effect transistor with source electrode connected to the relatively negative operating supply voltage drives the other half of the Class B transistor amplifier stage.
    Type: Grant
    Filed: May 22, 1978
    Date of Patent: June 26, 1979
    Assignee: RCA Corporation
    Inventor: Merle V. Hoover
  • Patent number: 4146845
    Abstract: A PNP/NPN complementary pair of common emitter connected output transistors are driven by separate differential amplifiers having unity feedback and biasing to prevent simultaneous operation. Only a single battery supply is required.
    Type: Grant
    Filed: February 27, 1978
    Date of Patent: March 27, 1979
    Assignee: Motorola, Inc.
    Inventor: Richard E. Lunquist
  • Patent number: 4121168
    Abstract: A complementary transistor output circuit and method incorporates an optical coupler including a light emitting diode and a phototransistor connected between the base electrodes of a complementary pair of output transistors including a PNP transistor and an NPN transistor. The emitter of each of the output transistors is connected to an output of the output circuit. The base electrodes of the PNP output transistor and the NPN output transistor are connected, respectively, to first and second current source circuits. The collector electrode of the NPN output transistor is coupled by means of a first feedback circuit including a first resistor and a PNP transistor to the anode of a light emitting diode. The collector electrode of the PNP output transistor is coupled by means of a second feedback circuit to include a second resistor and an NPN transistor to the cathode of the light emitting diode.
    Type: Grant
    Filed: August 24, 1977
    Date of Patent: October 17, 1978
    Assignee: Burr-Brown Research Corporation
    Inventor: Robert M. Stitt