Abstract: An offset voltage calibration method is disclosed, which is utilized for calibrating an offset voltage of an electronic device during a calibration period. The offset voltage calibration method includes generating a control signal according to an output signal of the electronic device, counting a count value and generating an offset indication signal according to the control signal, stopping counting and generating a final count value according to a compensation value after the output signal changes state, generating a calibration signal according to the count value or the final count value, and calibrating the offset voltage according to the offset indication signal and the calibration signal.

Abstract: This document discusses, among other things, a system and method for receiving an input signal and power supply information, and amplifying the input signal by a gain value determined as a function of the power supply information.

Abstract: The invention discloses a bias balancing circuit. The bias balancing circuit is used for balancing an output voltage outputted by an amplifier module. The amplifier module has a variable gain. The bias balancing circuit comprises a comparator and a voltage selector. The comparator is used for comparing the output voltage and a reference voltage, to generate a comparison signal. The voltage selector is used for generating a selected voltage according to the comparison signal. When the variable gain is changed to result in an offset from the output voltage to the reference voltage, the bias balancing circuit is capable of balancing the output voltage toward the reference voltage by the selected voltage.

Abstract: A method and circuit are provided wherein the magnitude of an RF signal provided by RF circuit is used to derive a control set point of the RF circuit via an intermediate controller circuit. This controller circuit having the specific function of providing the actual voltage applied to the control point of the RF circuit, via the use of a charge pump, regulator or combination thereof. In this manner the controller limits the maximum applicable voltage set by the limiting characteristics of the charge pump, voltage regulator, or combination thereof. Such limiting characteristics allow the control of the RF circuit to be stabilized against a variety of external factors such as ambient temperature, battery voltage, circuit aging, amongst other factors in a manner exploiting a minimum of additional electronics thereby providing for such performance enhancements with minimum additional die footprint and power consumption.

Abstract: A method and system for providing automatic gain control for a differential amplifier are provided. An impedance network is set to have a first impedance that corresponds to a first gain for a differential amplifier, which amplifies an input signal by the first gain. Once the amplified input signal is greater than a first threshold voltage, the impedance network is set to have a second impedance that corresponds to a second gain for the differential amplifier, which amplifies the input signal. Once amplified input signal is greater than a second threshold voltage and a predetermined period has lapsed, the impedance network is reset to have the first impedance that corresponds to a first gain for the differential amplifier.

Abstract: An amplifier includes an amplifier section having selectable signal paths to provide discrete gain settings, and logic to incrementally select the signal paths. The logic may be configured to increment the gain in response to digital gain control signals or an analog gain control signal. Another amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.

Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.

Abstract: Methods and apparatus for controlling the audio characteristics of a networked voice communications device (NVCD) are presented. One method presented includes receiving a settings file, extracting at least one audio control parameter from the settings file, deriving audio processing parameters based upon a value selected from the at least one audio control parameter, and controlling the audio characteristics of the networked voice communications device using the audio processing parameters and the at least one audio control parameter. A method for providing audio parameters to an NVCD is also presented which includes establishing a settings file, which includes at least one audio control parameter, receiving a request to send the settings file, and sending the settings file over a network to the networked voice communications device.

Abstract: A calibration device for a power amplifier includes a calculation unit, a first storage unit and a multiplier. The calculation unit is utilized for generating a calibration factor according to a value of a characteristic parameter of the power amplifier. The first storage unit coupled to the calculation unit, for storing the calibration factor. The multiplier is coupled to the first storage unit and a baseband unit, for multiplying a baseband signal outputted from the baseband unit by the calibration factor for generating an input signal to the power amplifier.

Abstract: A hybrid power control system (102) that selectively applies voltage-based gain control and current-based gain control and method (300) of controlling a power amplifier (104) gain are presented. A voltage-based gain control signal (120) is applied to control the gain of the power amplifier when a level output power is indicated by a power contour signal (132). Whether the power amplifier is saturated is identified. A current-based gain control signal (122) is applied to control the gain of the power amplifier when the power amplifier is saturated and a decrease in output power is indicated by the power contour signal.

Abstract: A semiconductor device including: a gain control circuit; a first circuit which is controlled a gain to be constant by the gain control circuit; and a bias circuit connected to the first circuit, wherein the first circuit including a first transistor; and a load resistance, an amplification factor or an attenuation factor of the first circuit is proportionate to a product of a transconductance of the first transistor and a resistance value of the load resistance, and a voltage applied to the load resistance is set as an output of the semiconductor device, the bias circuit generates and outputs a differential current of a current that is proportionate to a drain current flowing into the first transistor and a current that is inversely proportionate to the load resistance value, and an output of the bias circuit is connected to an output node of the first circuit.

Abstract: Embodiments of the present invention provide systems and methods for automatic amplifier gain profile control, including a method for automatically configuring a variable gain profile amplifier according to received input and a variable gain profile amplification system. Further, embodiments of the present invention provide systems and methods for increased gain profile accuracy, including methods and systems to reduce the effects of temperature and/or process variations on the gain profile of an amplifier.

Abstract: A method for compensating a power amplifier based on operational-based changes begins by measuring one of a plurality of operational parameters of the power amplifier to produce a measured operational parameter. The method continues by comparing the measured operational parameter with a corresponding one of a plurality of desired operational parameter settings. The method continues by, when the comparing of the measured operational parameter with the corresponding one of a plurality of desired operational parameter settings is unfavorable, determining a difference between the measured operational parameter and the corresponding one of a plurality of desired operational parameter settings. The method continues by calibrating the one of the plurality of operational settings based on the difference.

Abstract: An integrated circuit receiver includes a first channel comprising an amplifier responsive to a first gain control value in a first mode to receive an input signal and generate a first amplified signal having a transition rate. Detection circuitry in the first channel detects transitions in the first amplified signal in accordance with a detected transition rate. The detected transition rate is based on the first gain control value. Gain control logic adjusts the first gain control value based on a desired detected transition rate. The gain control logic generates a second gain control value for use during a second mode. The second gain control value being based on the first gain control value.

Abstract: A charge pump power supply for a consumer device audio power stage has an efficiency selected according to signal level. The frequency of operation of the charge pump and/or the effective size of a switching transistor bank is adjusted based upon a volume (gain) setting, or a detected signal level, so that internal power consumption of the charge pump is reduced when high output current is not required from the audio power stage and consequently from the charge pump. Operating modes of the charge pump are selected by the signal level indication and include at least a high power and a high efficiency mode selected by setting the charge pump operating frequency and/or enabling or disabling switching of one or more of multiple parallel transistors used to implement each switching element of the charge pump, thereby setting the level of gate capacitance being charged/discharged by the gate driver circuit(s).

Abstract: A variable gain amplifier (VGA) disclosed herein includes: an input voltage connector; a number of voltage to current converter circuits generating signal currents; a gain adjustment connector adapted to a current steering mechanism; current mirrors connected to each of the voltage to current converters copying the signal currents; and a steering mechanism adapted to steer the copied currents to a load resistor or to another appropriate location based on the signal present at the gain adjustment connector.

Abstract: A controllable-gain circuit (TI, Rt, TS1, . . . , TS4) provides a first and a second pair of complementary gain-controlled signals (Ip1, Ip3; Ip2, Ip4) in response to an input signal (RFI). In each pair, one gain-controlled signal (Ip1, Ip2) is the input signal amplified with a gain G comprised in a range between a minimum gain Gmin and a maximum gain Gmax. The other gain-controlled signal (Ip3, Ip4) is the input signal amplified with complementary gain Gmax-G. A fixed-gain output circuit (Rfg, Nfg) makes a weighed sum (Ip1*Rfg+Ip3*Rfg) of one and the other gain-controlled signal in the first pair of complementary gain-controlled signals. The respective weighing factors for one and the other gain-controlled signal are substantially similar (Rfg). A controllable-gain output circuit (Rlg, Rhg, Nlg, Nhg) makes a weighed sum (Ip2*Rlg+Ip4*(Rlg+Rhg)) of one and the other gaincontrolled signal in the second pair of complementary gain-controlled signals.

Abstract: A variable gain amplification circuit comprises a signal generator that has an output terminal and is able to vary an output amplitude; a variable capacitor connected between the output terminal and an AC grounded terminal; and a control circuit for controlling the output amplitude of the signal generator, and a capacitance of the variable capacitor. Therefore, unnecessary signals can be attenuated even when the gain is low, and degradation in distortion characteristics in the latter block can be suppressed.

Abstract: A count control signal generating section for generating a count control signal on the basis of an output signal of a variable gain amplifier; an up/down counter for performing an up-count operation or a down-count operation on the basis of the count control signal; a gain control signal generating section for generating a gain control signal to be supplied to the variable gain amplifier on the basis of a count value of the up/down counter; and a state detector section for outputting a state detection signal indicating whether a state of a circuit operation is a steady state or another state are provided. When the state detection signal indicates that the state of the circuit operation is the steady state, the operation of at least one of the up/down counter and the gain control signal generating section is controlled so as to fix the gain control signal.

Abstract: Embodiments of the present general inventive concept include a low noise amplifier and method with an improved linearity while reducing a noise disadvantage (e.g., increase). One embodiment of a low noise amplifier can include a first transistor to receive an input signal at a control terminal thereof, a second transistor having a first terminal coupled to a second terminal of the first transistor, an envelope detector to output a control signal corresponding to a characteristic of the input signal and an envelope amplifier to amplify the control signal to be applied to a control terminal of the second transistor.

Abstract: An amplifier has an input section with one or more input cells and an output section with one or more output cells. Either the input section or the output section includes at least two cells that may be selected to provide discrete gain settings. A loop amplifier is configured in a feedback arrangement with the input section. The input and output sections may have multiple selectable cells to provide coarse and fine gain steps. The gain of the loop amplifier may be coordinated with the gain of the input section to provide constant bandwidth operation.

Abstract: A broad-band linear amplifier circuit includes a driver amplifier to produce a first amplified radio frequency (RF) signal in a first single RF band in response to a first input RF signal and to produce a second amplified RF signal in a second single RF band in response to a second input RF signal. The first single RF band and the second single RF band reside in a broad band that has a bandwidth more than two times a bandwidth of the first single RF band or the second single RF band. A sensing circuit can sense a power, a gain, or a phase of the first output RF signal and the second output RF signal, and to produce a sensing signal. A gain control circuit controls gain variation of the driver amplifier in response to the sensing signal.

Abstract: A method and apparatus is provided for detecting the output power of a power amplifier. The output power is detected by detecting the absolute values of the voltage and current at the output of the amplifier and mixing the detected voltage and current to generate a signal related to the output power.

Abstract: A programmable gain amplifier comprising alternatively selectable parallel circuits in a front end and independently selectable serial amplification circuits in a back end. The front end may include, for example, a plurality of transconductors in parallel and each configured to generate a current proportional to a received voltage. A ratio of the generated current to the received voltage being different for each of the transconductors. The back end is configured to receive an output of a selected member of the parallel circuits and may include a plurality of current or voltage mode amplifiers in series. For example, the back end may include a plurality of current-mode gain stages and switches configured to control which of the current-mode gain stages are used to amplify the output of the front end. The programmable gain amplifier may be used between a signal receiver and an analog to digital converter.

Abstract: A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a power of the amplified signal. A comparator module compares the detected power to a high threshold, a low threshold and a target threshold intermediate the high and low thresholds. A controller module changes the gain of the VGA so as to drive the detected power in a direction toward the middle threshold when the comparator module indicates the detected power is not between the high and low thresholds.

Abstract: An integrated circuit device includes a variable-gain amplifier, memory circuit and gain control update circuit. The variable-gain amplifier generates an amplified signal having an amplitude according to a gain control value that is stored, at least during a first interval, within the memory circuit. The update circuit generates an updated gain control value based on the amplified signal during the first interval, and outputs the updated gain control value to the memory circuit to be stored therein at a conclusion of the first interval.

Abstract: Various embodiments of the present invention provide systems and methods for reduced latency feedback in a data processing system. For example, some embodiments provide a data processing system that includes a variable gain amplifier, a processing circuit, a data detector, and an error signal calculation circuit. The variable gain amplifier amplifies a data input signal and provides an amplified signal. The processing circuit generates a signal output corresponding to the amplified signal, and includes a conditional multiplication circuit. The conditional multiplication circuit conditionally multiplies the signal output by a gain correction signal and provides the result as an interim output. The data detector applies a data detection algorithm to the signal output and provides an ideal output. The error signal calculation circuit generates a gain correction signal based at least in part on the interim output and a derivative of the ideal output.

Abstract: A system and method for increasing accuracy of transmitter power detection over a larger range of output power levels wherein a diode detector is followed by a series cascade of 2 op amps. The first op amp functions as a differential/buffer amplifier, which improves temperature performance. The second op amp has two selectable gain factors. The output of the second op amp is routed to the ADC. A single control line is connected to a controllable switching device that configures the second op amp for high gain or low gain.

Abstract: Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.

Abstract: The invention generally relates to stabilizing an MRI power delivery system. In one aspect, a stabilization module that is in electrical communication with the MRI power delivery system is provided. The stabilization module includes a closed loop control system. The closed loop control system is used to modify the at least one characteristic of the input signal. The modified input signal is provided to the MRI power delivery system.

Abstract: A circuit arrangement and method for power regulation and an amplifier arrangement for power regulation are described.

Abstract: A system for controlling amplifier power is provided. The system includes a voltage envelope detector that receives a voltage signal and generates a voltage envelope signal. A current envelope detector receives a current signal and generates a current envelope signal. A power amplifier level controller receives the greater of the voltage envelope signal and the current envelope signal, such as by connecting the output of the voltage envelope detector and the current envelope detector at a common point and conducting the high frequency current components to ground via a capacitor. A power amplifier level control signal is then generated based on the voltage drop across the capacitor.

Abstract: The present invention relates to a device and a method for regulating the output power of an amplifier stage, e.g. an amplifier stage in a mobile data transmission system.

Abstract: An electrical device and a loop control method are provided. A data signal is obtained from a front end. A variable gain amplifier amplifies the data signal based on a gain value. An analog to digital converter samples the amplified data signal output therefrom to generate a digital data signal. A peak bottom detector detects a peak level and a bottom level of the digital data signal. A threshold controller compares the peak and bottom levels with a threshold value, and generates a first control signal accordingly. An auto gain controller updates the gain value based on the peak and bottom levels with a first step size. The first step size is determined by the first control signal.

Abstract: A power amplifier circuit includes a first variable gain amplifier for amplifying an input signal, a second variable gain amplifier for amplifying an output signal of the first amplifier, and a control circuit for controlling the gain of the first variable gain amplifier based on the output signal of the first variable gain amplifier and the gain of the second variable gain amplifier.

Abstract: A method of reducing distortion in the output of an amplifier is provided. The method comprises subtractively combining an error signals with the appropriate phase shift with input signals to be amplified. The error signal being generated by subtractively combining a fed-forward portion of the input signal with a portion of the fed-back amplified output signal, and signal processing applied to it between its generation and application to correcting the input signal in the baseband domain. The error therefore being down-converted, filtered, and up-converted in the feedback path. The filtered baseband error signal components providing inputs to a controller which adjusts active elements of the amplification and feedback path in order to minimize the distortion within the output of the amplifier.

Abstract: A programmable gain amplifier comprising alternatively selectable parallel circuits in a front end and independently selectable serial amplification circuits in a back end. The front end may include, for example, a plurality of transconductors in parallel and each configured to generate a current proportional to a received voltage. A ratio of the generated current to the received voltage being different for each of the transconductors. The back end is configured to receive an output of a selected member of the parallel circuits and may include a plurality of current or voltage mode amplifiers in series. For example, the back end may include a plurality of current-mode gain stages and switches configured to control which of the current-mode gain stages are used to amplify the output of the front end. The programmable gain amplifier may be used between a signal receiver and an analog to digital converter.

Abstract: In some embodiments, a circuit includes a power amplifier including an input terminal configured to receive an input signal and an output terminal to provide an RF voltage, the output terminal coupled to a load, a current sensor configured to sense the current drawn by the power amplifier and provide a first sensor output signal dependent upon current consumption when the current exceeds a predetermined current threshold, a voltage sensor configured to sense the output power of the power amplifier and provide a second sensor output signal when the RF voltage during up ramp falls below a predetermined threshold voltage, and a summing circuit configured to receive the first and second sensor output signals and provide a feedback signal including a combination of a power dependent contribution and either of a voltage dependent contribution or a current dependent contribution.

Abstract: A method of reducing distortion in the output of an amplifier is provided. The method comprises subtractively combining an error signals with the appropriate phase shift with input signals to be amplified. The error signal being generated by subtractively combining a fed-forward portion of the input signal with a portion of the fed-back amplified output signal, and signal processing applied to it between its generation and application to correcting the input signal in the baseband domain. The error therefore being down-converted, filtered, and up-converted in the feedback path. The filtered baseband error signal components providing inputs to a controller which adjusts active elements of the amplification and feedback path in order to minimize the distortion within the output of the amplifier.

Abstract: An amplifier includes: a single-stage or multiple-stage variable gain amplifier that amplifies an input signal with a controlled gain; a AGC control circuit that detects the peak level of a signal outputted from the variable gain amplifier in the final stage, converts the resultant signal to a digital signal, and outputs an AGC control signal for controlling the gain of the variable gain amplifier based on the converted digital signal; an EVR control circuit that outputs an EVR control signal according to a signal of setting an attenuation value or an amplification value for EVR inputted from an electronic variable resistor control terminal; and a gain control circuit that controls the gain of the variable gain amplifier in accordance with at least one of the AGC control signal and the EVR control signal. The occurrence of “popping” sounds caused by differences in DC voltage due to switching between an AGC circuit and an electronic variable resistor circuit can be suppressed.

Abstract: A phase modulation section (101) generates a first modulated signal including phase information. An amplitude signal control section (103) generates a second modulated signal including amplitude information. A waveform shaping section (104), when an amplitude of the second modulated signal is larger than a regulated value generates a waveform-shaped modulated signal. An amplitude modulated voltage supply section (105) amplifies the waveform-shaped modulated signal based on the supply voltage from a voltage control section (106) and supplies the amplified signal to a power amplification section (102). The power amplification section (102) amplifies the first modulated signal based on the amplitude modulated voltage, and outputs the resultant signal.

Abstract: DC offsets in high-gain amplifiers should be corrected to avoid the signal distortion that would result from amplifier saturation. A predominantly digital technique is described in which a digital algorithm observes patterns in the sign of the amplifier output and drives a digital-to-analog converter (DAC), which reduces the amplifier's offset.

Abstract: An automatic gain control circuit for controlling the gain of a variable gain amplifier block includes a count control signal generating block, an up-down counter, a gain control signal generating block, and a downcount clock signal generating block. The up-down counter upcounts an upcount clock signal or downcounts a downcount clock signal according to a count control signal generated by the count control signal generating block. The gain control signal generating block generates a gain control signal corresponding to a count value of the up-down counter. The downcount clock signal generating block generates a downcount clock signal whose frequency corresponds to the count value of the up-down counter.

Abstract: This invention provides an electronic part for high frequency power amplification (RF power module) which will automatically perform the precharge level setting for proper output power at start of transmission without requiring the software process for precharging to run on the baseband IC, which can reduce the burden on users, namely, mobile phone manufacturers. Such electronic part configured to amplify RF transmit signals includes an output power control circuit which supplies an output power control voltage to a bias control circuit in a high frequency power amplifier circuit, based on an output power level directive signal. This electronic part is equipped with a precharge circuit which raises the output power control voltage to produce a predetermined level of output power, while detecting a current flowing through a final-stage power amplifying element, triggered by rise of a supply voltage at start of transmission.

Abstract: An integrated circuit device includes a variable-gain amplifier, memory circuit and gain control update circuit. The variable-gain amplifier generates an amplified signal having an amplitude according to a gain control value that is stored, at least during a first interval, within the memory circuit. The update circuit generates an updated gain control value based on the amplified signal during the first interval, and outputs the updated gain control value to the memory circuit to be stored therein at a conclusion of the first interval.

Abstract: A method, algorithm, circuits, and/or systems for automatic gain control (AGC) are disclosed. In one embodiment, an AGC circuit can include a comparator configured to compare an output of an amplifier against a reference voltage, gain logic configured to decrease a gain of the amplifier when an output of the comparator has a first state, and to periodically increase the gain of the amplifier, a digital-to-analog converter (DAC) configured to receive an output from the gain logic and control the gain of the amplifier, and lock detection logic configured to determine from the output of the gain logic when the gain of the amplifier is in a predetermined range.

Abstract: A circuit for preventing clipping in an Automatic Level Control (ALC) or Limiter, where the amplitude of the signal above the clipping point is estimated, then the signal level is automatically reduced over a defined period substantially equal to the feedforward delay in the ALC/Limiter. By adaptively controlling, based on the excess amplitude and the delay time available, an attack rate used in the ALC/Limiter to reduce the gain applied to an input signal, it can be ensured that the output amplitude is brought within the clipping level sufficiently quickly to prevent audible clipping.

Abstract: The amplifier comprises an inverting negative feedback amplifier circuit using an operational amplifier, a comparator for comparing the potential of the negative phase input terminal of the operational amplifier with the reference potential Vref of the comparator, and a low-pass filter. The imaginary short state of the operational amplifier is lost when clipping occurs on the output signal. It is thus possible to detect clipping by monitoring the potential of the negative phase input terminal.

Abstract: A variable-gain wide-dynamic-range amplifier including an amplifier module, a control unit, and an output current regulating circuit is provided. The amplifier module amplifies an input signal. The amplifier module includes several amplifier units coupled to each other in parallel. The gains of the amplifier units are different. The control unit enables at least one of the amplifier units according to a gain control signal. The at least one of the amplifier units which is enabled is for outputting a current signal in response to the input signal. The output regulating circuit is for receiving the current signal and outputting an output signal accordingly by regulating the magnitude of the current signal under the control of the control unit. Each of the amplifier units is coupled to the output current regulating circuit in series. The control unit is for controlling the output current regulating circuit according to the gain control signal.

Abstract: An electronic signal level detection system and method are provided. The method receives an analog input signal having a variable voltage and compares the input signal voltage to a threshold. A detection signal is generated for input signal voltages exceeding the threshold in a periodic first time frame. In a second periodic time frame (following the first time frame), a count is updated in response to the generated detection signals. The count is used to create a metric representative of the difference between the input signal voltage and the threshold. The count is incremented in response to the generating a detection signal (“1”) in the first time frame, and decremented in response to not generating a detection signal (“0”) in the first time frame.