Abstract: A level conversion circuit having a plurality of switching elements connected in series or in parallel to a part thereof and having inputted a plurality of complementary signals to the plurality of switching elements connected in series or in parallel, and a high speed and high driving power switching circuit having a bipolar transistor which is directly driven by an output of such level conversion circuit and which provides level conversion and logic functions.

Abstract: A current mirror compensation circuit is disclosed herein which automatically adjusts the operating conditions of a current mirror so as to compensate for the voltage dependent current characteristics of a current load which a current mirror output is intended to match. In one embodiment, this compensation circuit compares a voltage level at the output of a current source with a voltage level at a corresponding node in the current programming portion of a current mirror. If a difference in these voltages is detected, the compensation circuit adjusts the current flow through the current programming portion of the current mirror to be equal to the output current through the current source. Therefore, since the current mirror output portion mirrors the current through the programming position, the currents through the output portion will match the current through the current source.

Abstract: An amplifier circuit for use as a unity gain buffer or an input stage in a current-mode feedback amplifier. As a unity gain buffer, the circuit has very low output impedance and wide dynamic range while having low offset. As an input stage, the circuit has a very low impedance inverting input and a high impedance non-inverting input with wide dynamic range and low offset. The circuit has two mirror image halves, each half having four transistors of the same polarity type and a current mirror. Each half is biased by a current source, the sources having nearly identical current.

Abstract: A circuit for the compensation of a control current of a first transistor whose main current path is arranged in series with a main current path of a second transistor between two supply voltage terminals. The arrangement includes a current mirror circuit including two transistors having a common terminal connected to the one supply voltage terminal which is coupled to the second transistor. The input terminal of the current mirror is connected to a control terminal of the second transistor and its output terminal is arranged to supply a compensation current to a control terminal of the first transistor.

Abstract: A current source which provides a given ratio (G) of an output current (I) to an input current (i). The current source includes a first series combination of a first resistor (R.sub.1) connected in series with the main current path of a first transistor (T.sub.1) and a second series combination of a second resistor (R.sub.3) connected in series with the main current path of a second transistor (T.sub.2). The first and second transistors (T.sub.1, T.sub.2) form a current mirror circuit. A current equalizer is coupled to the current mirror circuit in such a way as to produce in the first series combination an equalizing voltage drop equal to ##EQU1## i.sub.s1 and i.sub.s2 denoting the characteristic current constants of the first and second transistors (T.sub.1, T.sub.2).

Abstract: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.

Abstract: A voltage-current conversion circuit comprises a transistor (Q1) on the input side whose emitter is employed as the input terminal (IN), and a transistor (Q2) on the output side whose base is connected to the base of the transistor (Q1), and the collector current and the emitter current of the transistor (Q1) on the input side are made equal to the collector current of the transistor (Q2) on the output side with the aid of current mirrors circuits (1 and 2). Hence, the transistors on the input and output sides are equal in base-emitter voltage to each other, and the non-linear distortion is therefore eliminated. In addition, the inflow or outflow of current from the input voltage source is zeroed, so that a high input impedance is obtained.

Abstract: An adaptable current mirror includes first and second MOS transistors. The first MOS transistor has its gate connected to its drain. A MOS capacitor structure is connected in series between the gate of the first MOS transistor and the gate of the second MOS transistor. Electrons may be placed onto and removed in an analog manner from a floating node associated with the second MOS transistor, usually the gate of the transistor, by application of first and second electrical control signals. A first electrical control signal controls the injection of electrons onto the floating node from an electron injection structure and the second electrical control signal controls the removal of electrons from the floating node by an electron removal structure. A plurality of adaptable current mirrors communicating with a plurality of current-carrying lines may be employed for indicating the output of the one of the plurality of current-carrying lines through which the most current is flowing.

Abstract: In an integrated circuit a PNP current mirror can lose its current reflection accuracy when low Beta transistors are involved. Since the conventional PNP transistors can often have low Beta this can become a serious problem particularly with high current gain plural output current mirrors. In the invention a compensation current is fed to the current mirror to increase the PNP transistor base currents as an inverse function of Beta. Several alternative circuit embodiments are also disclosed.

Abstract: A semiconductor integrated circuit (1) is provided therein with a current mirror circuit comprising a first transistor (Q4) through which a reference current flows from a current source (15) connected with one electrode of the first transistor (Q1) and a second transistor (Q5) which supplies a current responsive to the ratio of first and second external resistors (20, 21) connected with other electrodes of the first and second transistors (Q4, Q5) on the basis of the reference current. The current from the second transistor (Q5) flows through an internal resistor (16) connected with one electrode of the second transistor (Q5), so that a threshold voltage is generated across the internal resistor (16). The threshold voltage can be arbitrarily set in accordance with the ratio of the first and second external resistors (20, 21).

Abstract: A new level shifting circuit is presented which does not restrict the upper limit of the common-mode input range of an operational amplifier. This is important particularly in operational amplifiers designated to operate with low power supply voltages. Significant parameters. of the operational amplifier, such as the gain and the slew rate, can be controlled without adversely affecting the common-mode input voltage range. The level shifting stage operates nondifferentially to avoid stability problems found in differential stages. A further improvement is accomplished using current balancing to achieve gain enhancement.

Abstract: A current mirror having improved turn-on and turn-off characteristics capable of operation an expanded voltage range. A cascode circuit comprising a portion of the current mirror is of a high characteristic impedance to increase thereby the voltages over which the current mirror may generate a constant current output. A switching circuit comprised of tandemly-positioned transistors having differing transistor characteristics decreases the transistor turn-on and turn-off times to enhance the characteristics of the current mirror.

Abstract: A transconductance amplifier intended for high frequency, precision amplification. The amplifier has a unique architecture that sets gain by the ratio of two impedances. Unlike conventional amplifiers, the amplifier does not use external feedback. This makes the amplifier unusually stable since one needn't worry about phase shift due either to the amplifier or a feedback network. Consequently, the amplifier can be used in some rather unusual circuit applications, some of which would be impossible with conventional (feedback) amplifiers. Various embodiments are disclosed.

Abstract: A current amplifier arrangement in which a current-current converter (30) has an input connected to the input (33) of the current amplifier arrangement and a power supply input (34, 35) to which a current source (51-54) is connected a current mirror circuit (31, 32, 42, 44)has an input connected to the output (36-39) current converter and an output (46-49) connected to the output (50) of the current amplifier arrangement. The current converter includes a first output transistor (T1, T3) whose main current path is arranged between the input (33) and the output (37, 39) of the converter and whose base is connected to the power supply input (34, 36), and a diode-connected driver transistor (T2, T4) connected between the base of the first output transistor (T1, T3) and a node (K) which provides a reference potential during operation. The main current path of a second output transistor (T5, T6) is connected to the output of the arrangement and the base of this transistor is connected to said node.

Abstract: A constant current power supply circuit for an integrated circuit memory which is well suited for driving a high capacitance load, such as a large number of sense amplifiers. A first circuit provides a constant current source and a second "current mirror" circuit provides an output current proportionate to the first circuit, but at a higher desired level of current. The constant current circuit is achieved using two cross-coupled FET transistors and two resistances such that the conductivity of each transistor is inversely related to the conductivity of the other. The circuit reaches a constant current equilibrium which is largely independent of operating voltage or load, but rather depends on the relative values of the components.

Abstract: A low voltage precision current generator includes an amplifier, a first transistor, a current portion, and an output portion. The amplifier has first and second input terminals and changes an output voltage until voltages at the first and second input terminals are equal. An input voltage which may be a stable reference voltage or a variable voltage is received at the first input terminal. The second input terminal is connected to the current portion in order to provide a reference current proportional to a voltage difference between the voltage at the second input terminal and a power supply voltage. The amplifier controls the conductivity of the first transistor in order to regulate the voltage at its second input terminal. A precision current precision current proportional to the reference current is then provided.

Abstract: A buffer circuit includes an operational amplifier circuit, a first emitter follower circuit whose base is driven by an output of the operational amplifier circuit and whose output is fed back to an inverting input terminal of the operational amplifier circuit, and a second emitter follower circuit whose base is also driven by the output of the operational amplifier circuit and whose output drives a load circuit. In another form, the buffer circuit also includes a current control circuit that detects operation current flowing through the second emitter follower circuit, thereby controlling the operation current flowing through the first emitter follower circuit.

Abstract: An MOS current mirror includes a floating node onto which and from which electrons may be transported by control signals and electrical semiconductor structures in order to adapt the current mirror to supply a desired output current when a particular input calibration current is present.

Abstract: An electronic current compensation circuit which includes a series connections of a load (L) and a first control current source (3) and also includes a current follower (7). A second control current source (6) identical to the first control current source is connected to the input (8) and the first output (9) of the current follower. A second output of the current follower is connected to the junction (4) of the load and the first control current source to compensate for the load current (i.sub.L).

Abstract: A matrix circuit includes a first resistor having one end connected to receive a current signal and another end connected to a first output node, a second resistor having one end connected to the one end of said first resistor, a first bipolar transistor having a first collector connected to the another end of said second resistor, a first emitter connected to a circuit ground and a first base connected to said first collector, and a second bipolar transistor having a second collector connected to a second output node, a second emitter connected to said circuit ground and a second base connected to said first base.

Abstract: A balanced cascode current mirror includes first and second current paths respectively defined by first and second transistors and by third and fourth transistors. Each current path may include the sources and drains of the transistors in such path. Connections may respectively extend between the gates of the first and third transistors and between the gates of the second and fourth transistors to provide the first and third transistors with substantially identical source, gate, and drain impedances. An input current is introduced to the drain of the second transistor and an output current with substantially identical characteristics is obtained from the drain of the fourth transistor. A capacitance may be connected between the drain of the second transistor and the gate of the first transistor to produce a flow of current at high frequencies through the first current path corresponding to the input current at the drain of the second transistor.

Abstract: A current mirror curcuit has an actively controllable feedback element in the form of a p-channel field effect transistor (28). The p-channel transistor 28 has its gate connected to the output of a differential amplifier (12). The opamp 12 is connected to form a feedback loop within the current mirror circuit. The negative input (14) of the opamp (12) is connected to receive at node (16) the drain voltage V1 of the first transistor (24). The positive input (18) of the opamp (12) is connected to receive at node (20) the drain voltage (V2) of the second transistor (26). The purpose of the opamp 12 is to tend to equalize the drain voltages V1 and V2 of the first and second transistors 24, 26. If the drain voltage V2 of the second transistor 26 increases relative to the drain voltage V1 of the first transistor 24 the output signal Vo of the opamp 12 will be such as to reduce Vgs of the transistor 28 and hence Ids thereby to reduce the drain voltage V2 of the second transistor 26.

Abstract: An emitter-follower circuit suitable for use in an emitter-coupled logic circuit includes an emitter-follower NPN transistor having a first emitter and a second emitter, a biasing circuit having a diode and a first resistor, a load capacitance discharging state detection circuit having a PNP transistor and a second resistor, and a second NPN transistor adapted to be connected with a load. The second resistor detects a current passing through the PNP transistor and the second NPN transistor is activated by the voltage value detected by the second resistor to form a path discharging charge due to a load capacitance. Even when the current amplification h.sub.FE of the discharging PNP transistor is low, the second NPN transistor which has a high h.sub.FE forms the main discharge current path, so that electric charge on the load capacitance can discharge rapidly. As a result, a high-speed switching emitter-follower circuit is provided.

Abstract: A current-mirror circuit includes a pair of NMOS transistors. The first NMOS transistor has a gate electrode, a drain electrode serving as a current input terminal of the current-mirror circuit and a source electrode connected to a preselected potential. The second NMOS transistor has a gate electrode connected to the gate electrode of the first NMOS transistor, a drain electrode serving as a current output terminal of the current-mirror circuit and a source electrode connected to the preselected potential. The current-mirror circuit is provided with a buffer circuit. The buffer circuit includes a bipolar transistor which is opposite in polarity to the paired NMOS transistors, i.e., a PNP bipolar transistor. This transistor is associated with a constant current source.

Abstract: An integrated circuit amplifier having a random input offset voltage is adaptable such that then input offset voltage may be cancelled out. An inverting input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage. The ultraviolet window and capacitor electrodes are arranged such that the ultraviolet light may strike only the desired areas of the structure.

Abstract: An adjustable temperature dependent current generator includes a transconductance current multiplier, a current mirror, two temperature dependent current generating circuits and a current source to generate currents capable of having an adjustable linear relation to temperature.

Abstract: In a MOS transistor circuit (comprising a pair of current mirror circuits, each comprising: first and second MOS transistors having their gate electrodes connected together third and fourth MOS transistors respectively connected in series with the first and second transistors, the third and the fourth MOS transistors of the pair of current mirror circuits receiving a pair of complementary signals at their gate electrodes; and the nodes between the second and the fourth MOS transistors forming output nodes of the current mirror circuits), a pair of capacitors each coupling the output of one current mirror circuit to the gate electrodes of the first and the second MOS transistors of the other current mirror circuit. This provides positive feedback. The change in the outputs responsive to change in the inputs is thereby accelerated.

Abstract: The invention relates to a current mirror circuit (28) comprising: an input node (29); a first simple current mirror (30) of a first type, such as pnp bipolar technology, having an input coupled to said input node (29) and an output; a second simple current mirror (32) of a second semiconductor type, such as npn bipolar technology, having an input coupled to said output of said first simple current mirror and an output; a third simple current mirror (34) of said first semiconductor type having an input coupled to said output of said second simple current mirror and an output coupled to said input node (29); and an output node (31) coupled to said second simple current mirror (32) so as to receive the sum of the input and output currents of said second simple current mirror flowing in a common terminal thereof.

Abstract: A dectector circuit responsive to a current suppled to an input thereof provides an output signal when the magnitude of the current exceeds a predetermined threshold level includes a multi-collector transistor having a first one of its collectors connected to the base thereof and an emitter coupled to the input. A diode formed by a diode-connected transistor is coupled to the first collector of the multi-collector transistor. A second transistor is provided having its collector coupled to the second collector of the multi-collector transistor, a base coupled to the first collector and an emitter which is coupled to a pair of series connected resistors. The second transistor is operated at a lower current density than the diode-connected transistor such that the former operates in a saturated condition until such time that the input current exceeds the threshold level to produce the output signal.

Abstract: A second generation current conveyor circuit for accepting a current at an input (100) at a low impedance and for providing an output current of the same or a related value at an output (101) at a high impedance. The circuit includes a first transistor (T101) connected in series with second diode connected transistor (T102) between the input and a first voltage supply line. A third transistor (T103) is connected in series with a fourth diode connected transistor (T104) between the first voltage supply line and an input terminal (102) for the application of a reference potential. A fifth transistor (T105) has a control electrode connected to the control electrodes of the second and third transistors and is connected between the first supply voltage line and the output. The control electrodes of the first and fourth transistors are connected in common. A cancelling current is internally generated for cancelling the current through the fourth transistor so that no current is drawn through the input terminal.

Abstract: In order to boost the output power of a first amplifier (A1) a second amplifier (A2) can increase the supply voltage difference across the first amplifier (A1). However, variations of the supply voltage difference result in comparatively high distortion. In order to minimize this distortion while maintaining the output power, a signal-follower circuit generates a direct voltage lever which tracks a first output signal of the first amplifier, for which purpose the signal-follower circuit is driven by a third amplifier, which compares the first output signal with a reference signal.

Abstract: An integrated power transistor with reduced sensitivity to thermal stresses and improved resistance to direct secondary breakdown, comprising a plurality of transistors having their emitter regions connected so as to define a common emitter terminal, their collector regions connected so as to define a common collector region, and the same plurality of diodes connected to the respective transistors to form therewith a current mirror circuit, each base of the transistors being connected to the first terminal of a corresponding resistor, the second terminal of the corresponding resistors being connected to a common base.

Abstract: A current mirror type level converter which makes it unnecessary to prepare the complementary signals of input signals by connecting a load transistor which is in the normally energized state regardless of the states of the input signals to the side where a mirror current flows and the load transistor also determines the output level. Further, a mirror input current is caused to flow by the result of a logic operation of the input signals, a mirror current supplying transistor is shared among a plurality of current mirror type level converters, an output signal is fed back positively accompanying a delay, and a feedback transistor to whose control terminal is applied the positive feedback signal is connected in parallel with the load transistor in order to realize an increase in the speed of the operation of the converter.

Abstract: A current amplifier has an input terminal (1) for an input current (Iin) to be amplified in order to obtain a first output current (Iout1) at a first output terminal (2) via a first transistor (T1) and a second output current (Iout2) at a second output terminal (8) via a current mirror (6). A diode-connected transistor (T5) is coupled between the emitter of the first transistor and the input terminal of the current amplifier so as to improve the current branching at the input terminal, thereby extending the bandwidth and the output swing of the current amplifier.

Abstract: A semiconductor logic circuit includes a bipolar totem pole buffer. The buffer is made up of a first npn bipolar transistor whose collector-emitter path is connected between a first power source node and an output node, and a second npn bipolar transistor whose collector-emitter path is connected between the output node and a second power source node. A third npn bipolar transistor is connected at the collector and the base to the base of the second npn bipolar transistor, and at the emitter to the second power source node. An output transistor drive circuit includes a MOS transistor. The drain-source path of the MOS transistor is connected between a third power source node, which is placed at one of potentials equal to and lower than the potential of the first power source node, and the base of the second npn bipolar transistor. The gate of the MOS transistor is connected to a signal input node.

Abstract: A status holding circuit includes a transistor having an emitter coupled to a negative power source, a collector and a base coupled to said collector and having a negative conductance range, first and second input terminals to which first and second input signals are applied, a first resistor provided between said first input terminal and the collector of said transistor, a second resistor provided between said second input terminal and the collector of said transistor, and an amplifier provided between a positive power source and said negative power source, for amplifying an output of said transistor drawn from said base thereof to thereby generate an amplified output signal.

Abstract: A motor controlling circuit used for controlling the drive of a motor, and particularly to improvements of the control characteristics of the amplifier. A current setting transistor for setting an amount of current flowing from a differential amplifier to a predetermined value is disposed on the downstream side of the differential amplifier. The amount of current flowing across this current setting transistor is varied in response to the level of an input signal to the amplifier, so that the current outputting capability of the differential amplifier is proportional to the level of the input signal. Accordingly, when the level of the input signal is small, the gain of the amplifier is made small, and a gain for an amount of ripple at that time is also made small. Hence, it is possible to control an adverse effect of the ripple carried on the input signal when the level of the input signal is small.

Abstract: A full wave rectifier/averaging circuit for processing an input signal having a large dynamic range. A rectification circuit is responsive to the input signal for providing a first signal to a current mirror whereby the current mirror provides a second signal in response to the first signal. An averaging circuit is coupled to the current mirror to perform averaging of the second signal. An output circuit is coupled to the averaging circuit to provide an output signal at an output terminal.

Abstract: A push-pull driver circuit is disclosed comprising two stages. The first stage includes a current switch producing a dual phase output. The second stage includes a first emitter follower for output pull-up and a second emitter follower and a current mirror for output pull-down. The inputs of the first and second emitter followers are connected to respective output phases of the first stage. The outputs of the emitter followers are connected to respective terminals of the current mirror. The output of the second emitter follower also is connected to the output line being driven. A fixed biasing source maintains the current mirror transistors in conductive states at all times. Schottky diodes are connected to the current mirror transistors to prevent saturation.

Abstract: A digital-to-analog converter for use in a timing control loop. The converter includes a plurality of cells, each activated in response to a timing loop control signal. The converter also includes a resistive current mirror, with a first resistance R1, providing a reference curent which is mirrored in each cell by a current source FET. Each cell is constructed to switch the current from its current source FET through an output FET when a respective control bit provided to the cell is positive. Otherwise, the current is diverted through a sink FET. All of the cell output FETs are tied to a single resistance R2 which collects the currents of the active cells and provides the AC output of the converter. The converter's output is related only to the ratio R2/R1, thereby decoupling process, temperature, and voltage effects from the output of the converter.

Abstract: A wideband amplifier is configured to allow sophisticated low voltage signal processing in a low-cost, high frequency integrated circuit driver. The integrated circuit driver provides output currents to drive high voltage discrete power transistors in such a way as to achieve maximum frequency response from the low-cost discrete transistors. The discrete power transistors in turn provide an output voltage suitable for driving, for example, a CRT display. The transconductance amplifiers, video processing circuitry, current multipliers, and summers are formed in an integrated circuit device utilizing readily available processing and circuit design techniques, and a relatively small number of discrete low power components, including pull-up and pull-down transistors which are chosen to have a fairly high frequency of unity current gain (F.sub.t), yet which are readily available at a very low cost.

Abstract: Circuitry for reducing harmonic distortion in an amplifier includes a first transistor having a first non-linear collector-to-substrate capacitance, a first load device coupled to a collector of the first transistor, a first current source coupled to an emitter of the first transistor, a first conductor conducting an input voltage coupled to a base of the first transistor, and a second conductor coupled to the first load device and conducting an output voltage of the amplifier. The first transistor produces a first non-linear current in the first non-linear collector-to-substrate capacitance in response to the input voltage. A second transistor has a second non-linear collector-to-substrate capacitance. A second current source is coupled to an emitter of the second transistor. The first conductor is coupled to apply the input voltage to a base of the second transistor.

Abstract: A circuit supplies a current (I) in which the current variations (I.sub.L) having been equalized according to a given relationship. In order to obtain an equalization characteristic having at least two slopes, the circuit uses the switching of the current sources (xI.sub.o, yI.sub.o and zI.sub.o) by means of switching stages (T.sub.1, T.sub.2, T.sub.14). The output current I passing through the current output stages T.sub.3 and T.sub.4 thus fluctuates between two levels according to the desired equalizing relationship.

Abstract: A circuit for enhancing the alpha of a transistor. A current supplying circuit passes the base current of the transistor through a first and second current mirror for providing current at the emitter of the transistor such that the apparent emitter current of the transistor is made substantially equal to the collector current of the transistor.

Abstract: An amplifier circuit (10) is provided which comprises a first transistor (12) and a second transistor (14). A current buffer circuit (16) is coupled to the basis of the transistors (12, 14) to provide base drive current. A voltage proportional to absolute temperature, V.sub.PTAT, is applied between the emitters of the transistors (12,14). An input current is received by the transistor (12) and an output current is generated by the transistor (14). The output current I.sub.out is amplified with respect to the input current I.sub.in by a gain factor which is substantially independent of temperature considerations. Circuitry is provided for altering the value of the voltage proportional to the absolute temperature, V.sub.PTAT, such that the gain of the amplifier circuit (10) is programmable.

Abstract: In the class of electronic circuits known as current conveyors, limitations in the areas of frequency bandwidth, transient response, output impedance, distortion, accuracy, and suitability for integration are overcome by means of a current conveyor comprising a Wilson current mirror of one polarity type cross-coupled with a second Wilson current mirror of the opposite polarity type. The first Wilson current mirror is connected to an input port and a reference port. The second Wilson current mirror is supplied with current by a current-splitting circuit which also supplies an output port with a currrent that is proportional to, preferably half, the current supplied to the second current mirror. An emitter de-generation compensation scheme may optimize the transient response and stability of the mirrors. The current splitter may also comprise current mirrors. A voltage-to-current converter may be realised by connecting suitable resistors in series with the input and reference ports, respectively.

Abstract: A cascoded current mirror device is disclosed that is capable of producing an output current that is a direct function of an input current received by that device. The cascoded current mirror includes at least two portions connected together in a cascode manner. Provision is also made for feedback connection between those portions. This feedback connection can, for example, be a buffering connection. Voltage signals are generated by this device that can be used to drive and control additional output stages. Each such additional output stage is capable of producing an additional output current.

Abstract: A current amplifier has an input terminal (1) for receiving an input current and an output terminal (2) for supplying an output current. A first transistor (T.sub.1) has a base-emitter junction coupled to the input terminal and a second transistor (T.sub.2) has a collector coupled to the output terminal and an emitter arranged in series with a voltage source (4). The series arrangement of the voltage source and the base-emitter junction of the second transistor is arranged in parallel with the base-emitter junction of the first transistor. The first transistor is of the NPN conductivity type and the second transistor is of the PNP conductivity type. The low internal series resistance of the NPN transistor T.sub.1 develops a relatively small voltage drop so that the attenuated output current (I.sub.out) is a linear function of the input current over a wide range of input currents.

Abstract: An integrated circuit comprising a current generator which is switchable to at least two modes. A first stage comprises a current mirror (T.sub.3, T.sub.4) having two branches. A differential pair second stage (T.sub.1, T.sub.2) is either in a balanced state (current output zero) or in an unbalanced state (current source R.sub.10, T.sub.10 supplying a current I.sub.1). In the balanced state a second current source (R.sub.20, T.sub.20) supplies a current which maintains the currents in the two branches of the current mirror constant.

Abstract: Integrated semiconductor circuit, including a control loop including a first current source acting as an actual value transmitter for the control loop, and a final control element acting on the first current source as a control, the first current source being in the form of a current mirror having a plurality of transistors each forming an output part driving a respective load element, and a second constant current source being independent of the first current source and acting as a desired value transmitter for the control loop.