Abstract: A low-noise amplifier circuit (40) and a method for generating a bias voltage within the amplifier circuit (40). The amplifier circuit includes a cascode configured circuit (15) having a common emitter transistor (12) biased by a current sourcing circuit (43) and a common base transistor (13) biased by a bias voltage generator (21). The current sourcing circuit (43) measures a base current of the common emitter transistor (12) and transmits the base current to a current mirror (41). Further, a current source (50) transmits a bias current to the current mirror (41). The current mirror sums the currents from the current sourcing circuit (43) and the current mirror (41) and generates a mirror output current. A portion of the mirror output current drives the bias voltage generator (21) and a portion of the mirror output current serves as the base current of the common base transistor (13).

Abstract: In an amplifier, a first transistor of npn type has its base connected to an input terminal, a second transistor of pnp type has its base connected to the base of the first transistor, and a third transistor of pnp type has its base connected to the base of the first transistor. A current mirror circuit doubles the collector current of the second transistor so that the doubled current is used as the emitter current of the third transistor. The base currents of the first and second transistors are supplied by the base current of the third transistor.

Abstract: A stage for the amplification of high frequency signals (HF) or intermediate frequency (IF) signals comprises a referenced non-differential input. The input of the amplifier is made on the emitter of an input transistor mounted in a common-base connection, converting the input voltage variations into current variations with a non-linear transfer curve that is, in principle, exponential or quadratic, these current variations being themselves copied, with a change in sign, into a second transistor and then converted by a third transistor into voltage variations with a non-linear transfer curve that is reciprocal to the previous one, this curve being in principle a logarithmic or square-root curve, and the voltage at the terminals of the third transistor being used as a feedback applied to the base of the first transistor. Application to the making of HF or IF input amplifier stages having a low noise factor and a wide dynamic range.

Abstract: The voltage swing on an output conductor of a high speed, high dynamic range regulated cascode current mirror is increased by providing a first transistor (M1) of a first conductivity type having a source electrode coupled to a first reference voltage conductor (GND), a gate electrode coupled to a first bias voltage circuit (M5,I1), and a drain coupled to a first conductor (4), a second transistor (M2) of the first conductivity type having a source electrode coupled to the first conductor (4), a gate electrode coupled to a second conductor (3), and a drain electrode coupled to the output conductor (2), and a third transistor (M3) of the first conductivity type having a source electrode coupled to the first reference voltage conductor (GND) and a drain coupled to the second conductor (3). A load circuit (I.sub.2) is coupled between a second reference voltage conductor (V.sub.DD) and the second conductor (3), wherein the third transistor (M3) and the load circuit (I.sub.

Abstract: A current generator circuit with controllable frequency response has at least one current mirror formed of MOS transistors, being powered through a terminal held at a constant voltage, having an input leg through which a reference current (I1) is driven by a first current generator (G1), and having an output leg for generating, on an output terminal (OUT) of the mirror, a mirrored current (I.sub.out) which is proportional to the reference current (I1). The input leg includes at least a first transistor (M1) which is diode-connected and has a control terminal (Ga1) coupled to a corresponding terminal (Ga2) of a second transistor (M2) included in the output leg by an impedance matching circuit configured to hold the same voltage value at both terminals (Ga1 and Ga2). The impedance matching circuit has an adjustable output impedance, specifically lower in value than the value to be had without this circuit. It functions to regulate the impedance on the control node (Ga2) of the second transistor (M2).

Abstract: A low voltage CMOS multiplier uses a transconductance stage to generate a dynamic bias current which is used to compensate for non-linear terms in a Gilbert Cell multiplier circuit. Common mode dependence is minimized by using balanced differential input stages for both the transconductance and multiplier stages.

Abstract: The input branch of the current mirror is responsive to a single input signal current and each output branch of the current mirror mirrors the input signal current to produce an output current proportional to (e.g., substantially equal to) the input signal current. In one embodiment, the input branch has an input mirror MOS transistor connected to a threshold voltage generator, the output branch has an output mirror MOS transistor connected in cascode to an output cascode MOS transistor, and all of the transistors operate in saturation. The threshold voltage generator may be implemented in different ways, including using four MOS transistors forming two current paths, such that, in one current path, two transistors have channel constants of X and 4X, respectively, and, in another current path, two transistors both have channel constants of A, which may be different from X.

Abstract: A current amplifier includes a cascode transistor for fixing the voltage of an input of the amplifier; a first constant current source connected between the input and a first supply voltage; a second constant current source, for providing a current lower than the first current source, connected between a second supply voltage and the cascode transistor; a second transistor, of different type than the cascode transistor, connected between the input and the second supply voltage, and controlled by the node between the cascode transistor and the second current source; and an output transistor of same type as the second transistor, connected to the second supply voltage and controlled by the node.

Abstract: A reference buffer suitable for driving switched-capacitor or resistive load circuits provides a very low output impedance. The reference buffer utilizes an amplifier with a very large and controlled transconductance configured in feedback and compensated by a load capacitance. Cascaded gain stages are used to provide a large, controlled transconductance. In one embodiment, a reference buffer amplifier includes a plurality of voltage gain amplifiers connected in cascade and at least one transconductance amplifier connected to a last-connected of the plurality of voltage gain amplifiers. The amplifier may further include at least one current mirror amplifier connected to the at least one transconductance amplifier. In another embodiment, the reference buffer amplifier includes at least one transconductance amplifier and at least one current mirror amplifier cascade-connected to the at least one transconductance amplifier. The amplifiers can be differential or single-ended.

Abstract: A write amplifier comprising four current mirrors which are turned on two at a time by two switchable floating current sources between the input terminals of the current mirrors in order to produce a write current of alternating polarity through the write head. The parasitic capacitances across the write head and/or the parasitic capacitances of the write amplifier at the write terminals are compensated by means of feed-forward capacitors. The high impedance at the terminals of the write head enables the common-mode voltage across the write head to be fixed at any desired voltage value by means of a common-mode circuit.

Abstract: A circuit and method for controlling current gain in variable gain and automatic gain control amplifiers or attenuators in high frequency communication systems. A transistor through which the current is provided always operates at the same DC bias, independent of gain control variations. The input signal is provided to a base of the transistor whose collector provides an output current whose gain is to be controlled. An AGC current for adjusting the output current gain and a DC bias current are provided to the base of the transistor through a multi-transistor circuit so that the DC bias is independent of variation of the output current gain.

Abstract: There is disclosed a converter for converting a floating voltage of a Band Gap Reference voltage generator fabricated in P-substrate CMOS technology to a fixed voltage with respect to ground. The converter of this invention utilizes a subtractor to convert the floating voltage to a fixed reference voltage. In addition, the converter of this invention utilizes two level shifters which are able to level shift the floating voltage down and level shift the shifted down voltage substantially back to the level of the floating voltage in order to allow a buffer to be used prior to the subtractor.

Abstract: An improved current mirror circuit with isolation of the output leg for improved stabilization of the circuit even when heavily loaded.

Abstract: A current source (20) uses a current mirror having an input coupled for receiving a first reference current. A first transistor (34) is serially coupled in the input of the current mirror. A second transistor (38) has a first conduction terminal coupled for receiving a second reference current, and a second conduction terminal coupled to an output of the current mirror. The first conduction terminal of the second transistor is coupled to common control inputs (42) of the first and second transistors. As the output voltage of the current source decreases the current mirror transistors are forced to have the same drain-source voltage and gate voltage, and operate at substantially the same point in their linear region. The tracking of the drain-source voltages of the current mirror transistors allow the current source to maintain a constant output current when operating at very low output voltages.

Abstract: A current mirror circuit includes a current input terminal; a first FET and a second FET, each having a gate terminal, a drain terminal, and a source terminal, the gate terminal of the first FET being connected to the gate terminal of the second FET; a third FET having a source terminal connected to the drain terminal of the first FET, and a drain terminal and a gate terminal connected to each other and to the current input terminal; and a fourth FET having a source terminal connected to the drain terminal of the second FET, a gate terminal connected to the gate terminal of the third FET, and a drain terminal serving as a current output terminal. Therefore, even when the output voltage varies, since the current is almost constant, the circuit is not adversely affected by the variation in the output voltage. As a result, error in the output current in response to variations in the output voltage is significantly reduced.

Abstract: Operational transconductance amplifiers (OTAs) are combined at their outputs, yielding a single frequency compensation connection point. In a preferred embodiment, the output of each OTA is asymmetric, i.e., they can only source current and the OTA outputs are tied together to a constant current sink. Consequently, the OTA that sources more current controls the voltage of the merged output. This merged output point provides a voltage output that may be used as a frequency compensation point.

Abstract: An amplifier (40) includes a biasing element (59) which establishes a quiescent current in two transistors (62, 72). An input voltage signal is converted to an input current signal by a voltage to current converting element (65). The input current signal differentially modulates the currents in the two transistors (62, 72). The differentially modulated currents generates differentially modulated voltages across two diodes (76, 78). Two buffers (83, 87) generates a differential output voltage signal at two output terminals (77, 79) of the amplifier (40) by shifting the differentially modulated voltages across the two diodes (76, 78). The output signal of the amplifier (40) has a low DC offset. The gain of the amplifier (40) is adjusted by adjusting the quiescent current in the two transistors (62, 72).

Abstract: The present invention teaches a variety of output stages, buffer circuits, and power amplifiers as well as methods for buffering electrical signals. According to one embodiment of the present invention, an output stage includes an input, an output, an error stage coupled between the input and the output and responsive to a difference between an input signal present on the input and an output signal present on the output, the error stage being operative to generate a current control signal related to the difference between the input signal and the output signal, a current mirror coupled to the error stage and responsive to the current control signal to generate a demand driven current signal related to a magnitude of the current control signal, and an amplification stage coupled between the input and the output.

Abstract: A bipolar transistor current mirror circuit has the bases of its input and output transistors connected together, but decouples the input transistor's collector from its base so that the mirror input voltage is no longer tied to the input transistor's base-emitter voltage. Instead, a separate base current source supplies sufficient base current to the mirror's input transistor to keep it in saturation, while a parasitic transistor that results from a junction isolated fabrication process drains off excess current from the base current source to keep it in balance with the mirror transistor base currents. The resulting input voltage is a function of the input transistor's saturated collector-emitter voltage, which is substantially lower than the base-emitter voltage and provides more voltage head room.

Abstract: A wide-band amplifier circuit includes first to eighth transistors, a plurality of resistors, a capacitor and an output terminal.

Abstract: A balanced current amplifier mirrors either a fully differential or single ended input signal into common output circuits in a manner to generate a fully differential output signal without any d.c. bias. Input signal nodes are maintained at a desired voltage by circuit elements other than those of the current mirror circuits, thus freeing the current mirroring elements from having to be sized for this purpose. The sizes of the output transistors are adjustable in order to set the gain of the circuit. In addition to amplifier circuits, a full-wave rectifier, a comparator, and a filter, all operating with current signals, are described. A single circuit module may include all of these circuits with a user provided the capability to program the module to perform any one or more of these functions.

Abstract: An operational amplifier has a differential amplification section, an output section, a control signal generation unit, and a drive control unit. The output section has a first transistor of a first conductivity type and a second transistor of a second conductivity type that is opposite to the first conductivity type. The first and second transistors are connected in series between a first power source unit and a second power source unit, and the first transistor is driven according to an output of the differential amplification section. The control signal generation unit is used to detect a current flowing through the first transistor and generate a control signal in response to the detected current. The drive control unit is used to drive the second transistor in response to the control signal.

Abstract: A transconductance amplifier having a digitally variable transconductance includes a differential stage having a first differential output coupled to an output terminal via a first current mirror and a second differential output coupled to the output terminal via a second and third current mirror. The first and third current mirrors have multiple output branches for selectively supplying output currents to the output terminal in response to a binary transconductance control signal. In this way a digital control of the variable transconductance is realised, which can be used advantageously in a variable gain stage and in an automatic gain control circuit including such a variable gain stage.

Abstract: A driver circuit for a laser diode includes a prebiasing amplifier for providing a prebiasing current, a second amplifier for amplifying an input signal to provide an output current signal, and a third amplifier for amplifying the sum of the current output signal and the prebiasing current. In one embodiment, the third amplifier includes first and second current mirrors. In another embodiment, a capacitor couples one output of the second amplifier to an inverting input of the third amplifier, so as to increase the effective gain of the third amplifier.

Abstract: A MOS transistor current mirror having a low output voltage is described. A first and second MOST's have their drains and gates connected respectively to form MOS diodes. The drain of the first MOST is connected to a control constant current source and the source of first MOST is connected to the drain of the second MOST. The drain and gate of the first MOST are connected to the base of a bipolar junction transistor (BJT). The collector of the BJT is connected to a first power supply line and the emitter is connected to the gate of a third MOST. A resistor is connected between the emitter of the BJT and the a second power supply line. The gate and drain of the second MOST is connected to the gate of a fourth MOST. The sources of the second and fourth MOST's are connected to the second power supply line. The drain of the fourth MOST is connected to the source of the third MOST. The drain of the third MOST is connected to external circuitry.

Abstract: A current supply circuit includes a current source producing a first current, a current amplifying circuit for producing a second current having a magnitude a.multidot.I/h.sub.FE from the first current where a is a constant, I is a magnitude of the first current and h.sub.FE is a current transfer ratio of a current supply circuit. The above current supply circuit produces a third current from the second current so that the third current has a magnitude equal to a.multidot.I.

Abstract: An error compensated current mirror includes a current mirror circuit having an input transistor and an output transistor; a bias current source in series with the input transistor and a load current source in series with said output transistor; the load current source including a load current source transistor in series with a load current source impedance; an input terminal connected between the bias current source and the input transistor; a buffer circuit including a transistor having its base connected between the load current source and the output transistor; a buffer biasing current source connected in series with the buffer circuit, the buffer biasing current source including a buffer biasing current source transistor in series with a buffer biasing current source impedance; said buffer biasing current source transistor being a replica device of the output transistor; an output terminal connected between the buffer circuit and the buffer biasing current source; and a compensating circuit including a c

Abstract: A precision current mirror circuit eliminates current-loss on the mirror side, and ultimately causes the current source and output current to be the same. The circuit includes a signal input/output means for outputting a current mirror of an input signal, a current control means for controlling a current difference between the input signal and an output signal of the signal input/output, mean and a current amplifier which amplifies the current, as needed, to perform the current control.

Abstract: Current mirror circuits and methods, and an amplifier using same, are provided in which the output of the current mirror is reduced to zero when the input current falls below a predetermined threshold. An offset current is subtracted from the input (or reference) current at input currents below the threshold. Otherwise, the offset current source is turned off. Thus, the output current can be reduced to zero, even if there is a small input current, without distorting the input-output relationship over the majority of the range of operation of the current mirror. An amplifier with two current-feedback complementary input stages (or fader circuit) is also provided which includes a gain control circuit that uses the current mirror circuits of the present invention to ensure that each input can be fully attenuated.

Abstract: A cascode circuit includes a source-grounded input NMOS transistor having a gate connected to an input terminal and a drain connected through an output NMOS transistor to an output terminal. An amplification circuit is constructed by a gate-grounded third NMOS transistor having a source connected to the drain of the input transistor, a current mirror circuit consisting of PMOS transistors having an input current path connected to a drain of the third transistor, and a current source connected to an output current path of the constant mirror circuit as a load. An output from the amplification circuit is fed back to a gate of the second transistor. With this arrangement, the cascode circuit can maintain a high output impedance until a minimum output signal voltage reaches around 0.5 V, and can also have a minimum working supply voltage of about 2 V, and at the same time, a circuit construction suitable for IC in the CMOS process.

Abstract: A unity gain or buffer amplifier having a low offset voltage. The amplifier uses two emitter followers of different conductivity types (PNP and NPN) in an up-down emitter or voltage follower configuration to provide high input impedance and low output impedance. By using both PNP and NPN transistors in a current mirror, the base-emitter voltages of the input and output transistors are forced to be substantially the same, reducing the offset voltage. N- and P-channel MOSFETs can be substituted for the NPN and PNP transistors. Single ended and push-pull arrangements are shown.

Abstract: A semiconductor current follower and method using a copy of the input current from a current mirror to insure that the input impedance remains a virtual ground for both unidirectional and bidirectional signals.

Abstract: An inverter is connected between the control nodes of two transistors in a current mirror system which forms a closed current feedback loop. Any difference between the bias voltages at the input and output of the inverter is reduced to zero. The self-biasing inverter amplifier may comprise the active part of an oscillator but may also be used as a level shifter or a reference circuit.

Abstract: A floating current mirror circuit is disclosed which achieves high open loop gain without additional voltage gain stages leading to frequency compensation and increased power dissipation. The output of the circuit has only a first pole and is designed to be coupled to a second current source, a base coupled to the first terminal of the diode, and an emitter coupled to the floating node. A second bipolar transistor has a base coupled to the collector of the first transistor, and emitter coupled to the floating node.

Abstract: A current mirror circuit (40) includes a first pair of mirrored transistors (T.sub.1 and T.sub.2) having common gate and source connections; a second pair of cascoded transistors (T.sub.3 and T.sub.4) with common gate connections, respectively connected in series between the first pair transistors (T.sub.1 and T.sub.2) and input and output voltage terminals (+V.sub.IN and +V.sub.OUT). First and second voltage level shifter circuitries (41,42) establish shifted bias voltages respectively at the first and second pair transistor gate connections. The first voltage level shifter comprises a pair of transistors (T.sub.5 and T.sub.6) connected in series between an applied voltage terminal and the second pair transistor source connections, for establishing a shifted biasing voltage at the second pair transistor gate connection. The second voltage level shifter comprises a pair of transistors (T.sub.7 and T.sub.

Abstract: A simple high speed precision transconductance amplifier circuit having a low offset. The circuit uses as an input stage two substantially identical transistors of a first conductivity type connected in series so as to have the same current there through, neglecting base currents. A second stage uses two substantially identical transistors of a second conductivity type connected in series, with the output of the amplifier being a current mirrored from the second stage. The offset is maintained low by maintaining the V.sub.BE of the transistors in the two stages substantially identical by connecting together the base and collector of one of the transistors in one stage and coupling the resulting V.sub.BE of the transistor so coupled to one of the transistors of opposite conductivity type in the other stage. Various embodiments and variations are disclosed.

Abstract: A source/sink current generating circuit is arranged to generate source and sink currents which are matched and insensitive to fan out. This is achieved by using a biasing transistor (Q13) between first and second current mirrors which generate respectively the source and sink currents.

Abstract: A control circuit, in particular for a direct current control in positioning systems, comprising a differential circuit (1), a control logic (2) and a full bridge (3) connected between a supply voltage V.sub.S and a reference potential GND. The differential circuit (1) has a first hysteresis comparator (HC1) and a second hysteresis comparator (HC2). The two comparator inputs (HC1-, HC1+, HC2-, HC2+) of the two hysteresis comparators (HC1, HC2) are connected each to one of two input terminals (IN1, IN2) of the control circuit and crosswise to a comparator input of the respective other comparator (HC1, HC2). The inverting input of each comparator (HC1, HC2) is connected to the non-inverting input of the respective other comparator.

Abstract: A radio frequency (RF) amplifier circuit having an input terminal, an output terminal, a power supply terminal, and a control node, includes first, second, and third transistors interconnected in a modified current source or current mirror configuration with first, second, and third resistors and a matching circuit to produce a desired bias current according to the magnitude of a control voltage coupled to the control node while producing an amplified output radio frequency signal at the output terminal from an input radio frequency signal coupled to the input terminal. Implemented with bipolar transistors, enhancement mode field effect transistors, or depletion mode field effect transistors, the circuit achieves two-stage amplification with simplified interstage coupling and therefore fewer components and less size and cost.

Abstract: A level shifter circuit for converting an input signal referenced to the least positive power supply (typically ground) to an output signal referenced to a higher, more usable voltage. The level shifter circuit generally includes a current mirror arrangement for coupling first and second current legs. The first current leg includes an NPN bipolar transistor arranged in series with a resistor R and a PNP bipolar transistor, wherein the NPN and PNP transistors have base inputs V.sub.ref and V.sub.in, respectively. The second current leg comprises a series arrangement of a diode-connected NPN bipolar transistor, a resistor R and a diode-connected NPN bipolar transistor. An output voltage (V.sub.OUT =V.sub.ref -V.sub.in), is taken at the collector of the diode-connected NPN transistor in the second current leg.

Abstract: A voltage controlled current source including feedback circuitry which eliminates the need for a current sensing resistor in series with the output voltage controlled current source. The feedback circuit includes circuitry for generating a reference current which is proportional to, but much smaller than, the output current produced by the current source, and current mirror circuitry for generating a sense current which is equivalent to the reference current. The sense current is provided to a current sense resistor, across which a feedback voltage is developed. The voltage controlled current source further includes an amplifier connected to receive an input control voltage and the feedback voltage for generating the output current in response to the input control voltage and the feedback voltage.

Abstract: Current mirror circuits and methods, and an amplifier using same, are provided in which the output of the current mirror is reduced to zero when the input current falls below a predetermined threshold. An offset current is subtracted from the input (or reference) current at input currents below the threshold. Otherwise, the offset current source is turned off. Thus, the output current can be reduced to zero, even if there is a small input current, without distorting the input-output relationship over the majority of the range of operation of the current mirror. An amplifier with two current-feedback complementary input stages (or fader circuit) is also provided which includes a gain control circuit that uses the current mirror circuits of the present invention to ensure that each input can be fully attenuated.

Abstract: A differential pair arrangement is disclosed which includes between the poles of a DC supply source the series connection of two parallel first branches and a common second branch. Each first branch includes the series connection of a first impedance Q2, Q3, RL/ Q2', Q3', RL', a main path of a transistor Q1/ Q1'and a second impedance RE/RE', the control electrodes of transistors Q1/ Q1' constituting respective input terminals IN1/ IN2 of the arrangement. The second branch includes a first current source (CCS). The arrangement further includes two third branches between the DC supply source poles, each consisting of the series connection of a second current source ICS/ICS', a respective transistor main path and a resistive impedance means R11, S11, R12, S12/ R11', S11', R12', S12'.

Abstract: A current mirror circuit (40) includes a first pair of mirrored transistors (T.sub.1 and T.sub.2) having common gate and source connections; a second pair of cascoded transistors (T.sub.3 and T.sub.4) with common gate connections, respectively connected in series between the first pair transistors (T.sub.1 and T.sub.2) and input and output voltage terminals (+V.sub.IN and +V.sub.OUT). First and second voltage level shifter circuitries (41,42) establish shifted bias voltages respectively at the first and second pair transistor gate connections. The first voltage level shifter comprises a pair of transistors (T.sub.5 and T.sub.6) connected in series between an applied voltage terminal and the second pair transistor source connections, for establishing a shifted biasing voltage at the second pair transistor gate connection. The second voltage level shifter comprises a pair of transistors (T.sub.7 and T.sub.

Abstract: Novel high voltage amplifiers that are capable of being monolithically integrated using low voltage semiconductor fabrication processes are described and claimed. A cascade of low voltage current mirrors is described that can act as a high voltage amplifier output circuit. A high voltage current source circuit also is described and is constructed from the series combination of a low voltage transistor and a parasitic field oxide transistor. Additionally, a differential amplifier having bias current shunting transistors is described that can be used to limit quiescent current from the power supply of the high voltage amplifiers.

Abstract: A amplifier (21) having increased linearity, low input impedance, and low noise is provided. The amplifier (21) has an input (22), a bias input, a first output (23), and a second output (33). A first transistor (26) has a collector coupled to the first output (23), a base coupled to the bias input, and an emitter. A first resistor (27) is coupled between the emitter of the first transistor (26) and the input (22). A second transistor (29) has a collector and base coupled in common, and an emitter coupled for receiving a power supply voltage. A second resistor (28) couples between the input (22) and the common base and collector of the second transistor (29). A third transistor (32) has a collector coupled to the second output (33), a base coupled to the common base and collector of the second transistor (29), and an emitter coupled for receiving the power supply voltage. An input signal applied to the input (22) generates a differential current at the first and second outputs (23, 33).

Abstract: A current mirror for use with a transconductor is disclosed. The current mirror includes an input resistor which changes an input current to a voltage, an output resistor having a value which is scaled with respect to the input resistor, an amplifier which senses the input voltage and the voltage across the output resistor and an output transistor having a gate coupled to the output of the amplifier and a source coupled to the output resistor is disclosed. Such a current mirror advantageously provides a transconductor having low distortion.

Abstract: A method of high frequency current signal amplification utilizing Metal-Oxide-Silicon Field Effect Transistors (MOSFETS) allows the use of MOSFETS for current signal amplification in the radio frequency (RF) range of the electromagnetic spectrum and minimizes the effects of parasitic capacitance. A current signal is applied to pluralities of MOSFETS arranged in amplification stages such that the amplification of the input current signal is determined by the ratio of the channel widths of the MOSFETS employed. Alternating amplification stages comprised of N-conductivity type and P-conductivity type devices are employed. The amplification of the signal can be precisely controlled by both the width of the channels within the MOSFETS and the number of current signal amplification stages employed. The output signal can also be converted to a voltage signal by coupling to a source of resistance or reactance.

Abstract: The amplifier (201) uses transistors (401,403) such as MOSFET transistors in a current mirror configuration. The transistors (401,403) are easy to package as surface mount devices. The drain port of the first transistor is coupled to an output signal (207) and a bias input signal (VB+). A gate port of the first transistor is coupled to a bias control input (117) and the signal input (115). The source of the first transistor and the source of the second transistor are coupled to an electrical ground (409). A first end of a resistive device (411) is coupled to the gate port and the drain port of the second transistor and a second end of the resistive device (411) is coupled the signal input (115) and the bias control input (117). This amplifier (201) has low sensitivity to the variations of the bias current to the control signal threshold, making the amplifier ideal for use in a radiotelephone (103).

Abstract: An integratable current source circuit for generating an output current proportional to an input current includes a first transistor of one conduction type, and second, third and fourth transistors of the other conduction type. Each of the transistors has a base, a collector and an emitter. The first transistor has a current amplification being greater than current amplifications of the second, third and fourth transistors. An input terminal feeds an input current, and an output terminal taps an output current. A current source on one hand is connected to a reference potential and on the other hand is connected to the emitter of the first transistor and to the base of the second transistor. The collector of the second transistor is connected to the reference potential and the emitter of the second transistor is coupled to the base of the third transistor and to the base of the fourth transistor. The base of the first transistor is connected to the collector of the third transistor and to the input terminal.