Abstract: An optical receiver circuit that effectively suppresses ambient light. A photodiode receives both desired higher frequency modulated optical signals, as well as the lower frequency or even DC ambient light optical signals. The optical receiver circuit includes a trans-impedance amplifier as do conventional optical receiver circuits. However, the optical receiver circuit also includes an ambient light suppression circuit in a feedback loop between the output terminal of the trans-impedance amplifier and the input terminal of the trans-impedance amplifier. The transfer function of the ambient light suppression circuit may be selected such that the transfer function of the optical receiver circuit filters out DC and lower frequency components contributed by the unwanted ambient light, and passes the higher frequency components that correspond to the wanted optical signal that actually contains the information of interest.

Abstract: The present invention is to provide a dynamic power control circuit for a wireless communication device, which comprises a power detector, a comparator, a low pass filter and an adder disposed between a radio frequency auto-gain control circuit and an antenna thereof. A reference voltage is imposed on the adder to enable the power detector to detect and output signal voltage to the comparator which compares the received voltage with a specified received voltage limit and outputs a reference voltage to the low pass filter for filtering out the noise of the reference voltage and outputting it to the adder. The adder then adds the reference voltage and the specified reference voltage, and outputs the result to the radio frequency auto-gain control circuit for controlling the output power corresponding to the strength of the received signals.

Abstract: A loop delay control circuit is provided between a comparator and a power switch stage. When the amplitude of an input signal is especially high, the loop delay control circuit secures an oscillation threshold value by setting a delay amount at a low value. On the other hand, when the amplitude of the input signal is not so high, the loop delay control circuit reduces an average switching rate by increasing the delay amount, but does not reduce the oscillation threshold value. This makes it possible to provide a delta-sigma modulator allowing realization of both (i) a high oscillation threshold value, i.e., high output power, and (ii) high power efficiency.

Abstract: In one embodiment, the linear gain region of a preamp is widened by performing the following actions within the preamp: converting a received input current to a first voltage; in accordance with one of a plurality of discrete gain states, amplifying the first voltage to produce a second voltage; in response to the received input current crossing one or more thresholds, switching the gain state used for amplifying the first voltage; and outputting an indication of the preamp's current gain state. Preamps for performing this and other methods are also disclosed.

Abstract: The method controls, in a feedback mode, a common collector or common drain amplifier, biased with a voltage applied on a bias node produced by a biasing circuit that generates a temperature compensated reference voltage from which the bias voltage applied on the bias node of the amplifier is derived. The quiescent voltage on the output node of the amplifier is made substantially independent from temperature by sensing the quiescent voltage on the output node, and adjusting the voltage applied on the bias node of the amplifier based upon the difference between the reference voltage and the sensed quiescent voltage for maintaining it constant.

Abstract: An operational amplifier input stage provides a symmetrical rail-to-rail input common-mode voltage without turning off either pair of complementary differential input transistors. Secondary, or surrogate, transistor pairs assume the function of the complementary differential transistors. The circuit also maintains essentially constant transconductance, constant slew rate, and constant signal-path supply current as it provides rail-to-rail operation.

Abstract: To provide a predistorter compensating for distortion generated at an amplifier by inputting a signal to be inputted to the amplifier constituting an object of compensating for the distortion and previously providing the distortion to the input signal. Amplifier replica means is provided with an input/output characteristic the same as an input/output characteristic of an amplifier or an input/output characteristic approximated thereto and inputs a signal to output. Difference detecting means detects a difference between an input signal to a predistorter and an output signal from the amplifier replica means. Amplifier replica input signal changing means changes a signal inputted to the amplifier replica means such that the difference detected by the difference detecting means is reduced. Change signal outputting means outputs a signal changed by the amplifier replica input signal changing means to the amplifier.

Abstract: Described techniques extend (e.g., by a factor of 2) the dynamic range of voltage swing for amplifiers and other integrated circuits (e.g., buffers) that are fabricated using lower voltage rated semiconductor processes. Such processes include, for instance, thin gate oxide MOS, and other semiconductor processes that provide desirable features that are typically not associated with high voltage processes, such as increased radiation hardness, higher speed logic, and compactness. Thus, relatively large dynamic range is enabled for integrated circuits fabricated using feature-rich lower voltage rated semiconductor processes.

Abstract: A method (500) and apparatus (300, 400, 601) facilitate closed loop transmit power control in a power control loop at and during a transition from one transmit power level to another transmit power level in a transmitter. The apparatus includes a reference path (326) configured to provide a reference signal (325) and a gain compensation signal (417), a detect path (327) configured to process, in accordance with the gain compensation signal, a detected signal corresponding to a power level to provide a gain compensated detected signal; and a power control path (328) configured to generate a power control value in accordance with the reference signal, the gain compensated detected signal, and a loop compensation factor associated with the gain compensation signal where the power control value is suitable for setting the power level for the transmission.

Abstract: One embodiment in accordance with the invention is a circuit. For example, the circuit can include a first stage amplifier coupled to receive a reference voltage. The circuit can also include a second stage amplifier coupled with an output of the circuit and the first stage amplifier. Note that the output can be fed back to the first stage amplifier. Additionally, the circuit can include a module coupled with the second stage amplifier and can restrict current flow to the second stage amplifier and the output provided the circuit is in a sleep mode. Furthermore, the module can drive a terminal of the second stage amplifier to a logic low voltage provided the circuit is in the sleep mode.

Abstract: A general purpose Darlington pair amplifier circuit, configured in accordance with a preferred embodiment of the invention, utilizes GaAs heterojunction bipolar transistor technology. The amplifier circuit incorporates a temperature compensation circuit at the input stage that controls the total current drawn by the transistors such that the total current is stable over temperature. The temperature compensation circuit includes a feedback resistance element and a bias resistance element that form a voltage divider that establishes the base voltage (bias voltage) of an input transistor. The feedback resistance element and the bias resistance element are of different types, having different positive temperature coefficients. In the example embodiment, the temperature coefficient of the feedback resistance element is greater than the temperature coefficient of the bias resistance element.

Abstract: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.

Abstract: A predistorter (26) comprises an array (44) of band pass filters (46 to 52) which divide an input signal into components. Each of the components is manipulated using coefficients retrieved from respective look-up tables (54 to 60). The amplitude of each component is used to retrieve a coefficient from its respective look-up table. The amplitude of each component is then multiplied with its respective retrieved coefficient to generate a predistorted amplitude for that component. The predistorted amplitudes are summed (at 80) to produce a predistorted input signal. The predistortion of the input signal is arranged to counter the distortion characteristic of a signal handling element (such as non-linear power amplifier 22 in FIG. 1) to which the predistorted input signal is subsequently supplied. The coefficients in the look-up tables (54 to 60) can be adapted using feed back from the output of the signal handling means (FIG. 5).

Abstract: A novel method and apparatus is disclosed for reducing power dissipation of RF power amplifiers when a reduced output power level is required. The mechanism has the specific purpose of optimizing the collector terminal voltage on portions of the amplifier's RF chain for maintaining linearity while minimizing power consumption. The apparatus permits a smaller DC to DC converter to be used than in prior art, such that it is implemented in the same semiconductor die or module. Furthermore, the invention eliminates the amplification and phase continuity issues that arise from switched state power amplifiers and envelope-following approaches.

Abstract: Power amplifier apparatus comprising a power amplifier (1) having a signal output, and a power control feedback loop (3, 4, 5) for controlling the output signal power relative to a first power target signal (8). A saturation control loop (6, 7) is responsive to a parameter indicative of saturation of the power amplifier (1) for adjusting the output signal power to a level at which the power amplifier means is substantially not saturated. A power target variation module (11, 15, 16) operable when the first power target signal (8) is at or close to a value corresponding to saturation of the power amplifier means (1) applies to the power control loop (3 to 7) a modified power target signal (17) corresponding to a power target higher than the first power target signal (8) and at which the power amplifier means (1) saturates.

Abstract: An object of the present invention is to provide a charge amplifier which can be operated at low cost so that electric charge generated in a piezoelectric pressure sensor having one end grounded is converted into a voltage signal. In the charge amplifier (1) according to an embodiment of the present invention, a plus side power source input terminal of an operational amplifier (5) is connected to a plus power source (+5 V) while a minus side power source input terminal of the operational amplifier (5) is grounded, so that the operational amplifier (5) is supplied with a single power source. Further, an offset voltage lower than the plus power source voltage but higher than the ground potential is applied to a non-inverted input terminal of the operational amplifier (5). Accordingly, change of pressure in both positive and negative directions can be converted into a voltage signal with the offset voltage as its center though the operational amplifier (5) is driven by a single power source.

Abstract: A transimpedance amplification apparatus includes a signal source for generating a current signal, a source follower stage, a common source stage and a shunt feedback resistor. The source follower stage having a source follower structure receives the current signal to reduce an impedance of the signal source. The common source stage, following the source follower stage, driven by the reduced signal source impedance, amplifies the current signal to extend a frequency bandwidth of the current signal and buffers the amplified signal with the extended frequency bandwidth thereof maintained, wherein the reduced signal source impedance serves to extend a frequency bandwidth of the common source stage. The shunt feedback resistor, which is installed between the source follower stage and the common source stage, adjusts an input DC bias of the source follower stage and increasing a transimpedance gain of the common source stage.

Abstract: A charge amplifier includes an amplifier, feedback circuit, and cancellation circuit. The feedback circuit includes a capacitor, inverter, and current mirror. The capacitor is coupled across the signal amplifier, the inverter is coupled to the output of the signal amplifier, and the current mirror is coupled to the input of the signal amplifier. The cancellation circuit is coupled to the output of the signal amplifier. A method of charge amplification includes providing a signal amplifier; coupling a first capacitor across the signal amplifier; coupling an inverter to the output of the signal amplifier; coupling a current mirror to the input of the signal amplifier; and coupling a cancellation circuit to the output of the signal amplifier. A front-end system for use with radiation sensors includes a charge amplifier and a current amplifier, shaping amplifier, baseline stabilizer, discriminator, peak detector, timing detector, and logic circuit coupled to the charge amplifier.

Abstract: An amplifier and a driver circuit therefor are presented for driving a load according to a system analog input. The amplifier comprises a passive delta-sigma modulator with a passive filter providing a first filtered signal according to a passive filter input and according to a feedback signal, a quantizer coupled with the passive filter and providing a quantized output according to the first filtered signal, and a switching system coupled with the the passive filter and the quantizer. The switching system selectively providing power to a load according to the quantized output and provides the feedback signal to the passive input, wherein a gain amplifier is provided in a feedback loop around the passive delta-sigma modulator.

Abstract: To provide a switching circuit and a digital power amplifier capable of supplying much power to a load, as compared with a conventional circuit. A switching circuit of the present invention comprises a plurality of switching circuit units, in which first to fourth switching elements are connected in a loop in this order, having a DC power source, one end of which is connected to a node between the first and fourth switching elements, and the other end of which is connected to a node between the second and third switching elements. The plurality of switching circuit units are cascade-connected, with one of the external connection terminals of the switching circuit unit on the first stage being connected to one terminal of the load, and with the other of the external connection terminals of the switching circuit unit on the last stage being connected to the other terminal of the load.

Abstract: An LNA for use as an input stage of a radio frequency tuner comprises an inverting amplifier stage and a transconductance stage. The amplifier stage has an input connected via an input resistance to an input of the amplifier and via a feedback resistance to an output of the amplifier stage. The transconductance stage passes a current through the input resistance which is substantially proportional to the output voltage of the amplifier stage.

Abstract: Described are regulated cascode amplifiers with improved low-voltage performance. The improved amplifier is similar to conventional regulated cascode amplifiers, including a cascode circuit and a feedback amplifier. The cascode circuit conventionally includes two output transistors, the first of which preferably remains in saturation to provide a relatively stable output resistance over a range of output voltages. A booster circuit in accordance with one embodiment maintains the first transistor of the cascode circuit in saturation over a broader range of output voltages, and consequently extends the low-end of the operating range of the cascode amplifier.

Abstract: A circuit arrangement is provided which has the advantage of limiting the magnitude of the current to a transimpedance amplifier (TIA) circuit or a current to voltage converter during an overdrive condition, thereby preventing an amplifier of the TIA circuit from non-linear operation and from outputting high output currents. The circuit arrangement further prevents the generation of thermal tails which may cause the loss of data in memory circuits. The circuit arrangement limits the magnitude of the current to the TIA circuit during the overdrive condition by utilizing a current limiter circuit having a Schottky bridge. The Schottky bridge provides an open circuit arrangement between the TIA circuit and a current source when the overdrive condition occurs.

Abstract: An apparatus comprising an amplifier, a first resistor and a second resistor. The amplifier (i) comprises a first transistor and a second transistor and (ii) may be configured to generate an output signal in response to an input signal. The first resistor may be connected between an emitter of the second transistor and a signal ground. The second resistor may be connected between the emitter of the second transistor and a base of the first transistor. A gain of the amplifier may be adjusted by varying a value of the first resistor and a value of the second resistor.

Abstract: Briefly, DC offset cancellation techniques that utilize one of multiple sources of a DC offset cancellation signal. The DC offset cancellation techniques may be used by a limiting amplifier.

Abstract: A method and circuit for providing a faster overload recovery time for an amplifier circuit is provided. An overload recovery circuit is configured to reduce and/or eliminate the slow tail voltage that may be caused by overloading a composite amplifier, and thus provide a faster overload recovery time over a wide range of feedback components for the composite amplifier. The overload recovery circuit comprises a bypass device configured to provide a path for additional current to flow through during overload conditions, thus creating a “clamping” action with the feedback element of the amplifier circuit. As a result, the current flowing through the bypass device of the amplifier circuit will be large enough to hold an inverting node of the composite amplifier at the common mode voltage, thus reducing the overload recovery time.

Abstract: A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains the mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. In a preferred embodiment, the biased transistor is concurrently in both a Darlington and the current mirror configuration. Moreover, a feedback transistor in the feedback circuit is also concurrently in the Darlington configuration, thus providing an efficient biasing arrangement for an amplifier block based on the Darlington arrangement.

Abstract: Disclosed is a transimpedance amplifier comprising a multistage amplifier and a feedback circuit coupled between a single ended input terminal and one of a plurality of differential output terminals of the multistage amplifier. The feedback circuit may control an input voltage at the single input terminal to substantially maintain a set or predetermined transconductance between the single ended input terminal and the differential output terminals.

Abstract: An output buffer is configured to receive differential input signals and to transmit differential output signals. A pre-driver is coupled to the output buffer and is configured to receive a data input signal and to generate the differential input signals for the output buffer. A feedback loop is coupled between the output buffer and the pre-driver. The feedback loop is configured to generate a feedback signal on the basis of a signal level present in the output buffer. The pre-driver is configured to receive the feedback signal generated by the feedback loop.

Abstract: An automatic gain control (AGC) amplifier including a high gain transimpedance amplifier, a resistive feedback network and multiple transconductance stages coupled in the feedback path of the AGC amplifier. The feedback network receives an input signal and is coupled to the output of the high gain amplifier and has multiple intermediate nodes. Each transconductance stage has an input coupled to an intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. Each transconductance stage is independently controllable to position a virtual ground within the feedback network to control closed loop gain. Each transconductance stage may have a bias current input coupled to a bias current control circuit. The control circuit controls each bias current to vary the gain of the AGC amplifier. The bias currents may be linearly controlled employing a ramp function to achieve a linear in dB gain response.

Abstract: A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a constant current source. The current sources can be controlled so that the difference between the common mode voltage and the common source voltage becomes constant, and a level shifter may be provided for level-shifting the common source voltage of the first and second MOS transistor. The MOS differential amplifier circuit so designed can be used in a voltage adder/subtractor circuit.

Abstract: A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a current source, which can be adjusted to change the transconductance of the amplifier. The circuit can be provided with a quadri-tall cell or level shifter in order to provide this operation. With these operational characteristics, the MOS differential pair of this type can be used in a voltage adder/subtractor circuit.

Abstract: A low power current feedback amplifier having a lower output impedance input stage is provided. To reduce the output impedance, an input stage comprises a closed-loop input buffer. An exemplary input buffer comprises a closed-loop current feedback amplifier configured within the overall current feedback amplifier, wherein the output of the input buffer corresponds to the inverting node of the overall current feedback amplifier. The closed-loop configuration of the input buffer is facilitated by the use of an internal feedback resistor coupled from an inverting input terminal of the input buffer to the output of the input buffer, which corresponds to the inverting input terminal of the overall current feedback amplifier. The closed-loop input buffer realizes a low output impedance since the loop gain reduces the output impedance of the input buffer. With a lower output impedance, the bandwidth of the current feedback amplifier becomes more independent of the gain, even at low current implementations.

Abstract: A Class D amplifier device with reduced power consumption uses a passive RC network. The output of the RC network directly feeds a comparator resulting in increased efficiency. The RC network is configured to perform several functions, including the low pass filtering of the feedback signal to remove high frequency/high amplitude clock components and provides a DC path from its output to reduce duty cycle errors. Additionally, the input signal receives low pass filtering, creating a generally flat frequency response. Finally, the clock signal is filtered to generate a triangle wave of good linearity and appropriate amplitude.

Abstract: An amplifier circuit includes a circuit input, and a circuit output. An inverter, including first and second MOS transistors is connected between first and second supply voltages, and has an inverter input connected to the circuit input, and an inverter output, which provides an inverter output current corresponding to a circuit input voltage. A first resistive element comprises a third MOS transistor and a fourth MOS transistor of opposite conductivity types, and each having their gate and drain terminals connected to the inverter output and the circuit output, and having their respective source terminals connected to respective ones of the first and second supply voltages. A second resistive element includes a fifth MOS transistor and a sixth MOS transistor of opposite conductivity types, and each having its drain-source path connected between the circuit output and the circuit input, and having its gate connected to a respective voltage source.

Abstract: A chip capacitor is arranged on a microstrip conductor forming a microstrip line. The chip capacitor has a dielectric material and electrodes provided on both ends thereof. The electrodes of the chip capacitor are connected to the microstrip conductor. A resonance frequency is decided by the length of the microstrip conductor between the electrodes of the chip capacitor, the dielectric constant and the thickness of the dielectric substrate and the capacitance value of the chip capacitor.

Abstract: The present invention is related to a Line driver for amplifying an input signal, said line driver comprising: a first input terminal (11) for receiving said input signal, a non-linear amplifier (3) connected to said input terminal (11) and arranged to provide a first output signal at a first output terminal (13), a digital to analogue converter (15) arranged to transform said input signal to an analogue input signal, an analogue linear amplifier (5) comprising a second (6) and a third input terminal (8) and a second output terminal (10), set up as a comparator between a first correction signal provided at said second input terminal (6) and a second correction signal provided at said third input terminal (8) and arranged to provide a second output signal at said second output terminal (10), combining means arranged to combine said first output signal and said second output signal to provide a total output signal to an output line (7), a first operational amplifier (12) configured to sense the current of said

Abstract: A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains die mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit.

Abstract: A high frequency power amplifier module of a multistage amplifier construction comprising: an input terminal; an output terminal; a control terminal; and a mode switching terminal. The first amplification stage includes a dual gate FET, and a bias voltage according to a signal is applied to the first gate and the second gate of the dual gate FET from the control terminal and the mode switching terminal, and a radio signal from the input terminal is applied to the second gate such as the source of the dual gate FET. In dependence upon the signal from the mode switching terminal, the mode of the high frequency power amplifier module is for the GSM (i.e., for a non-linear amplifying action) and for the, EDGE (for a linear amplifying action).

Abstract: An electrical circuit arrangement (19), comprising an output stage (4) having an output terminal (2) for delivering an output current, and at least one feedback circuit (15, 16) operatively connected to the output terminal (2). A current generator circuit (20), arranged for generating a current which is a fraction of the output current, connects by a resistive element (21) to the output terminal (2), thereby providing improved high frequency feedback stability.

Abstract: A cascode amplifier integrated circuit (IC) with a relatively fast transient fall response (i.e., short transient fall response time) and, therefore, relatively fast operation. The cascode amplifier IC includes a bias input terminal configured to receive a bias potential Vb, a power supply input terminal configured to receive a power supply voltage Vcc, an input signal terminal configured to receive an input voltage signal Vin, and an output signal terminal. The cascode amplifier IC also includes a gain stage circuit with a plurality of interconnected bipolar transistors and an output buffer stage circuit configured. The cascode amplifier integrated circuit further includes a discharge circuit configured to discharge stray capacitance at a node of the output buffer stage circuit.

Abstract: An electrical circuit arrangement (19), comprising an output stage (4) having an output terminal (2) for delivering an output current, and at least one feedback circuit (15, 16) operatively connected to the output terminal (2). A current generator circuit (20), arranged for generating a current which is a fraction of the output current, connects by a resistive element (21) to the output terminal (2), thereby providing improved high frequency feedback stability.

Abstract: A system and method for providing automatic gain control (AGC) with high dynamic range. An AGC system comprises an open loop control system and a closed loop control system. The open control loop system senses the power level of an input signal and preprocesses the input signal based on its sensed power level. For instance, a strong input signal is attenuated by a fixed level via an analog attenuator, a weak input signal is amplified by a fixed factor via a low noise amplifier, and an intermediate level input signal is directly passed to the closed loop control system of the AGC without any attenuation or amplification. By preprocessing the input signal, the closed loop control system can operate in a range that is optimal for its performance. For instance, a gain variable amplifier of the closed loop control circuit can be prevented from operating in a high attenuation status where its noise figure is very high. A wide band receiver using the AGC system may have a dynamic range over 100 dB.

Abstract: A low drop out voltage regulator includes an error amplifier (12) having a first input coupled to a first reference voltage (VREF), a second input receiving a feedback signal, and an output (15) producing an output signal (VAMPOUT). An output transistor (18) has a gate, a drain coupled to an unregulated input voltage (VIN), and a source coupled to produce a regulated output voltage (VOUT) on an output conductor (19). A feedback circuit (20,22) is coupled between the output conductor (19) and a reference voltage (GND) to produce the feedback signal. A capacitor (16) is coupled between the output (15) of the error amplifier and the gate (17) of the output transistor (18). A servo amplifier (24) has a first input coupled to a second reference voltage (VVREF), a second input coupled to the output (15) of the error amplifier. A low current charge pump circuit (26B) supplies an output current into a supply voltage terminal of the servo amplifier.

Abstract: A current amplifier A1 includes two transistors Q1 and Q2 whose emitters are interconnected via a resistor R1. The input of the current amplifier is constituted by the emitter of the first transistor Q1, whose collector is connected to the output terminal of the amplifier A1 via a second resistor R2, and to the first resistor R1 via the main current path of the second transistor Q2. The current amplifier A1 has a simple structure and a low input impedance, as well as an easily controllable gain.

Abstract: The invention provides RF power controllers that cancel offset voltages in the power control loop and external offset voltages by coupling the output of the RF power controller to an auto-zero amplifier during STANDBY mode. The auto-zero amplifier controls the output voltage of the RF power controller during each STANDBY mode so as to eliminate the effect of offset voltages. The voltage at the input of the auto-zero amplifier that allows the offset voltages to be canceled is stored during ENABLE mode. The stored voltage is used by the auto-zero amplifier to continue to remove the effect of the offset voltages on the output voltage of the RF power controller during ENABLE mode. Offset drifts due to temperature, power supply changes, etc. are canceled due to frequent offset sampling.

Abstract: A pre-amplifier circuit, which may be used in a variety of data recovery circuits to accurately recover data transmissions, includes an input regulatory circuit, a feedback circuit, and an amplifier. The input regulatory circuit regulates the magnitude of the data signal provided to the amplifier based on feedback signals from a feedback circuit. For low level data signals, the input regulatory circuit provides a fill, or almost full, representation of the data signal to the amplifier for amplification. But, when the data signal levels increase, the input regulatory circuit attenuates, based on the feedback signals, the data signals more and more before providing them to the amplifier, such that the output of the amplifier stays within a certain range.

Abstract: The AGC circuit and method especially applicable in circuits where fast response and stability of the system is necessary, such as where input signals are speech patterns. A gain feedback loop repeatedly adapts the gain and a long term average energy E.sub.mean of the output signal until it approaches a predetermined level. In each pass through the gain feedback loop the long term average energy E.sub.mean is increased by a gain compensation parameter directly proportional to a gain change, thereby rapidly adapting the long term average energy E.sub.mean to converge to the predetermined level.

Abstract: An autozero method and system that cancels offset for use in an AMI or like system and that operates while data is being transmitted and does not require a retraining sequence. The system applies the offset correction feedback in a unique way inside the traditional feedback loop. The system also provides a unique method of introducing offset correction into an analog feedback loop prior to the last gain stage such that the offset cancellation point is inside the feedback loop. This allows a straight forward implementation which does not have to compensate for the offset change due to the gain of the last stage. A digital control system allows the AGC and the autozero to be active in the same feedback loop and to interact with no adverse affects during the transmission of data.

Abstract: A device for converting a current pulse signal into a voltage pulse signal through a conversion from a current to a voltage includes a converting unit converting the current pulse signal into a first voltage signal, a voltage reducing unit generating a second voltage signal by reducing a magnitude of the first voltage signal, a delay unit generating a third voltage signal by delaying the second voltage signal, and a comparison unit generating the voltage pulse signal by comparing the first voltage signal with the third voltage signal.