Abstract: A circuit provides a high impedance input to an operational amplifier by substituting a p-channel field effect transistor for the bias resistor normally used on the input to an operation amplifier. By placing a PFET in place of the bias resistor, a resistance value can be created that is hundreds of times higher, for the same area of silicon within the integrated circuit, as that created with an actual resistor. This PFET has parasitic capacitance which may be significantly offset by connecting the gate of the PFET to the output of a source follower circuit having its input connected to the inverting input of the operational amplifier. The circuit may be still further improved by using a voltage follower amplifier circuit in place of the source follower.

Abstract: A compensating transistor (Q5) is connected in series with the collector of a main transistor (Q3), and a level shifted replica (Vin+V1) of an input signal (Vin) is applied to the base of the compensating transistor (Q5) to maintain a constant voltage difference between the base and collector of the main transistor (Q3) and compensate for base width modulation .DELTA.Vce. A voltage-controlled current source (S1) is responsive to the input signal (Vin) and applies a compensating current .DELTA.Iload which is equal and opposite to the load current variation caused by a change (.DELTA.Vin) in the input voltage (Vin) to the emitter of the main transistor (Q3) to compensate for load current modulation .DELTA.Vbe. Alternatively, the compensating current can be applied to the junction of the base of the main transistor (Q3) and the emitter of pre-distortion transistor (Q4) which has a base connected to receive the input signal (Vin). Another compensating transistor (Q12) applies a current (.DELTA.

Abstract: A high-gain, low-noise transistor amplifier comprises an input, an output, and first and second field effect transistors each having a gate, a drain, and a source and being formed in a common semiconductor substrate. The second transistor is a depletion mode transistor if it is of the same conductivity type as the first but is an enhancement mode transistor if it is of opposite conductivity type with respect to the first. In an amplifier configuration, the input is coupled to the gate of the first transistor, the source of the first transistor is coupled to the gate of the second transistor, the source of the second transistor is coupled to the output, and there is a direct-coupled feedback path from the source of the second transistor to the drain of the first transistor. At least the first transistor is formed in an isolated well of conductivity opposite to that of the substrate in the semiconductor substrate and its source is coupled directly to that well.

Abstract: A wideband amplifier comprises a dual-emitter bipolar transistor arrangement with coaxial transformers, each having a high turns ratio and tight coupling between a first toroidal winding on an annular ferrite core and a second, single-turn, winding constituted by a metal container of the transformer. The second windings are coupled between respective emitters and signal ground, and the first windings are connected between the transistor base and collector, respectively, and signal ground. An input signal is supplied to the base, and an output signal is derived from the collector. The dual-emitter bipolar transistor, which has four terminals, is thereby transformed into a two-port (input port and output port) device which facilitates impedance matching, provides a linear and constant gain over a large bandwidth, provides high isolation of the input from the output, and provides low noise at the input and a high level at the output.

Abstract: An operational amplifier is provided with an improved frequency compensation circuit, wherein a first compensation circuit inserts a first dominant pole at a first predetermined frequency for decreasing the magnitude of the ouput signal of the operational amplifier with increasing frequency, while a second compensation circuit inserts a pole and a zero at second and third predetermined higher frequencies in the transfer function of the operational amplifier, respectively, for stabilizing the first compensation circuit and ensuring the stability of the operational amplifier over the operational bandwidth. The pole and zero of the second compensation circuit inserts a positive phase shift about the third predetermined frequency effectively extending the phase response of the operational amplifier and allowing the frequency of the first dominant pole to be increased without sacrificing phase and gain margin.

Abstract: An output circuit for CCD imager devices or CCD delay devices is disclosed in which a depletion type second MIS transistor is connected to the drain side of a first MIS transistor constituting a source follower adapted for converting transferred signal signals into an electrical voltage, and an output voltage is supplied to the gate of the second MIS transistor. This depletion type second MIS transistor causes the drain potential of the first MIS transistor to be changed in phase with the input electrical charges to reduce the gate-to-drain capacitance of the first MIS transistor to improve the charge-to-voltage conversion gain.

Abstract: The low distortion drive amplifier of the present invention uses an emitter follower circuit to drive a low impedance load such as a transmission line. A constant current source is connected to the emitter terminal of the emitter follower transistor to provide a constant current through the emitter of the emitter follower circuit. Compensation circuitry is provided to offset any load current that is diverted from the emitter follower circuit to the load thereby insuring a constant current through the emitter of the emitter follower transistor. In this fashion, even with a low impedance load, a constant gain and a relatively constant output impedance can be obtained for this amplifier circuit thereby providing a low distortion drive circuit for the low impedance load such as a transmission line.

Abstract: A low noise, high speed current transimpedance amplifier system (20) includes AC bootstrapping for the photodiode D1 by capacitor C2 connected between the source of the JFET Q1 and the cathode of the photodiode D1 by line (56). Line (58) also provides AC bootstrapping to the case of the module (40) through capacitor C2. Similarly, the source resistor R3 and drain of JFET Q1 are AC bootstrapped through capacitors C1 and C4 to the emitters of the transistors Q2 and Q4 by lines (60) and (62). The collectors of the second stage transistors Q2 and Q4 are bootstrapped to the third stage transistor Q3 emitter through capacitor C8 by line (64). This bootstrapping reduces the effective input capacitance at the front end of the amplifier system (20) by a factor of up to about 100, thus reducing signal noise component in the subsequent stage or stages to negligible compared to front end noise.

Abstract: Wideband amplifier having a differential amplifier or single-ended amplifier and having a capacitaqnce compensation circuit is disclosed. The amplifier detects the voltage variations of a signal input node or a signal output node, generates a compensation current equal in magnitude and opposite in direction to a current flowing in a parasitic capacitance such as a transistor junction capacitance, and cancels the parasitic capacitance associated with a node by supplying the compensation current in a reverse phase to the node to which the parasitic capacitance is attached. As a result, a wideband amplifier is achieved, and it can also be used as a high-speed comparator. Further, harmonic distortions causing from the voltage dependency of the parasitic capacitance can be reduced by flowing the compensation current corresponding to a voltage impressed to the junction capacitance.

Abstract: A broadband amplifier comprising insulated collector vertical pnp transistors, a circuit device effective to improve frequency response, and a final stage comprising a so-called complementary pair formed of an npn transistor and a pnp transistor having emitters connected to each other and to an epitaxial layer n of the insulated collector vertical pnp transistor incorporated in the gain circuit of said amplifiers. The complementary pair afford minimization of the junction parasitic capacitances of the aforesaid vertical pnp transistor.

Abstract: An amplifying circuit for amplifying a bipotential input signal, including an insulating housing having a conductive input contact mounted on the housing and adapted to engage a human body so that the bipotential input signal applied to the contact; a lead amplifier having inverting and non-inverting inputs, one of which is coupled to the input contact, and an output; first and second diodes connected in parallel inverse polarity across the inputs of the lead amplifier; third and fourth diodes connected in parallel inverse polarity from the inverting input of the lead amplifier to a circuit common potential; and an output resistor connected from the inverting input to the output of the lead amplifier. Portions of the input contact are surrounded by a voltage drive shield connected to the output of the lead amplifier.

Abstract: A wideband amplifier with active high-frequency compensation includes an active equivalent RC network connected across the emitters of a differential amplifier. The active RC network exploits inherent junction capacitance and resistance, and is controlled in such a manner that the desired compensation value is provided.

Abstract: A low input-capacitance amplifier is disclosed for utilization in driving a guard shield of a high impedance signal. The high impedance signal is applied to a central conductor and to the input of a first unity gain amplifier. The output of that unity gain amplifier is applied to a second unity gain amplifier which is utilized to provide the guard signal to the shield conductor and also to provide electrical power to the first unity gain amplifier. A preferred embodiment of the present invention is utilized in conjunction with a highly sensitive capacitance proximity sensor which has a sense electrode remotely located from the associated electronic circuitry. By utilizing the output of the second unity gain amplifier as the power source for the first amplifier the input, the output and all electrical power receiving nodes are maintained at substantially identical electrical potentials thereby nullifying the loading effect of any parasitic capacitances at the input of the first amplifier circuitry.

Abstract: A high-gain, high-frequency, high-power, push-pull amplifier employing a pair of static induction transistors (SIT's) in common-source configuration. A pair of capacitances each of approximately the same capacitive value as the drain-to-gate parasitic feedback capacitance of each SIT are cross-coupled between the drains and gates of the pair of SIT's to neutralize the drain-to-gate capacitances and provide stable operation.

Abstract: A zero capacitance measurement probe to be used to make electrical measurements at a broad range of frequencies without having the probe itself affect the measured values. The probe reduces internal capacitances in the solid state active elements or creates a negative impedance to counteract capacitance external capacitance. Elimination of capacitance is accomplished by adjusting gains and current flow within active elements and by insulating the elements from ground by an additional substrate and metalized layer.

Abstract: A three-stage amplifier circuit specially configured to provide a high input impedance. An initial emitter follower transistor stage amplifies the current level of an ac input signal to produce a first intermediate signal, a common-base transistor stage amplifies the voltage level of the first intermediate signal to produce a second intermediate signal, and a final emitter-follower transistor stage amplifies the current level of the second intermediate signal to produce an output signal in phase with the input signal. A feedback circuit feeds back the output signal to the input of the common-base transistor stage, to supplement the first intermediate signal input. This effectively increases the input impedance of the common-base transistor stage and, likewise, the initial emitter follower transistor stage, whereby the amplifier circuit can be used to amplify signals produced by high impedance sources.

Abstract: A differential amplifier with single-ended drive includes a balancing impedance (20) coupled between the base of the transistor (3) connected to the signal input (1) and the common point (9) of the two emitters of the transistors (3,4), which form a differential pair. The capacitance value of the capacitor (20) is substantially equal to the capacitance value of the stray capacitance (19) of the collector-substrate junction of a transistor (10) which forms a current source. This provides a symmetry of the capacitances between the input (1) and the common point (9) and between the common point (9) and ground via the transistor (10). This results in an improved balance in the output signals at the output terminals (5,6) and a flat frequency response of the differential amplifier for higher frequencies.

Abstract: An operational amplifier includes an input stage, an output stage including first, second and third NPN output transistors, and an intermediate stage. The first NPN output transistor sources load current to an output terminal while the second and third output transistors sink load current therefrom. A first Miller capacitor is coupled between the input of the intermediate stage and the amplifier's output terminal. A second Miller capacitor is coupled between the base and collector terminals of the third NPN output transistor.

Abstract: An operational amplifier with frequency compensation is described. The amplifier includes a first amplifier with a low-impedance output followed by a transconductance amplifier with a capacitive feed-forward. The transconductance amplifier is followed by a Miller integrator.

Abstract: A first feedback loop to a regulator transistor within the drain circuit of the input field effect transistor (FET) serves to maintain the voltage across the drain-gate junction of the input FET at a constant value consistent with FET operation as a source follower, thereby mitigating junction to junction capacitances within the FET. A second feedback loop created guard circuits on the cases of the input FET and the drain circuit regulator transistor, thereby mitigating junction to external circuitry capacitances. A third feedback loop modifies essentially constant current flow in the source circuit of the input FET in order to compensate for capacitance within that circuit. When utilized in compact form for microprobing of low voltage nanosecond rise time signals, the amplifier demonstrates an effective input capacitance of less than 0.5 picofarads.

Abstract: An electronic circuit for a high impedance probe for an instrument for measuring electrical voltages, comprising an input field effect transistor 15 connected in a source-follower configuration, a bipolar transistor 17 connected in an emitter-follower configuration and controlled by the transistor 15, a current source 18 serving as a load for the transistor 17, an amplifier 19 having a gain G which is slightly less than unity, the input of the amplifier being controlled by the transistor 15, and finally a resistor 20 which serves as a load for the transistor 15 and which connects the source of the transistor 15 to the output 8 of the amplifier 19, said output also serving as the output of the circuit, which is supplied by a voltage source applied between the current source 18 and the collector of the transistor 17. By virtue of the amplifier 19, the effective load resistance seen by the transistor 15 is R.sub.20 /(1-G), R.sub.20 being the value of the resistor 20.

Abstract: A circuit arrangement includes an integrated semiconductor circuit with a plurality of connection leads in which stray capacitances with equal temperature coefficients exist between one connection lead and the two adjacent, second and third, connection leads. A voltage is present between the first and second connection leads, and produces a current through the stray capacitance between these connection leads. In order to cancel the effect of this temperature-dependent current, a compensation voltage is applied between the first and second connection leads, which compensation voltage causes a current which is equal and opposite to the current through the stray capacitance between the first and second connection leads to flow through the stray capacitance between the first and third connection leads.

Abstract: A buffer amplifier circuit is provided in which the effects of power supply noise is substantially reduced while contemporaneously exhibiting the attributes of low thermal distortion and high linearity. The amplifier comprises a source follower input stage which contains additional devices to absorb power supply variations, and an emitter follower output stage. A constant-current bias network includes means for bootstrapping the gate-to-drain capacitance of the input source follower.

Abstract: A feedback amplifier, particularly suitable for use in the video output circuit of a television receiver, has an amplifying circuit, for example, in the form of a differential amplifier, a first feedback circuit for negatively feeding back to the input of the amplifying circuit a low frequency component of the output signal from the amplifying circuit, and a second feedback circuit having substantially the same feedback ratio as the first feedback circuit but being operative to negatively feedback to the input of the amplifying circuit a high frequency component of the output signal.

Abstract: A so-called charge sensitive amplifier is used as a pre-amplifier for a semiconductor detector. A field-effect transistor (FET) is used as the input stage of the amplifier, wherein the gate terminal of the FET is fed back from the output of the amplifier and the drain terminal of the FET is grounded through a capacitor and connected to a constant current source to make the drain voltage change correspond to the gate potential. The gate potential is self-stabilized.