Abstract: An improved class-G amplifier (FIG. 2) is provided by adding a first capacitor (82) between the input of current mirror (18) and node p, and by adding a second capacitor (84) between the input of current mirror (20) and node m. The added capacitors (82) and (84) can be sized to stabilize frequency responses when high power supplies are enabled. The added capacitors (82) and (84) further function to reduce transient currents during switching through the crossover points between first upper and lower power supplies (Vsp1, Vsph) and between second upper and lower power supplies (Vsm1, Vsmh).

Abstract: The gain-bandwidth (GBW) limitation problem inherent in all amplifiers is overcome to provide wideband amplifiers with specified characteristics for the transfer function. Parasitic capacitances of transistors are absorbed or incorporated into the design of the passive networks, which are inserted between the gain stages of the amplifier. The component values are determined based on conventional low-pass filter structures. A prototype CMOS transimpedance amplifier implemented using the developed technique achieves over 9 GHz bandwidth and 54 dB transimpedance gain from a 0.5 pF photo-diode capacitance.

Abstract: A method and circuitry for implementing programmable gain. More particularly, embodiments of the present invention provide an amplifier circuit which can be used as a CDS-amp or an instrumentation amplifier. Included is a two-stage amplifier, each stage having a few as one transistor. A current source biases one stage of the two-stage amplifier. A load resistor network couples to the two-stage amplifier and is configured to set gain values for the two-stage amplifier.

Abstract: A reconfigurable dual-mode multiple stage operational amplifier circuit includes a configurable portion that can be selectively configured to operate in either a one-pole mode or a two-pole mode. Different exemplary operational amplifier circuits are provided, some of which employ a compensation portion that can be selectively coupled to the configurable portion. For example, in the one-pole operating mode the compensation portion is decoupled from an output of the configurable portion. Conversely, in the two-pole operating mode the compensation portion is coupled to the output. The compensation portion is configured to stabilize a signal on the output. The configurable portion switches between operational modes in response to at least one control signal. The operational amplifier may include a pulse generating portion that is coupled to operatively control the configurable portion in response to the at least one control signal. Such an implementation negates the need for a compensation portion.

Abstract: The present invention provides a dual stage amplifier with a clamping circuit and a methodology, along with a clamping circuit for use with a dual stage amplifier, which eliminate or reduce the overcharging of a compensation capacitor in such a dual stage amplifier. The amplifier includes a first amplifier stage with a first input and a first output, a second amplifier stage having a second input operatively connected to the first output, and a second output. The amplifier further includes a compensation capacitor in electrical communication with the second input and the second output, and a clamping circuit in electrical communication with the second stage, which is adapted to prevent overcharging of the compensation capacitor.

Abstract: A differential amplifier circuit comprises: an amplifying section including first and second current branches and an output stage which comprises a current sinking element and a control element. The circuit also includes a current limiting section which comprises a current detecting element connected to detect the current through the current sinking element and arranged to drive the current limiting element when the detected current exceeds a predetermined threshold to inject current at the collector of the transistor in the first current branch.

Abstract: A class AB single-stage operational amplifier having input decoupler stages for voltage signals, a voltage repeater stage, biasing transistors and bias current generators for the input decoupler stages, and capacitors placed between the input decoupler stages and the voltage repeater stage so as to increase the phase margin.

Abstract: One aspect of the invention is an integrated circuit (10 or 110) comprising an amplifier (11 or 111) having at least two poles in its frequency response and an output impedance compensation circuit (M1A, M2, M3, AC1 or M1A, M2, M3, M4, AC1) coupled to an output node (30) of the amplifier (11 or 111). The output impedance compensation circuit (M1A, M2, M3, AC1 or M1A, M2, M3, M4, AC1) is operable to create a feedback signal proportional to the impedance of an output load (50) coupled to the output node (30), and create a zero in the frequency response of the amplifier (11 or 111) in response to the feedback signal between the at least two poles.

Abstract: A circuit for splitting poles between a first stage and a second inverting voltage-amplifier stage of an electronic circuit, comprises, in series between the output of the first stage and the output of the second stage, and in that order, a first capacitor, a second capacitor and a resistor. The circuit further comprises a voltage-divider bridge which is connected between a terminal delivering a substantially constant voltage and the output of the first stage. The output of the voltage-divider bridge is linked to the common node between the first capacitor and the second capacitor, in such a way that a first resistor of the voltage-divider bridge is connected in parallel with the first capacitor.

Abstract: An integrated circuit including a resistor that at least partially overlies a first tub of semiconductor material of a first polarity, where the first tub is formed in a second tub of semiconductor material having the opposite polarity, and the second tub is formed in a semiconductor substrate having the first polarity. The second tub forms the base of a vertical bipolar transistor, the first tub forms the emitter of the transistor, and the substrate forms the collector of such transistor. Where the vertical transistor is a PNP transistor, the first tub is the emitter and consists of P-type semiconductor material, the second tub is the base, and the substrate is the collector. Preferably, the resistor is a strip of polysilicon or a set of multiple, series-connected polysilicon segments. Typically, the integrated circuit is an amplifier and the resistor is a gain-setting resistor.

Abstract: A parasitically compensated resistor (50) for integrated circuits includes a substrate (52). A polysilicon resistor (54) is formed in the substrate (52). The polysilicon resistor (54) has a first end connected to a first lead (56) and a second end connected to a second lead (58). A conductive layer (62) is capacitively connected to the polysilicon resistor (54).

Abstract: The present invention provides an apparatus, system and method of improving the bias response time for pre-amplifier circuits which utilize noise reduction capacitors 275. The system uses a quick recovery circuit 210 electrically connected to the capacitive node 216 of the pre-amplifier circuit. The quick recovery circuit 210 comprises a gain amplifier 218 with a resistive input and a controlled current source 219. The controlled current source corresponds to adjustments in a controlled current source 225 of the pre-amplifier and is electrically connected to the resistive input of the gain amplifier 218. The gain amplifier 218 can be selectively switched 211 to operatively connect an output to the capacitive node 216 of the pre-amplifier circuit.

Abstract: An improved amplifier includes an input stage differential amplifier (100) with an output forming a gain node (102), an output stage buffer (104) having an input connected to the gain node (102), a compensation capacitor (106) connected from the gain node (102) to ground, and a correction amplifier (200) with a first input connected to the output of the output stage buffer (104), a second input connected to the input of the output stage buffer (104), and having an output connected to the gain node (102), the correction amplifier further including a correction capacitor (304) connected between the input and output of the output stage buffer (104). The correction capacitor (304) preferably has a capacitance value (C′) set equal to the capacitance (Ccomp) of the compensation capacitor (106).

Abstract: The invention relates to an amplifier circuit (20) and a method for reducing stray feedback, wherein an additional feedback compensation terminal is provided at the output of the amplifier circuit. A predetermined fraction of the output signal of the amplifier circuit is output at the feedback compensation terminal (RFB) so as to reduce the stray feedback of the output signal. The feedback compensation terminal (RFB) enables a reduction of the stray feedback by providing an additional stray feedback signal which is negatively added at the input of the amplifier circuit (20) to thereby reduce overall stray feedback. The gain may be adjusted once during manufacturing, or each time when operation of the device is initiated.

Abstract: A circuit (10) having multiple poles within an active frequency range employs a movable zero (66) to maintain stability in the circuit (10) under variable load conditions. A pole (62) created by a frequency compensation element (14) maintains a fixed frequency within the active frequency range of the circuit (10). In addition, a variable load impedance (36) coupled to the circuit (10) generates a load pole (64) within the active frequency range of the circuit (10) that changes frequency over time. As the load pole (64) changes frequency, the frequency of the movable zero (66) is adjusted to achieve an enhanced stability condition within the circuit (10). In one embodiment, the frequency of the movable zero (66) tracks the frequency of the load pole (64) as the load impedance (36) changes.

Abstract: In conventional cases, when connecting a capacitor having a low equivalent series resistance (ESR) to an output terminal of a semiconductor device as a phase compensation capacitor, an external resistor connected in series therewith is required. A semiconductor device of the present invention comprises a resistor that is formed within the semiconductor device and of which one end is connected to the output terminal for compensating for a low ESR component, and a capacitor connection terminal to which another end of the resistor is connected. The resistor thus arranged compensates for the low ESR component of a low-ESR capacitor that is connected externally to the capacitor connection terminal.

Abstract: It is an object of the present invention to disclose a fully differential OTA. The active loads in the two output branches of the OTA show high conductance at low frequency and low conductance at higher frequency. In this way an OTA is constructed with inherent pass-band. Low frequencies are amplified little or even filtered out. The amplification of input referred offset voltage due to mismatches in transistor pairs is similarly reduced. Complementary, in another embodiment of the invention the OTA is of the low-pass type, i.e. also amplifying DC signals. Both OTA's are very compact and the common mode output voltage regulation is in both cases part of the active load structure.

Abstract: In conventional cases, when connecting a capacitor having a low equivalent series resistance (ESR) to an output terminal of a semiconductor device as a phase compensation capacitor, an external resistor connected in series therewith is required. A semiconductor device of the present invention comprises a resistor that is formed within the semiconductor device and of which one end is connected to the output terminal for compensating for a low ESR component, and a capacitor connection terminal to which another end of the resistor is connected. The resistor thus arranged compensates for the low ESR component of a low-ESR capacitor that is connected externally to the capacitor connection terminal.

Abstract: An operational amplifier includes an input transconductor stage with differential inputs and an output, an output stage, and at least one intermediate stage connected between the input stage and the output stage so as to form an amplifier chain. The intermediate stage includes a common-emitter bipolar transistor between first and second power supply terminals, and at least one feedback resistor connected between the bipolar transistor emitter and one of the power supply terminals. The intermediate stage also includes at least one feedback capacitance connected between the emitter terminal of the transistor and an output of a next stage.

Abstract: An amplifier comprising an input stage (IPST) having a pair of inputs (INN,INI) for receiving a differential input signal (Vin) and a pair of outputs (CQ6,CQ7) for delivering a differential intermediate signal in response to the differential input signal (Vin); an intermediate stage (INTST) for converting the differential intermediate signal to a non-differential intermediate signal, which intermediate stage (INTST) comprises a current mirror (Q5,R5,Q4,R4) having an input branch (Q5,R5) and an output branch (Q4,R4) for receiving the differential intermediate signal; an output stage (OPST) having an input coupled to the output branch (Q4,R4) and having an output for delivering an output signal (Vout) to an output (OP) of the amplifier; and means for stabilizing the amplifier. The means for stabilizing the amplifier comprises a capacitor (CM2) coupled between the output (OP) of the amplifier and the input branch (Q5,R5), and provides a large bandwidth and low supply voltage amplifier.

Abstract: A magneto-resistive head preamplifier structure has a difference amplifier with cross-coupled transistors configured to cancel the adverse effects on preamplified output signals due to parasitic capacitance associated with the difference amplifier transistors. The cross-coupled transistors extend the useable bandwidth of the preamplifier by substantially reducing internally generated thermal noise.

Abstract: An amplifier output stage including a PNP transistor having an emitter coupled to a power rail and a collector coupled to an amplifier output. The PNP transistor is driven by an NPN transistor having a collector coupled to the base of the PNP transistor. A bias circuit produces a base-emitter voltage across the PNP transistor so that the PNP transistor will conduct a desired quiescent current. The bias circuit has an effective output impedance which is sufficiently large to form a pole in combination with a frequency compensation capacitor coupled to the collector of the PNP transistor, with the pole being located at a frequency beyond the unity-gain frequency of the amplifier.

Abstract: A cascode amplifier integrated circuit (IC) with a relatively fast transient fall response (i.e., short transient fall response time) and, therefore, relatively fast operation. The cascode amplifier IC includes a bias input terminal configured to receive a bias potential Vb, a power supply input terminal configured to receive a power supply voltage Vcc, an input signal terminal configured to receive an input voltage signal Vin, and an output signal terminal. The cascode amplifier IC also includes a gain stage circuit with a plurality of interconnected bipolar transistors and an output buffer stage circuit configured. The cascode amplifier integrated circuit further includes a discharge circuit configured to discharge stray capacitance at a node of the output buffer stage circuit.

Abstract: An amplifier circuit comprises a first amplifier stage controlling a second gain stage which is coupled between a voltage input node and an output node. A frequency compensating circuit is coupled between a compensating circuit node of the gain stage and a control input of the gain stage. The gain stage comprises first and second output devices arranged such that for a given gate voltage, the output current from the first device is greater than the output current from the second device. The output devices have a common source coupled to the input node and a common gate coupled to the first amplifier stage. The drain of the first output device is coupled to the output node and the drain of the second output device is coupled to the compensating circuit node with a resistance device connected between the two drains.

Abstract: A monitoring circuit is provided. The monitoring circuit can be used to monitor signals in a cable network. The monitoring circuit includes first and second stages. The first stage has an input and an output. The input is coupled to an external circuit. The first stage scales a voltage received at its input. The second stage is coupled to the output of the first stage. The second stage has a high input impedance and a low output impedance. The second stage buffers a signal at the output of the first stage to an output of the second stage.

Abstract: An apparatus comprising an analog circuit, a passive circuit and a first circuit. The analog circuit may be configured to vary a voltage of an output signal in response to a first signal. The passive circuit may be configured to further vary the voltage. The first circuit may be configured to further vary the voltage. The first circuit generally comprises a parasitic capacitance. The passive circuit and the first circuit are generally coupled in series.

Abstract: A multistage operational amplifier includes a transconductor input stage, an output stage, and an intermediate stage. A first Miller capacitor is connected between the input and the output of the intermediate stage. A second Miller capacitor is connected between the input of the intermediate stage and an output of the output stage. A current mirror is connected to the output from the intermediate stage to draw a current therefrom.

Abstract: An amplifier slew rate boosting scheme for use with an amplifier having a closed-loop gain equal to or very near unity has one plate of a compensation capacitor conventionally coupled to an internal high impedance gain node, but has the other plate of the compensation capacitor unconventionally driven with a buffered version of the input signal. The voltage appearing across the compensation capacitor in response to changes in the input signal is significantly less than that achieved using conventional compensation architectures where the other plate of the compensation capacitor is coupled to an AC ground. Since very little current is required to charge the compensation capacitor, the tail current generated by the input stage can be used instead to charge parasitic capacitances within the amplifier to increase the slew rate.

Abstract: A folded-cascode amplifier (30) having a small signal gm being boosted and transferred from the input stage to the output stage to reduce current consumption and expand bandwidth. The amplifier has a pair of second amplifiers (A) operating as boosting amplifiers that provide a pole at its output node, which is at a fairly low frequency. A compensation scheme is employed to introduce a zero to cancel out this pole, and as a side benefit, another zero is brought in which is used to cancel out a second pole of the original folded-cascode amplifier so that bandwidth is actually expanded. Two compensation capacitors (C1, C2) serve two purposes, one, providing a dominant pole to the main amplifier due to a Miller Effect, where the value of the two capacitors are much smaller than for conventional folded-cascode amplifiers, and two, introduce two zeros which cancel out two high frequency poles so that bandwidth is expanded.

Abstract: A cascaded amplifier is integrated within an integrated circuit with a cascaded ground bus. The cascaded ground bus provides two ground points at opposite ends. Each amplifier ground of each amplifier stage couples to the ground wire there between. The cascaded ground bus substantially reduces the parasitic inductance in the emitter leg of each IC transistor within each amplifier. The lay out of the cascaded ground bus wire is tightly coupled to the lay out of the input wires so that their respective parasitic inductances are magnetically coupled together to form a mutual inductance. The mutual inductance effectively cancels the effect of the ground return inductance due to them being similar inductance values and having the same ground loop current flowing through them in opposite directions.

Abstract: An amplifier circuit comprises a first amplifier stage (2) controlling a second gain stage (15) which is coupled between a voltage input node (14) and an output node (5). A frequency compensating circuit (10,12) coupled between a compensating circuit node (18) of the gain stage (2). The gain stage (15) comprises first and second output devices (16, 17) arranged such that for a given gate voltage, the output current from the first device (16) is greater than the output current from the second device (17). The output devices (16,17) have a common source coupled to the input node (4) and a common gate coupled to the first amplifier stage (2). The drain of the first output device is coupled to the output node (5) and the drain of the second output device (17) is coupled to the compensating circuit node (18) with a resistance device (19) connected between the two drains.

Abstract: The present invention regards a class AB single-stage operational amplifier comprising an input decoupler stage for voltage signals, a voltage repeater stage, biasing means and means for the generation of bias current of said input decoupler stage, and is characterized in that said single-stage class AB operational amplifier has capacitive means placed between said voltage decoupler stage and said voltage repeater stage so as to increase the phase margin.

Abstract: The present invention improves the stability and enhances the gain of amplifiers, particularly transistor amplifiers, by using mutual inductive coupling to partially cancel feedback current. Inductors at the input and output of an amplifier are positioned so that a mutual inductance is created between the two inductors. The mutual inductance is used to cancel the inherent capacitive feedback of transistor amplifiers. The use of mutually coupled inductors allows a large value of effective inductance to be obtained by using relatively small inductors. The use of mutually coupled inductors also avoids the problem of low-frequency instability.

Abstract: A class AB operational amplifier has first and second intermediate differential nodes respectively driving intermediate stage inverting and non-inverting amplifiers to produce a single-ended output voltage, which are provided with a frequency compensating feedback signal at a selected one of the first and second intermediate differential nodes, derived from the single-ended output of the operational amplifier subject to frequency compensation. The frequency compensating feedback signal is generated with the feedback circuitry. The feedback circuitry includes a compensation capacitor connected to the single-ended output and a current mirror circuit connected to the selected one of the first and second intermediate differential nodes of the operational amplifier.

Abstract: A method and apparatus for a variable gain amplifier has a well-regulated common mode output. The invention has particular applications to CMOS integrated circuits and has other applications. In a specific embodiment, the invention is used with a regulated voltage source that has good stability over a wide bandwidth of load changes.

Abstract: A chopper-stabilized telescopic differential amplifier circuit with an input signal switching matrix and an output signal switching matrix. Complementary nonoverlapping chop control signals for the switching matrices cause the inverse and noninverse input and output terminals of the circuit to alternately connect to the inverse and noninverse terminals of the internal differential amplifier. Common mode feedback is also provided in the form of synchronized switched capacitances coupling the output terminals of the circuit to a bias circuit for the internal differential amplifier. The internal differential amplifier includes a secondary bias circuit which maintains respective portions of the two circuit branches of the differential amplifier in constantly on bias states.

Abstract: An ultra low voltage CMOS, class AB power amplifier has internal compensation using only parasitic gate capacitance.

Abstract: An interface device is disposed between an optoelectronic sensor and a load the impedance of which is lower than that of the sensor. The interface device comprises an impedance adaptation stage, comprising a distributed amplifier with a broad band of frequencies, the input of which is directly connected to a terminal of the sensor, and constitutes an impedance with an ohmic value which is greater than that of the load, and the output of which is connected to the load. The device additionally comprises a bootstrap which comprises a field-effect transistor mounted in a common drain, the gate of which is connected to a terminal of the sensor, and the source of which is connected to the other terminal of the sensor, via a capacitor with a selected value.

Abstract: A feed-forward compensated negative feedback circuit comprises an operational amplifier having an inverting and a non-inverting input and an output. A feedback element is connected between the output of the operational amplifier and its inverting input to form a negative feedback loop. The inverting input of the op-amp is driven with a first transconductance amplifier which produces an output current proportional to an input voltage. A feed-forward transconductance amplifier receives the input voltage and produces an inverted output current proportional to the input voltage. A feed-forward current is injected at the output of the operational amplifier. By providing at the output of the op-amp the current it would be required to carry over the feedback loop, a voltage differential at the op-amp inputs is avoided, thus eliminating parasitic current flows across the parasitic input capacitance and thereby improving the circuits overall performance.

Abstract: The present invention improves the stability and enhances the gain of amplifiers, particularly transistor amplifiers, by using mutual inductive coupling to partially cancel feedback current. Inductors at the input and output of an amplifier are positioned so that a mutual inductance is created between the two inductors. The mutual inductance is used to cancel the inherent capacitive feedback of transistor amplifiers. The use of mutually coupled inductors allows a large value of effective inductance to be obtained by using relatively small inductors. The use of mutually coupled inductors also avoids the problem of low-frequency instability.

Abstract: A circuit for modifying the impedance of a subject circuit includes a driving impedance element having an impedance characteristic which is substantially proportional to the impedance characteristics of the subject circuit. The circuit of the present circuit further includes a voltage controlled voltage source circuit which is coupled to the driving impedance element to proportionally add or subtract current from the applied subject circuit. The voltage controlled voltage source circuit provides a given voltage to the combined subject circuit and driver impedance element that is effectively proportional to the voltage potential difference across the subject circuit, thereby providing an enhanced effective impedance for the subject circuit.

Abstract: The invention provides a stabilized integrated transimpedance amplifier comprising: an amplifier integrated on a substrate, coupling capacitors integrated into the amplifier substrate, the amplifier being adapted to have open loop amplification characteristics that compensate for changes in the capacitance of the capacitors with supply voltage of the amplifier.

Abstract: Inclusion of a current mirror circuit and differential amplifier in the input amplifier stage 10 and a current mirror circuit in the feed-forward amplifier stage 12 of the nested transconductance capacitance compensation multistage amplifier design provides a low-voltage multistage amplifier having less sensitivity to power supply voltage while retaining frequency domain advantages. The nested transconductance capacitance compensation multistage amplifier includes an input differential amplifier stage 10, a feed-forward amplifier stage 12, and an output amplifier stage 14. This design improves the power supply rejection of the multistage operational amplifier.

Abstract: An operational amplifier includes an operational amplification means having a phase compensation capacitor, an active element connected in series to the phase compensation capacitor and having a variable resistance value, and a differential control means for changing the resistance value of the active element on the basis of a difference voltage between inputs to the operational amplification means, whereby stable operation and high-speed operation are realized.

Abstract: A differential amplifier having high gain, short settling time and capable of low voltage operation. A differential transistor pair is connected to an active load which includes two or more casocode connected transistor pairs. Gain boosting amplifiers are connected between the gate and source of one of the load pair so as to increase the effective impedance of the load pair thereby increasing the gain. A compensation capacitor is connected between the gate of each load transistor and the drain of the other load transistor, with the drains having equal and opposite voltage swings. During amplifier slewing, a charge is transferred to and from the gate of the load transistors by way of the compensation capacitors thereby reducing the output settling time.

Abstract: A rail-to-rail output circuit synthesizes a constant product output characteristic by replicating the current through a pull-up transistor and utilizing a translinear loop to drive a complementary pull-down transistor responsive to the replicated current. A smaller replication transistor shares a common V.sub.BE with the pull-up transistor so as to generate a scaled replication current that is proportional to the current through the pull-up transistor. The replication transistor is coupled to the base of the pull-down transistor through a bias circuit that forms a fast translinear loop with the pull-down transistor. An emitter follower transistor sevoes the loop so that the product of the currents through the pull-up and pull-down transistors is proportional to the square of a bias current. To reduce the turn-off time of the pull-down transistor, a second replication transistor is be connected with its base-emitter junction sharing the V.sub.

Abstract: An operational amplifier having an input stage including a differential transistor pair and an output stage receiving an output of the input stage for outputting an output signal having a wide output range. The input stage includes a field effect transistor connected in parallel to a constant current source for the differential transistor pair and having a gate connected to receive a level-shifted signal of an output of the input stage, so that when the output signal of the output stage changes, the field effect transistor is turned on so as to supplying an additional bias current to the differential transistor pair in addition to a bias current supplied by the constant current source, so that the slew rate of the output signal of the output stage is elevated.

Abstract: A compensated amplifier, for amplifying an input signal applied to an input node to provide an output signal at an amplifier output node. The compensated amplifier includes a first amplifier stage having an internal node as an input thereto and having a first stage output node. Also included is a second amplifier stage coupled to the first amplifier stage, having the input node as an input thereto and providing the output signal at the amplifier output node. A capacitor is coupled between the output node and the internal node.

Abstract: A circuit for modifying the impedance of a subject circuit includes a driving impedance element having an impedance characteristic which is substantially proportional to the impedance characteristics of the subject circuit. The circuit of the present circuit further includes a voltage controlled voltage source circuit which is coupled to the driving impedance element to proportionally add or subtract current from the applied subject circuit. The voltage controlled voltage source circuit provides a given voltage to the combined subject circuit and driver impedance element that is effectively proportional to the voltage potential difference across the subject circuit, thereby providing an enhanced effective impedance for the subject circuit.

Abstract: A low-noise wide band preamplifier (10) provides an output voltage signal (V.sub.O) corresponding to the variation in resistance of a sensor such as Magneto-resistive (MR) head (4) which is used to read the data stored on a magnetic media. In this preamplifier, a transistor (12) and resistor (13) combination is used to function as a transimpedance amplifier (11) to increase the frequency bandwidth of the preamplifier and reduce the noise. The transimpedance amplifier (11) takes its input from an input transistor (3) coupled between the MR head (4) and a current source (2). A biasing circuit formed by a transconductance amplifier (12) and a capacitor (5) is used to control the input transistor (3) so that the average current passing through the input transistor (3) matches the current provided by the current source (2).