Including Plural Amplifier Channels Patents (Class 330/295)
  • Patent number: 8521221
    Abstract: A dual mode RF transceiver is provided. The dual mode RF transceiver comprises an antenna, a differential low noise amplifier (LNA), a local oscillator and a dual mode differential mixer. The differential LNA receives an RF signal from the antenna to generate a differential amplified RF signal. The dual mode differential mixer comprises a switch module, a plurality of fundamental mixers and a plurality of sub-harmonic mixers. The fundamental mixers are activated in a first receiving mode to generate a first differential baseband signal according to a multiphase local oscillating (LO) signal from the local oscillator and the differential amplified RF signal. The sub-harmonic mixers are activated in a second receiving mode to generate a second differential baseband signal according to the multiphase LO signal from the local oscillator and the differential amplified RF signal. An RF signal receiving method is disclosed herein as well.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: August 27, 2013
    Assignee: National Taiwan University
    Inventors: Shey-Shi Lu, Hsien-Ku Chen
  • Patent number: 8519795
    Abstract: A high frequency power amplifier includes: a first transistor for amplifying an input high-frequency signal; a second transistor for amplifying an output signal of the first transistor; a third transistor connected in parallel with the first transistor and for amplifying the input high-frequency signal; a first switching element connected between an output of the first transistor and an input of the second transistor; a second switching element connected between an output of the third transistor and the first switching element; third and fourth switching elements connected in series between the output of the first transistor and an output of the second transistor, and between the second switching element and the output of the second transistor; and a first capacitor connected between the third switching element and the fourth switching element.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 27, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shintaro Watanabe, Kazuhiro Iyomasa, Hiroaki Maehara, Jun Takaso
  • Publication number: 20130214867
    Abstract: A power amplifier device includes an input terminal for a RF input signal. The power amplifier device includes an output terminal a RF output signal. The power amplifier device includes a first power amplifier connected to the input terminal, amplifies the RF input signal with a first gain, and outputs a first amplified signal. The power amplifier device includes a second power amplifier that amplifies a signal on the basis of the first amplified signal and outputs a second amplified signal with a second gain. The power amplifier device includes a low-pass filter or a band-pass filter that filters the second amplified signal. The power amplifier device includes an amplitude comparator to compare the first amplitude of the first comparison signal generated from the RF input signal with the second amplitude of the second comparison signal generated from the filtered signal and to output an amplitude comparison signal.
    Type: Application
    Filed: September 5, 2012
    Publication date: August 22, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shouhei KOUSAI
  • Publication number: 20130214866
    Abstract: The present invention discloses a power amplifier tube and a power amplification method, wherein, the power amplifier tube includes a High Voltage Heterojunction Bipolar Transistor (HVHBT) power amplifier die and a Lateral Double-Diffused Metal-Oxide Semiconductor (LDMOS) power amplifier die, and the HVHBT power amplifier die and the LDMOS power amplifier die are integrated in the same package. The present invention is applied to a Doherty amplifier, which designs a power tube by using a breakthrough new power amplifier die combination, and can achieve high efficient power amplification on the basis of ensuring a small volume of the power amplifier tube, compared with the existing Doherty amplifiers each of which uses the LDMOS power amplifier die.
    Type: Application
    Filed: October 27, 2011
    Publication date: August 22, 2013
    Applicant: ZTE CORPORATION
    Inventors: Gang He, Huazhang Chen, Xiaojun Cui
  • Publication number: 20130207726
    Abstract: In an amplification device, an amplification unit has a transistor and amplifies a signal that is input. A control unit applies, when a power source is turned on, a pinch-off voltage to a gate of the transistor before applying a drain bias voltage to a drain of the transistor and then applies a gate bias voltage to the gate of the transistor.
    Type: Application
    Filed: December 15, 2012
    Publication date: August 15, 2013
    Applicant: Fujitsu Limited
    Inventor: Fujitsu Limited
  • Patent number: 8508299
    Abstract: There is a need to provide a high-frequency power amplifier capable of reducing a talk current and reducing a phase deviation in output. The high-frequency power amplifier includes differently sized first through fifth power amplification transistors and impedance matching circuits for example. The high-frequency power amplifier changes a signal path to be used in accordance with a power specification signal. The high-frequency power amplifier uses a signal path from the first transistor to the second transistor in high power mode. The high-frequency power amplifier uses a signal path from the first transistor to the third transistor in medium power mode. The high-frequency power amplifier uses a signal path from the fourth transistor to the fifth transistor in low power mode. The high-frequency power amplifier is configured so that each of the signal paths includes the same number of stages of power amplification transistors and impedance matching circuits.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: August 13, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Takayuki Kawano, Kenta Seki, Satoshi Sakurai
  • Patent number: 8508296
    Abstract: A quadrature amplifier comprises first and second amplifiers, each having an input and an output, a signal splitter connected to the inputs of the two amplifiers, a signal combiner connected to the outputs of the two amplifiers, and an impedance transformer connected to the output of the signal combiner. The signal splitter is a ?3 dB hybrid that splits an input signal into two output signals of equal amplitude that are in phase quadrature. The signal combiner is a ?3 dB hybrid that combines the output signals at the outputs of the two amplifiers. Since the output signals are in phase quadrature, the signals are combined to produce an inphase signal. The impedance transformer matches the output signal to an impedance of approximately 50 Ohms. Capacitive and resistive tuning networks connected to the ports of the signal combiner allow for adjustment of the center frequency and impedance of the signal combiner.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: August 13, 2013
    Assignee: Anadigics, Inc.
    Inventors: Omar Mustafa, Dirk Robert Walter Leipold
  • Patent number: 8508295
    Abstract: A amplifier that obtains an output by power combining, comprising; a distribution circuit that distributes an input signal into two signals; a first amplifier circuit that amplifies one of the two signals distributed by the distribution circuit and operates in class AB mode; a second amplifier circuit that amplifies the other of the two signals distributed by the distribution circuit and operates in class B or C mode; a lumped constant circuit that connects outputs of the first and second amplifier circuits; a first impedance transformation circuit connected to an output of the first amplifier circuit; a second impedance transformation circuit connected to an output of the second amplifier circuit, and a quarter wavelength impedance transformation circuit with one end thereof connected to a combining point of output sides of the first and second impedance transformation circuits and with the other end thereof connected to a load (FIG. 1).
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: August 13, 2013
    Assignee: NEC Corporation
    Inventor: Koji Matsunaga
  • Publication number: 20130196714
    Abstract: The embodiments of the present invention have disclosed a power amplifier, an asymmetric Doherty power amplifier device and a base station. In the embodiments of the present invention, different radio frequency power amplifier channels are integrated within a component to form a power amplifier, thus reducing the discreteness between the different radio frequency power amplifier channels in such a way that a test and a selection are performed during production, and avoiding the occurrence of a situation that performance can not be controlled as the component discreteness between the different radio frequency power amplifier channels can be only found during application in the prior art. Since the power amplifier is a single component, a lower discreteness can be guaranteed during application, which is helpful to improve the performance of the ADPA circuit.
    Type: Application
    Filed: March 14, 2013
    Publication date: August 1, 2013
    Applicant: Huawei Technologies Co., Ltd.
    Inventor: Huawei Technologies Co., Ltd.
  • Publication number: 20130195289
    Abstract: The power amplifying apparatus includes a first comparator that compares the first detection signal and the fourth detection signal and outputs a first comparison signal depending on whether or not a difference between the first current and the fourth current is equal to or greater than a first predetermined value. The power amplifying apparatus includes a second comparator that compares the second detection signal and the third detection signal and outputs a second comparison signal depending on whether or not a difference between the second current and the third current is equal to or greater than a second predetermined value.
    Type: Application
    Filed: June 5, 2012
    Publication date: August 1, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira YAMAUCHI, Hiroyuki TSURUMI
  • Patent number: 8497738
    Abstract: A broadband power combining method comprises the steps of converting desired voltage or current relation over a specified frequency band to specified polynomial transfer equation; steps of formulating the said specified polynomial transfer equation and extracting the coefficients of the denominator polynomial functions; steps of comparing the said voltage/current transfer function in first step with the design goal to decide if the design criteria is met; and a multiple-device power combining amplifier using same method is presented. This invention presents an automated method for the designing high power multiple-device amplifier based on a compact, robust and easily extendable combining circuit-synthesis method.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: July 30, 2013
    Inventor: Yaohui Guo
  • Patent number: 8493152
    Abstract: A power amplifier comprises a plurality of primary inductors provided on a substrate in a circular geometry as a whole; a plurality of amplifier pairs; a secondary inductor; and a connection wiring. Each amplifier pair is coupled to two ends of a corresponding primary inductor, and amplifies and output to the corresponding primary inductor a pair of first and second signals given as differential input signals, respectively. The secondary inductor is provided adjacent to the primary inductors in a circular geometry, further combines and outputs signals made by combining first and second signals in each primary inductor. The connection wiring is provided inside the primary inductors on the substrate and electrically couples middle points of respective primary inductors with each other.
    Type: Grant
    Filed: September 15, 2012
    Date of Patent: July 23, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tsuyoshi Kawakami, Akihiko Furukawa, Satoshi Yamakawa
  • Patent number: 8487703
    Abstract: An integrated radiofrequency amplifier with an operational frequency includes first and second Doherty amplifiers each having a main device, and a peak device connected at respective inputs and outputs by respective phase shift elements configured to provide a 90 degree phase shift at the operational frequency. An input of the amplifier is connected to the input of the main device of the first Doherty amplifier, an output of the amplifier is connected to the outputs of the peak devices of the first and second Doherty amplifiers and the input of the peak device of the first Doherty amplifier is connected to the input of the main device of the second Doherty amplifier by a phase shift element providing a 90 degree phase shift at the operational frequency.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: July 16, 2013
    Assignee: NXP B.V.
    Inventor: Igor Blednov
  • Patent number: 8482353
    Abstract: A combination amplifier, in particular a Doherty amplifier allowing dynamic biasing, is provided, the combination amplifier comprising a first amplifier (3,3a,3b) having a first input terminal (11,11a,11b) and a first output terminal (25,25a,25b); a second amplifier (5,5a,5b) having a second input terminal (27,27a,27b) and a second output terminal (29,29a,29b); a first impedance inverter (Li, 43b) connected between the first input terminal and the second input terminal; and an envelope detector (33,33a,33b) comprising a detector output terminal and a detector input terminal which is connected to the first output terminal.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: July 9, 2013
    Assignee: NXP B.V.
    Inventor: Igor Blednov
  • Patent number: 8482348
    Abstract: One embodiment of the present invention relates to a power amplifier comprising a plurality of amplifying elements connected in a serial-parallel matrix configuration, containing parallel columns having amplifying elements connected in series. The parallel columns are connected to a common output path coupled to a supply voltage source configured to provide an equal supply voltage to each of the columns. One or more input signals (e.g., RF input signals) are connected to the power amplifier by way of input terminals on a first row of amplifying elements. The remaining amplifying elements have control terminals that are connected to independent control signals, which allow each amplifying element to be operated independent of the other amplifying elements in the matrix. This selective operation of amplifying elements allows for improved efficiency over a wide range of power amplifier output powers.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: July 9, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Sandro Pinarello, Jan-Erik Mueller
  • Publication number: 20130169367
    Abstract: An active circulator for a microwave system. The microwave system includes at least one front-end arrangement. Each front-end arrangement includes a power amplifier function arranged to deliver an amplified output signal via a circulator function to an antenna in a transmit mode. A low noise amplifier function is arranged to amplify an input signal from the antenna via the circulator function in a receive mode. The circulator function is arranged to direct a signal flow between the transmit and receive modes. Each front-end arrangement includes one active circulator. The active circulator includes the power amplifier function, the low noise amplifier function and the circulator function of directing a signal flow. The functions integrated into one module. Also, a method to manufacture the active circulator.
    Type: Application
    Filed: June 18, 2010
    Publication date: July 4, 2013
    Applicant: SAAB AB
    Inventors: Hans-Olof Vickes, Joakim Nilsson
  • Publication number: 20130169366
    Abstract: A Doherty amplifier includes a carrier amplifier including a first FET, the first FET having a plurality of gate electrodes, and a peaking amplifier including a second FET, the second FET having a plurality of gate electrodes, a gate-to-gate interval of the gate electrodes of the second FET being shorter than a gate-to-gate interval of the first FET.
    Type: Application
    Filed: February 27, 2013
    Publication date: July 4, 2013
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
  • Patent number: 8471638
    Abstract: An amplifier includes a Doherty amplifier composed of a distributor distributing an input signal to two signals, a carrier amplifier that receives one of the two signals and has a first FET, a peaking amplifier that receives the other one of the two signals and has a second FET, and a combiner that transforms an output impedance of the carrier amplifier and combines outputs of the carrier amplifier and the peaking amplifier, and a voltage controller that changes at least one of a gate voltage and a drain voltage supplied to at least one of the first FET and the second FET in accordance with a frequency of the input signal when the frequency of the input signal varies.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: June 25, 2013
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventor: Hiroaki Deguchi
  • Publication number: 20130154745
    Abstract: There is provided a clipping circuit in which a first input terminal receives a first signal, a second input terminal receives a second signal, a first variable resistive element has a control terminal electrically connected to the second input terminal and has a threshold, first and second ends of the first variable resistive element are connected to first input terminal and a reference voltage, respectively, the second variable resistive element has a control terminal electrically connected to the first input terminal and has a threshold, first and second ends thereof are connected to a second input terminal and the reference voltage, respectively, a first bias applying unit applies a bias voltage lower than the threshold to the control terminal regarding the first variable resistive element, and a second bias applying unit applies a bias voltage lower than the threshold to the control terminal regarding the second variable resistive element.
    Type: Application
    Filed: December 10, 2012
    Publication date: June 20, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kohei ONIZUKA
  • Patent number: 8466746
    Abstract: A three-stage GaN HEMT Doherty power amplifier for high frequency applications includes: a carrier amplifier; first and second peaking amplifier; a 10-dB power divider configured to divide an input signal to the carrier amplifier and the first and second peaking amplifiers; a first path for controlling input power of the carrier amplifier; and a second path for maintaining an efficiency of 40% or more in an output range of 40 dBm to 50 dBm.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: June 18, 2013
    Assignee: Postech Academy-Industry Foundation
    Inventors: Yoon Ha Jeong, Mun Woo Lee, Sang Ho Kam
  • Patent number: 8465432
    Abstract: In an example embodiment, a method for bidirectional signal propagation comprises: a) sensing a voltage level of a first signal at a first port; b) coupling the first port to an output of an amplifier with a solid state switch if the voltage level of the first signal is less than a threshold voltage, whereby a second signal applied to a second port coupled to an input of the amplifier is propagated in a first direction from the second port to the first port; and c) bypassing the amplifier if the voltage level of the first signal is greater than the threshold voltage such that the first signal is propagated in a second direction from the first port to the second port.
    Type: Grant
    Filed: September 5, 2010
    Date of Patent: June 18, 2013
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Luigi Franchini, Diego Maiocchi, Roberto Amadio
  • Publication number: 20130141166
    Abstract: A power amplifier tube and a power amplification method are disclosed in the present invention. The power amplifier tube includes a high voltage heterojunction bipolar transistor (HVHBT) power amplifier tube core and a high electron mobility transistor (HEMT) power amplifier tube core, and the HVHBT power amplifier tube core and the HEMT power amplifier tube core are integrated in the same encapsulation. In the present invention, it should be configured as a Doherty amplifier, and the power tube is designed in a breakthrough combination manner of new power amplifier tube cores, compared with all the existing Doherty amplifiers which employ LDMOS power amplifier tube cores, the power amplification with high efficiency can be achieved on the basis of ensuring small volume of power amplifier tube.
    Type: Application
    Filed: October 27, 2011
    Publication date: June 6, 2013
    Applicant: ZTE CORPORATION
    Inventors: Gang He, Huazhang Chen, Xiaojun Cui
  • Patent number: 8456238
    Abstract: A traveling wave amplifier includes a tapered attenuator network for mitigating the effects of DC bias inductor self-resonance. The amplifier includes a gain stages connected in a ladder network for successively amplifying a forward traveling wave caused by an input signal to produce an output signal. A back termination is coupled to the gain stages to absorb backwards traveling waves created by reflections from the gain stages and an output of the amplifier. An inductive DC bias circuit is coupled to the gain stages near the back termination for providing DC bias to the gain stages. A tapered multi-section frequency selective attenuator network is connected between the DC bias circuit and a first one of the gain stages for reducing the effect of self-resonance of the inductive DC bias circuit on the output signal.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: June 4, 2013
    Assignee: Centellax, Inc.
    Inventors: Jeffrey W. Meyer, Jerry Orr
  • Patent number: 8456241
    Abstract: Aspects of the disclosure provide an amplifier. The amplifier includes a first path, a second path and a drain bias circuit. The first path includes a first transistor that operates in a saturation region to generate a first current in response to an input signal. The first current has a first polarity third-order coefficient. The second path includes a second transistor that generates a second current in response to the input signal. The drain bias circuit is configured to bias a drain terminal of the second transistor separately from the first transistor such that the second transistor operates in a linear region to generate the second current having a second polarity third-order coefficient. The second current is combined with the first current to reduce a third-order inter-modulation in the combined current.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: June 4, 2013
    Assignee: Marvell International Ltd.
    Inventors: Poh Boon Leong, Ping Song
  • Patent number: 8456239
    Abstract: A power amplifier, which includes n+1 amplifying units coupled in parallel, where n is an integer greater than or equal to 0, third input ends VR(i) of the n+1 amplifying units are coupled to a power input VL, output ends D(i) of the n+1 amplifying units are coupled to a power input VH, and an output power of the power amplifier is in an increasing function relationship with a capacitance value obtained through accumulation of energy returning capacitors xC of the n+1 amplifying units. The power amplifier changes circuit impedance in a manner of controlling the parallel capacitance value by a switching digital signal, thereby controlling a magnitude of a returned power value and forming different output powers.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: June 4, 2013
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Jian Ou
  • Publication number: 20130135052
    Abstract: Radio frequency (RF) power amplifier (PA) circuitry and a PA envelope power supply are disclosed. The RF PA circuitry receives and amplifies an RF input signal to provide an RF output signal using an envelope power supply signal, which is provided by the PA envelope power supply. The RF PA circuitry operates in either a normal RF spectral emissions mode or a reduced RF spectral emissions mode. When reduced RF spectral emissions are required, the RF PA circuitry operates in the reduced RF spectral emissions mode. As such, at a given RF output power, during the reduced RF spectral emissions mode, RF spectral emissions of the RF output signal are less than during the normal RF spectral emissions mode. As a result, the reduced RF spectral emissions mode may be used to reduce interference between RF communications bands.
    Type: Application
    Filed: May 24, 2012
    Publication date: May 30, 2013
    Applicant: RF MICRO DEVICES, INC.
    Inventor: Roman Zbigniew Arkiszewski
  • Patent number: 8451062
    Abstract: This disclosure is directed to techniques for preventing or reducing perturbations of an output signal of a differential amplifier caused by ionizing radiation incident upon the amplifier. The amplifier may include an amplification module that includes a plurality of amplification units configured to amplify a difference between a first component and a second component of a differential voltage signal to generate a plurality of amplified difference signals each corresponding to the amplified difference. The amplifier may further include a combination module that combines the plurality of amplified difference signals to generate a common output signal corresponding to the amplified difference.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: May 28, 2013
    Assignee: Honeywell International Inc.
    Inventors: James D. Seefeldt, Keith Golke
  • Publication number: 20130130750
    Abstract: A multi-mode power amplifier includes a high-power mode amplifier circuit, a mid-power mode amplifier circuit, and a low power amplifier circuit, where the low-power mode amplifier circuit comprises a plurality of independently selectable power cell/amplifier branches. The multi-mode power amplifiers selectively enable or disable amplifier branches to provide multiple levels of amplification. Selectively enabling certain of a plurality of split collector amplifier branches provides multiple low power and ultra-low power amplifier modes without the impedance mismatch or board layout problems associated with an RF switch.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 23, 2013
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventor: Skyworks Solutions, Inc.
  • Publication number: 20130127542
    Abstract: A Doherty amplifier (100) is described which comprises an input terminal (102) for receiving an input signal (101) and an output terminal (103) for providing an amplified signal (104) of the input signal (101). The Doherty amplifier is supplied by a first supply voltage and a second supply voltage which have opposite polarities in respect to a reference level.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 23, 2013
    Inventor: Lothar Schmidt
  • Publication number: 20130127543
    Abstract: A power amplifier includes an input terminal into which an input signal is input; a first amplification element amplifying the input signal; a second amplification element amplifying an output signal of the first amplification element; an output terminal from which an output signal of the second amplification element is output; a first matching circuit connected between an output of the second amplification element and the output terminal; a first switch connected between an output of the first amplification element and an input of the second amplification element; a second switch having a first end connected to the output of the first amplification element, and a second end; and a second matching circuit having a first end connected to the second end of the second switch, and a second end directly connected to the output of the second amplification element.
    Type: Application
    Filed: August 20, 2012
    Publication date: May 23, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Yoshinobu SASAKI
  • Patent number: 8446218
    Abstract: A power amplifier is provided, which includes a power dividing unit, a first power amplification tributary, a second power amplification tributary, and an impedance conversion unit. Input ends of the first power amplification tributary and the second power amplification tributary are coupled to two output ends of the power dividing unit respectively. An output end of the first power amplification tributary is coupled to an output end of the second power amplification tributary through the impedance conversion unit. Rated power of a peak power amplifier in the second power amplification tributary is greater than that of a main power amplifier in the first power amplification tributary. The beneficial effects of the present invention lie in that larger back-off exists at the peak of an efficiency curve of the power amplifier, and in the case that power is back-off, efficiency of the power amplifier is improved.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: May 21, 2013
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xun Gong, Jie Sun
  • Publication number: 20130120069
    Abstract: According to one embodiment, a high frequency amplifier having a division circuit, FET cells, a stabilization circuit and a combination circuit is provided. The division circuit divides an input signal to produce a plurality of signals. The FET cells amplify the signals produced by the division circuit. The stabilization circuit provided with RC parallel-connected circuits which are respectively connected in series between the division circuit and gates of the FET cells. Each of the RC parallel-connected circuits has a capacitor and a resistor connected in parallel with each other. The combination circuit combines the signals amplified by the FET cells.
    Type: Application
    Filed: July 25, 2012
    Publication date: May 16, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka TAKAGI
  • Patent number: 8441321
    Abstract: The disclosed multi-stage amplifier (200) comprises several amplifier stages (201-203) which, together with an output network, form different branches. A first branch comprises a first and a second amplifier (201, 202) having their outputs connected to each other via a quarter-wave transmission line. The first branch is connected to a load via a first offset-transmission-line (0.1). A second branch comprises a third amplifier stage (203) and a second offset-transmission line (0.22) which are also connected to the load.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: May 14, 2013
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Richard Hellberg
  • Publication number: 20130113569
    Abstract: An operational amplifier can include a plurality of amplifiers connected to form a plurality of amplification paths extending from an input terminal to an output terminal of the operational amplifier. An amplifier in one of the amplification paths can include an intrinsic amplification-transistor capacitance connected between a first amplifier input and a first amplifier output, and a cross-coupling capacitor connected between the first amplifier input and a second amplifier output. A plurality of the amplification paths can include series-connected amplifiers connected in parallel with the cross-coupled amplifier. The cross-coupling capacitor can have a capacitance value selected as a function of the intrinsic capacitance and a gain experienced between the amplifier inputs and outputs. The operational amplifier can include an AC coupling capacitor connected in series with the cross-coupled amplifier. The operational amplifier can be arranged in feedback configuration.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 9, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Hajime SHIBATA, Richard SCHREIER, Wenhua YANG
  • Publication number: 20130106517
    Abstract: The present invention discloses a power amplifier tube and a power amplification method, wherein, the power amplifier tube includes a High Electron Mobility Transistor (HEMT) power amplifier die and a Lateral Double-Diffused Metal-Oxide Semiconductor (LDMOS) power amplifier die, and the HEMT power amplifier die and the LDMOS power amplifier die are integrated in the same package. The present invention should be configured as a Doherty amplifier, which designs a power tube by using a breakthrough new power amplifier die combination, and can achieve high efficient power amplification on the basis of ensuring a small volume of the power amplifier tube, compared with the existing Doherty amplifiers each of which uses the LDMOS power amplifier die.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 2, 2013
    Inventors: Gang He, Huazhang Chen, Xiaojun Cui
  • Patent number: 8432218
    Abstract: A harmonic-rejection power amplifier is disclosed. In an embodiment, the harmonic-rejection power amplifier includes a plurality of stages, each stage comprising a respective signal-generation component coupled to a respective power amplifier, wherein the respective signal-generation component is configured to output a respective signal having a respective phase, and wherein the respective power amplifier is configured to output an amplified version of the respective signal. In the harmonic-rejection power amplifier, each respective phase differs from each other respective phase by a respective amount that is predefined based on a number of stages in the plurality of stages, and the plurality of stages are coupled in parallel to a combiner configured to combine the output of each respective power amplifier into a combined output. At least one harmonic in the combined output may be at least partially rejected.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: April 30, 2013
    Assignee: University of Washington through its Center For Commercialization
    Inventors: Jacques C. Rudell, Parmoon Seddighrad, David J. Allstot
  • Publication number: 20130099866
    Abstract: In accordance with an embodiment, a method of amplifying a plurality of frequency bands includes amplifying a first frequency band and a second frequency band with a main amplifier, amplifying the first frequency band with a first peaking amplifier, amplifying the second frequency band with a second peaking amplifier, and simultaneously load modulating an output of the main amplifier with an output of the first peaking amplifier and with an output of the second peaking amplifier.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 25, 2013
    Applicant: FutureWei Technologies, Inc.
    Inventor: Carl Conradi
  • Publication number: 20130099867
    Abstract: The present invention discloses a Doherty power amplifier apparatus and a power amplification method. The apparatus includes an auxiliary power amplifier apparatus and a main power amplifier apparatus, the auxiliary power amplifier apparatus is used to amplify signal power by adopting a Laterally Diffused Metal Oxide Semiconductor (LDMOS) device; and the main power amplifier apparatus is used to amplify signal power by adopting a High Electron Mobility Transistors (HEMT) device. The present invention adopts the HEMT device as the main power amplifier. Compared with the existing Doherty power amplifier in which both the main power amplifier and the auxiliary power amplifier adopt LDMOS, with the present invention, the power amplifier efficiency of the main power amplifier in the Doherty power amplifier can be enhanced, thereby making the power amplifier efficiency of the whole Doherty power amplifier be substantially increased.
    Type: Application
    Filed: October 27, 2011
    Publication date: April 25, 2013
    Applicant: ZTE CORPORATION
    Inventors: Xiaojun Cui, Huazhang Chen, Bin Duan, Jianli Liu
  • Patent number: 8427231
    Abstract: An amplifying device includes a signal separating unit that separates a first signal and a second signal from an input signal; a first signal-generating unit that generates, based on the first signal, a first cancelling signal that suppresses ringing caused during processing of the first signal; a first combining unit that combines the first signal and the first cancelling signal; a first amplifying unit that amplifies a signal output from the first combining unit; a second signal-generating unit that generates, based on the second signal, a second cancelling signal that suppresses ringing caused during processing of the second signal; a second combining unit that combines the second signal and the second cancelling signal; a second amplifying unit that amplifies a signal output from the second combining unit; and a third combining unit that combines a signal output from the first amplifying unit and one output from the second amplifying unit.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: April 23, 2013
    Assignee: Fujitsu Limited
    Inventor: Toshio Kawasaki
  • Publication number: 20130093534
    Abstract: The present invention is directed to a network that includes an output matching network coupled to an amplifier. The output matching network is configured to transform the at least one amplifier transistor output impedance to an output matching network impedance. A combiner network is coupled to the output matching network. The combiner network includes a first quarter wavelength transmission line coupled between the in-phase signal path and a combiner node. The combiner network further includes a bandwidth enhancement element coupled to the quadrature signal path at the combiner node and an impedance transformation element coupled between the combiner node and a load. The impedance transformation element is configured to substantially transform a combined output matching network impedance at the combiner node to the load impedance.
    Type: Application
    Filed: October 15, 2012
    Publication date: April 18, 2013
    Applicant: Anaren, Inc.
    Inventor: Anaren, Inc.
  • Patent number: 8421539
    Abstract: A power amplifier includes a plurality of amplification paths in which at least one amplification path is selectively enabled and disabled, wherein each amplification path includes an output impedance modification element and an output phase shift element that is operable independently from the output impedance modification element, and wherein the output impedance modification element in each amplification path provides selective impedance for each amplification path.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: April 16, 2013
    Assignee: Skyworks Solutions, Inc.
    Inventors: Guohao Zhang, Shiaw W. Chang, Xuejun Chen, Jing Sun
  • Patent number: 8416022
    Abstract: A power amplifier device that satisfies both delivering a high output and reducing the chip area occupied by the power amplifier device. Over a substrate, are primary inductors arranged in a generally circular geometry, a ground pattern, transistor pairs, and a secondary inductor. The ground pattern extends from a portion of a region inside the circular primary inductor into regions outside the primary inductor, and grounded at a plurality of points in the regions outside the primary inductor. The primary inductors are coupled to the ground pattern through transistors.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: April 9, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tsuyoshi Kawakami, Kazuyasu Nishikawa
  • Patent number: 8416017
    Abstract: A circuit for reducing noise in Class D amplifiers has a power stage voltage control means (17, 21, 22) responsive to defined signal conditions of the audio signal input (1). The power stage voltage control means is operative to lower the voltage at the supply voltage input (31) of the amplifier's switching power output stage (30) upon the detection of a defined condition in the audio signal input such that the Class-D amplifier operates at reduced voltage (“idles”) during the defined audio input signal condition.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: April 9, 2013
    Assignee: Meyer Sound Laboratories, Incorporated
    Inventors: Paul Kohut, Peter L. Winship, Peter Kowalcyzk, Steven Metz, Kurt Keown
  • Patent number: 8416018
    Abstract: A variable frequency amplifier includes a main amplifier system 4 for amplifying one of signals into which an input signal is split by a directional coupler 3 to output the amplified signal, and an injection amplifier system 9 for adjusting at least one of the amplitude and phase of the other one of the signals into which the input signal is split by the directional coupler 3 according to a setting provided thereto from outside the variable frequency amplifier, and for amplifying the other signal and injecting this amplified signal into an output side of the main amplifier system 4.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: April 9, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuhisa Yamauchi, Hidenori Yukawa, Akira Inoue, Atsushi Yamamoto, Koichi Fujisaki, Hiroomi Ueda
  • Patent number: 8416024
    Abstract: An amplifier having an operating frequency includes: an input port and an output port; three gain elements, each having an input terminal and an output terminal; an input matching network; and an output matching network. The input matching network includes: a first microstrip line which is connected to the input port and is an inductor at the operating frequency; a second microstrip line extending between the input terminals of the three gain elements; and a first split shunt capacitor connecting the first microstrip line to the second microstrip line. The output matching network includes: a third microstrip line which is connected to the output port and is an inductor at the operating frequency; a fourth microstrip line extending between the output terminals of the three gain elements; and a second split shunt capacitor connecting the third microstrip line to the fourth microstrip line.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: April 9, 2013
    Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventor: Kohei Fujii
  • Publication number: 20130082783
    Abstract: Power amplifier circuits which constitute an RF power module used for a digital device capable of handling high frequency signals in two frequency bands are disposed over the same IC chip. The power amplifier circuits are disposed around the IC chip, and a secondary circuit is disposed between the power amplifier circuits. Thus, the power amplifier circuits are provided within the same IC chip to enable a size reduction. Further, the distance between the power amplifier circuits is ensured even if the power amplifier circuits are provided within the same IC chip. It is therefore possible to suppress the coupling between the power amplifier circuits and restrain crosstalk between the power amplifier circuits.
    Type: Application
    Filed: November 27, 2012
    Publication date: April 4, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: RENESAS ELECTRONICS CORPORATION
  • Patent number: 8410848
    Abstract: The present disclosures an amplification unit which comprises a first amplifier and a second amplifier connected in parallel, the first amplifier and the second amplifier comprising semiconductor devices that are not the same amplifier design. The present application also discloses a signal input line connected to the first amplifier and the second amplifier. A signal output line is also disclosed which is connected to the first amplifier and the second amplifier.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: April 2, 2013
    Assignee: Apple, Inc.
    Inventors: Gregory Bowles, Martin O'Flaherty, Scott Widdowson, John Ilowski
  • Patent number: 8410853
    Abstract: A bond wire circuit includes at least three bond wires arranged to split an input signal into two output signals. In connection with various example embodiments, bond wires are arranged in a generally parallel manner to mitigate magnetic coupling and related issues for splitting an input signal and providing each of split signals to an amplifier. The bond wires are connected by capacitive circuits that facilitate the splitting, and in some applications, additional capacitive (to ground/reference) and load circuits to further facilitate the splitting of the input signals for specific amplifier circuit implementations, and applications to various loads. In some implementations, the input signals are split in equal or arbitrary portions with frequency independent phase differences in a wide frequency band, with isolation between ports of the circuit.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: April 2, 2013
    Assignee: NXP B.V.
    Inventor: Igor Blednov
  • Publication number: 20130076446
    Abstract: An amplifier circuit includes an RF transistor, a parallel resonator and a series resonator. The RF transistor has an input, an output and an intrinsic output capacitance. The parallel resonator is connected to the output of the RF transistor and includes a first inductive component connected in parallel with the intrinsic output capacitance of the RF transistor. The series resonator connects the output of the RF transistor to an output terminal and includes a second inductive component connected in series with a capacitive component. The series resonator is operable to compensate for a change in impedance of the parallel resonator over frequency.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 28, 2013
    Applicant: INFINEON TECHNOLOGIES NORTH AMERICAN CORP.
    Inventors: Richard Wilson, Saurabh Goel
  • Patent number: 8400215
    Abstract: A power amplification device for a satellite communication device with a redundant configuration, in which a plurality of power amplifiers including a standby power amplifier are connected in a ring shape, and which easily switches connection to the standby power amplifier in a case of a failure in active power amplifiers without closing a detour route. The power amplification device for the satellite communication device includes a plurality of basic units each including: a plurality of power amplifiers including at least one standby power amplifier, which are arranged in parallel; a plurality of switches provided to input ends and output ends of the plurality of power amplifiers for switching connection paths; and bypass connection lines for connecting the plurality of switches in a ring shape, and the plurality of basic units are connected in cascade.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: March 19, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yoshiatsu Machino