Abstract: A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals.

Abstract: A system and method for a package including a wire bond wall to reduce coupling is presented. The package includes a substrate, and a first circuit on the substrate. The first circuit includes a first electrical device, a second electrical device, and a first wire bond array interconnecting the first electrical device and the second electrical device. The package includes a second circuit on the substrate adjacent to the first circuit, the second circuit includes a second wire bond array interconnecting a third electrical device and a fourth electrical device. The package includes a wire bond wall including a plurality of wire bonds over the substrate between the first circuit and the second circuit. The wire bond wall is configured to reduce an electromagnetic coupling between the first circuit and the second circuit during an operation of at least one of the first circuit and the second circuit.

Abstract: An amplifier with improved noise reduction is disclosed. In an exemplary embodiment, an apparatus includes at least one capacitor configured to receive an adjustable current and generate a corresponding ramp voltage configured to control coupling between a main amplifier output and a secondary amplifier output. The apparatus also includes at least one comparator configured to adjust the adjustable current to generate the ramp voltage with selected ramp-up or ramp-down voltage characteristics.

Abstract: A Doherty amplifier has at least one peaking amplifier which has first and second drain connections, wherein the first drain connection is connected to the output network, and the other second drain connection is connection to the load. By providing two drain connections, separate package leads to the peaking amplifier can be taken into account when designing the impedance inverter and an output impedance. In this way, the circuit operation can be optimised both for the impedance inversion function and for driving the output load.

Abstract: A microwave integrated circuit includes a substrate and a power amplifier on the substrate. The power amplifier includes a power divider circuit having an input configured to receive an input RF signal, a base amplifier having an input coupled to a first output of the power divider circuit and a peaking amplifier having an input coupled to a second output of the power divider circuit and an output coupled to an output combining node. The power amplifier further includes an impedance inverter circuit coupling the output of the base amplifier to the output combining node and a load matching circuit having an input coupled to the output combining node and an output configured to be coupled to a load.

Abstract: In a power amplifier, in response to a power mode signal at a predetermined level, a first switch circuit supplies a signal to first and second amplifier devices that perform parallel operations. In response to the power mode signal at another level, the first switch circuit supplies a signal to the first amplifier device and stops supplying the signal to the second amplifier device such that the first amplifier device performs a standalone operation. One end of an impedance adjusting circuit is connected to a connection node between the outputs of the first and second amplifier devices, the other end of the impedance adjusting circuit is connected to one end of a second switch circuit, and the other end of the second switch circuit is connected to a ground potential. The impedance adjusting circuit includes a reactance element.

Abstract: This invention provides a voltage controlled variable gain amplifier circuit that varies its gain linearly and continuously against a gain control voltage VC. The voltage controlled variable gain amplifier circuit includes a first differential amplifier, a second differential amplifier, a gain control voltage/current conversion circuit and a reference current generation circuit. The first differential amplifier and the second differential amplifier are connected in series. The gain control voltage/current conversion circuit converts the gain control voltage VC into a gain control current IC that varies linearly against the gain control voltage VC. Drain currents Id1 and Id2 of first and second differential input transistors vary linearly against the gain control current IC.

Abstract: Radio frequency (RF) amplification devices are disclosed that include Doherty amplification circuits and methods of operating the same. In one embodiment, a Doherty amplification circuit includes a main carrier RF amplifier, a peaking RF amplifier, and a periodic quadrature coupler. To provide Doherty amplification, the peaking RF amplifier is configured to be deactivated while an RF signal is below a threshold level and is configured to be activated while the RF signal is above the threshold level. The periodic quadrature coupler is configured to combine a first RF split signal from the main carrier RF amplifier and a second RF split signal from the peaking RF amplifier into the RF signal, such that the RF signal is output from an output port while the peaking RF amplifier is activated. The periodic quadrature coupler allows the Doherty amplification circuit to provide broadband amplification in various RF communication bands.

Abstract: An amplifier circuit is disclosed for providing a radio frequency output signal having a variable signal envelope, comprising a main amplifier device and an auxiliary amplifier and a combiner network for combining an output signal from said first amplifier device and a second output signal from said second amplifier device to provide a combined output signal of variable signal envelope to a load, and a signal processing circuit comprising an input and a non-linear processing section to provide at least said second radio frequency output signal with a signal envelope that has a non-linear dependency from an amplitude characteristic of the input signal such that the degree of non-linearity of the non-linear dependency varies dependent on the amount of change per time unit of the amplitude characteristic of the input signal. Further, a method of power amplifying a radio frequency signal having a variable signal envelope is disclosed.

Abstract: A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material.

Abstract: There is provided an amplifier circuit. The amplifier circuit includes an amplifying unit including at least one transistor; at least one first bias circuit unit including a resistor and connected to the at least one transistor; and at least one second bias circuit unit connected between an input terminal to which an input signal is applied and the at least one transistor so as to block an input signal having a frequency higher than a first frequency or having a frequency lower than a second frequency. The amplifier circuit according to embodiment of the present invention may prevent thermal runaway, remove a harmonic component from an input signal to be amplified and suppress oscillations.

Abstract: An amplifier in Doherty configuration includes a circuit (32) having a delay line consisting of a constant-impedance transmission line (12) and a device (10) adapted to vary the electric length of the transmission line (12). The device (10) includes a metallic body (14) with an outer wall (16) and an inner wall (22) adapted to define a cavity (20). The walls (16,22) define a slot (24).

Abstract: An outphasing amplification apparatus includes: a signal decomposition unit for decomposing an input signal into a first signal and a second signal having predetermined amplitude values, respectively; a first amplification element for amplifying the first signal, and output a first amplification signal; a second amplification element for amplifying the second signal, and output a second amplification signal; and a combiner for combining the first amplified signal and the second amplified signal, wherein the combiner includes a first input transmission line having an impedance converter, a second input transmission line not having an impedance converter, and a combination unit configured to combine a signal produced by the first amplification signal passing through the first input transmission line to have been subjected to impedance conversion by the impedance converter, and a signal produced by the second amplification signal passing through the second input transmission line not having been subjected to imp

Abstract: Power-dividing and/or power-combining circuits have inputs, outputs, at least three electrical pathways, and at least three electronic devices, such as amplifiers, with substantially equal input and output reflection At least one of the electronic devices is in each of the electrical pathways. In one embodiment, multiple phase shift components, such as delay lines, are electrically connected to the electronic devices in each of the electrical pathways. These phase shift components are selected so that a vector sum of the reflected signals from the electronic devices to the inputs and/or the outputs is substantially minimized. In another embodiment, a serial bus extends from the inputs/outputs and at least three pathways in the circuit.

Abstract: A power amplifier circuit (DIPPA), comprising a driver stage (DR) which is applicable to provide a preamplified driver signal (S_DR) dependent on a predetermined transmit signal. The power amplifier circuit (DIPPA) comprises also a frequency selector (DIP) which is electrically coupled to the driver stage (DR) and which is applicable to separate the driver signal (S_DR) into a first and second signal (S—1, S—2). The first signal (S—1) is associated to a first predetermined and the second signal (S—2) is associated to a second predetermined frequency band. The power amplifier circuit (DIPPA) comprises at least a first and second power amplifier stage (PA1, PA2). The first and second power amplifier stage (PA1, PA2) are electrically coupled to the frequency selector (DIP). The first and second power amplifier stage (PA1, PA2) is operable to provide a first and second amplified signal (S_A1, S—2), respectively, dependent on the first and second signal (S—1, S—2), respectively.

Abstract: There are provided a power combiner implemented by a printed circuit board, a power amplifying module having the same, and a signal transceiving module.

Abstract: A Doherty amplifier (1) is described which comprises an input terminal (102) for receiving an input signal (101) and an output terminal (103) for providing an amplified signal (104) of the input signal (101). The Doherty amplifier (1) comprises a carrier amplifier stage (300) with a first signal input (311) and a second signal input (312) and a peak amplifier stage (400) with a third signal input (411) and a fourth signal input (421). A signal splitter (200) splits and delays the input signal (101) so that the signal at the first signal input (311) and the signal at the second signal input (321) are 180° apart in phase and that the signal at the third signal input (421) and the fourth signal input (431) are also 180° apart in phase.

Abstract: A traveling wave amplifier (TWA) with suppressed jitter is disclosed. The TWA includes a plurality of unit amplifiers with the differential arrangement comprised of a pair of transistors and a cascade transistors connected in series to the switching transistors. The unit amplifiers further includes current sources to provide idle currents to the cascade transistors. Even when the switching transistors fully turn off, the idle currents are provided to the cascade transistors, which set the operating point of the cascade transistor in a region where an increase of the base-emitter resistance is suppressed.

Abstract: An amplifier including a high supply voltage source and a low supply voltage source and two parallel signal paths. Each signal path is connected to the high and the low supply voltage sources and includes a first amplifier and a second amplifier. The two signal paths are connected to each other only at a common input node and a common output node, so that the respective first amplifiers operate independently of each other. The first amplifiers are configured to convert at least a part of an input voltage signal into a signal current. The signal paths are configured so that the signal current in use drives the respective second amplifier to provide an amplified output current to the common output node.

Abstract: A system and method of calibrating an amplifier are presented. The amplifier has a first amplification path and a second amplification path. A first state of the amplifier is identified defining a first phase shift of the first path and a second phase shift of the second path resulting in a maximum efficiency of the amplifier when an attenuation of the first path and an attenuation of the second path are set to first attenuation values. The attenuation of the first path and the attenuation of the second path is set to achieve a maximum efficiency of the amplifier when the phase shift of the first path and the phase shift of the second path are set according to the first state.

Abstract: Disclosed is a signal splitting apparatus useable in a power amplifier having two or more power amplifiers. The apparatus includes a direct gain component; and a derived gain component connected to the direct gain component. The derived gain component derives the derived gain by imposing a constraint which is valid over the entire dynamic range of the input signal, e.g. the sum of the power of the direct split signal and the derived split signal are constrained to be substantially equal to the power of the input signal. The use of combining additional direct gain and derived gain components, as well as a delay element, are disclosed so as to enable n-component splitting that for adaptation to different applications by the use of suitable coefficients.

Abstract: A Doherty amplifier has different drain voltages applied to the power transistors of the main and peaking stages. The impedance inverter comprises at least one first series phase shifting element between the output of the main amplifier and the Doherty amplifier output and at least one second series phase shifting element between the output of the peaking amplifier and the Doherty amplifier output. This provides a wideband combiner. The combination of this wideband combiner and different drain drive levels provides an improved combination of efficiency and bandwidth.

Abstract: The present invention provides a new structure of Doherty power amplifier. The present invention reduces use of ¼ wavelength lines and lowers the Q point of the Doherty power amplifier. The present method extends the DPA bandwidth with a simpler and more convenient design and facilitates the design of a narrowed size.

Abstract: A first amplification section and a second amplification section included in an amplification apparatus amplify two constant amplitude signals generated by vector decomposition. An impedance inverting circuit inverts the impedance of the signal amplified by the second amplification section. A combining circuit corrects the phases of the signal amplified by the first amplification section and the signal whose impedance is inverted by the impedance inverting circuit, and combines and outputs these signals. The combining circuit includes a line which is (?/4)+? in length and which is an asymmetrical circuit element and a line which is (?/4)?? in length and which is an asymmetrical circuit element.

Abstract: The present invention is directed to an amplifier system that includes a main amplifier configured to amplify and a peak amplifier that operates only in a high power mode. An impedance matching network is coupled to at least the peak power amplifier. An impedance transformation device is coupled to at least a portion of the impedance matching network. The impedance transformation device is configured as a balun in the high power mode. The balun includes a first input and second input coupled to the main amplifier and the peak amplifier respectively. The impedance transformation device is configured as an unbalanced line impedance transformer in the low power mode because the predetermined output impedance substantially grounds the second input. The Doherty device is characterized by an impedance transformation ratio of at least 4:1 and a relative bandwidth greater than or equal to 40%.

Abstract: Exemplary embodiments are directed to devices and methods for sharing an energy storage element within an electronic device. A device may include a plurality of transmit paths. The device may further include a voltage supply including an energy storage element coupled to each transmit path of the plurality of transmit paths.

Abstract: Embodiments provide a radio frequency (RF) power amplifier (PA) circuit having a high-power mode and a low-power mode. The RF PA circuit may include a high-power amplifier to provide an amplified RF signal on a first path, and a low-power amplifier to provide an amplified RF signal on a second path. The first path and second path may intersect at a junction node. A switch may be coupled between the low-power amplifier and the junction node to switch the circuit between the high-power mode and the low-power mode. A matching circuit may be coupled on the second path to match an output impedance of the low-power amplifier to a junction impedance of the junction node at a fundamental frequency of the RF signal, and to present an open circuit at a third harmonic of the RF signal. The matching circuit may facilitate high efficiency for the RF PA circuit.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: A power amplifier comprising a plurality of primary amplifying channels arranged to each receive an input signal from one or more signal sources for generating a primary amplified output in each of the plurality of primary amplifying channels, a secondary amplifying channel in communication with the one or more signal sources wherein the secondary amplifying channel is arranged to receive one or more signal components each associated with the input signal received by each of the plurality of primary amplifying channels to form a merged input signal for generating a secondary amplified output, and an electric junction arrangement being in electrical communication with the primary amplified output of each of the primary amplifying channels and the secondary amplified output of the secondary amplifying channel.

Abstract: There is disclosed an amplifier arrangement comprising a plurality of amplifiers each arranged to amplify one of a plurality of different input signals, the arrangement comprising an envelope tracking modulator for generating a common power supply voltage for the power amplifiers, and further comprising an envelope selector adapted to receive a plurality of signals representing the envelopes of the plurality of input signals, and adapted to generate an output envelope signal representing the one of the plurality of envelopes having the highest level at a particular time instant as the input signal for the envelope tracking modulator.

Abstract: The output impedance of an amplifier is substantially matched to an input impedance of a receiver using a buffer circuit. The buffer circuit includes a primary transistor and a secondary transistor. A first back gate terminal of the primary transistor is coupled to a second back gate terminal of the secondary transistor and the primary transistor is configured to have an output for the buffer circuit. An input signal is received from the amplifier at a gate terminal of the secondary transistor. The first back gate terminal of the primary transistor is responsively driven independently from the output of the buffer circuit to effectively adjust a transconductance of the primary transistor and substantially match an output impedance of the amplifier with an input impedance of the receiver.

Abstract: A zero-voltage-switching contour based outphasing power amplifier having two class-E power amplifiers connected in an out-phasing architecture coupled on opposite sides of a load being driven. The pair of class-E power amplifiers receive separate digital drive signals with an amount of phase difference that is adjusted based on the load. Variable capacitor arrays are coupled in parallel on the class-E power amplifiers and controlled in response to system parameters including duty cycle of the input signal. Efficiency of the power amplifier is maintained despite variation in output loading.

Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.

Abstract: Embodiments of the present invention include a method and system for control of a multiple-input-single output (MISO) device. For example, the method includes partitioning a waveform constellation space into a plurality of regions, where each region of the plurality of regions is associated with one or more control functions of the MISO device. The method also includes transitioning the MISO device between a plurality of classes of operation based on the one or more control functions.

Abstract: An RF power amplifier circuit is disclosed. A driver amplifier stage includes a first set of a plurality of amplifier transistors in a cascode configuration, a driver amplifier stage input, and a driver amplifier stage output. A final amplifier stage includes a second set of a plurality of amplifier transistors in a cascode configuration, a final amplifier stage input connected to the driver amplifier stage output, a final amplifier stage output, and a power supply input. An envelope signal amplifier has an input connectible to an envelope signal source, and an output capacitively coupled to the power supply input. A power converter input is connected to the power supply input to provide supplemental power to the final amplifier stage based on an envelope signal from the envelope signal source that corresponds to an input RF signal.

Abstract: An amplifier circuit includes a digital amplifier configured to amplify an input signal to output a first output signal, an analog amplifier configured to amplify the input signal to output a second output signal, a check circuit configured to produce a check signal responsive to frequencies of the input signal, and a selector circuit configured to select and output one of the first output signal and the second output signal in response to the check signal.

Abstract: A multi-way Doherty power amplifier, DPA, is disclosed, comprising a first path comprising a carrier amplifier or at least one carrier amplifier segment partitioned from the carrier amplifier; a second to N-th paths each comprising at least one carrier amplifier segment and/or at least one peaking amplifier segment partitioned from a peaking amplifier; and a power splitter for splitting an input power signal to each of the at least one carrier amplifier segment and/or at least one peaking amplifier segment in a same path, wherein N is an integer not less than 2; a signal preparation unit configured for generating separately input power signal for the first path and each of the second path to N-th paths; and an impedance inverting network configured for combining output signal power from each path. The performance of each amplifier cell can be maximized independently without any compromises made for each other.

Abstract: An amplifier circuit is disclosed for providing a radio frequency output signal having a variable signal envelope, comprising a main amplifier device and an auxiliary amplifier and a combiner network for combining an output signal from said first amplifier device and a second output signal from said second amplifier device to provide a combined output signal of variable signal envelope to a load, and a signal processing circuit comprising an input and a non-linear processing section to provide at least said second radio frequency output signal with a signal envelope that has a non-linear dependency from an amplitude characteristic of the input signal such that the degree of non-linearity of the non-linear dependency varies dependent on the amount of change per time unit of the amplitude characteristic of the input signal. Further, a method of power amplifying a radio frequency signal having a variable signal envelope is disclosed.

Abstract: Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.

Abstract: A Ka-band high power amplifier structure having minimum processing and assembling errors, which uses a technique in which input and output waveguide flanges of individual amplifiers which are connected in parallel are connected to a waveguide divider and a waveguide combiner from above, and uses a waveguide transition patch implemented on an interconnect substrate for coupling to the individual amplifier to avoid the use of an input and output connector pin and an interconnector.

Abstract: A high-frequency module includes a wiring substrate including an electrode pattern layer and a via electrode, a plurality of amplifier circuits that are configured to respectively amplify signals in different frequency bands received at the input terminal, and a plurality of matching circuits and a plurality of filter circuits that are provided in correspondence with the respective amplifier circuits and that are connected sequentially to output sides of the respective amplifier circuits. A plurality of signal paths that extend from the output sides of the respective amplifier circuits to the antenna terminal through the corresponding matching circuits and the filter circuits are provided. The electrode pattern layer and the via electrode are grounded and at least one of the electrode pattern layer and the via electrode is arranged between the signal paths.

Abstract: Apparatus are provided for amplifier systems and related integrated circuits are provided. An exemplary integrated circuit includes a main amplifier arrangement, first impedance matching circuitry coupled between the output of the main amplifier arrangement and a first output of the integrated circuit, a peaking amplifier arrangement, and second impedance matching circuitry coupled between the output of the peaking amplifier arrangement and a second output of the integrated circuit. In one exemplary embodiment, the first impedance matching circuitry and the second impedance matching circuitry have different circuit topologies and different physical topologies.

Abstract: A device includes a Doherty amplifier having a main path and a peaking path. The Doherty amplifier includes a main amplifier configured to amplify a signal received from the main path and a peaking amplifier configured to amplify a signal received from the peaking path when the signal received from the peaking path exceeds a predetermined threshold. The device includes a first driver amplifier connected to the main path of the Doherty amplifier. The first driver amplifier is configured to exhibit an amplitude and phase distortion characteristic that is an inverse of an amplitude and phase distortion characteristic of the main amplifier. The device includes a second driver amplifier connected to the peaking path of the Doherty amplifier. The second driver amplifier is configured to exhibit an amplitude and phase distortion characteristic that is an inverse of an amplitude and phase distortion characteristic of the peaking amplifier.

Abstract: One aspect of the present invention provides a method for improving power amplification efficiency of a Doherty power amplifier. The method is applied to a Doherty power amplifier that has two paths of Doherty circuit units connected in parallel. The method includes: when output power of the Doherty power amplifier is within a low out power range, adjusting, by a bias circuit, gate voltages of main power amplifiers and peak power amplifiers in the two paths of Doherty circuit units connected in parallel, in order to cause the peak power amplifiers to be in an off state, and the main power amplifiers in the two paths of Doherty circuit units connected in parallel to be in a main power amplification state and a peak power amplification state respectively.

Abstract: A clipping circuit includes: a first input terminal which receives a first signal, a second input terminal which receives a second signal, and a first variable resistive element which has a control terminal electrically connected to the second input terminal and which has a threshold, wherein first and second ends of the first variable resistive element are connected to first input terminal and a reference voltage, respectively. The clipping circuit also includes a second variable resistive element which has a control terminal electrically connected to the first input terminal and which has a threshold, wherein first and second ends of the second variable resistive element are connected to a second input terminal and the reference voltage, respectively.

Abstract: Disclosed is a class D amplifier comprising a modulation stage having a first input for receiving an input signal and an output for producing a modulated version of the input signal; a plurality of power stages, each power stage being responsive to said modulation stage and comprising a first switch and a second switch coupled in series between a first voltage source and a second voltage source, each power stage comprising an output node between the first switch and the second switch; and a power stage control circuit for measuring the input signal level and enabling a selected number of the power stages as a function of the measured input signal level. A method for controlling such a class D amplifier is also disclosed.

Abstract: An amplification stage comprising: a combiner to generate a sum input signal by combining a voltage signal with a DC bias voltage; a subtractor to generate a difference input signal by subtracting the voltage signal from the DC bias voltage; a first transistor for generating a first part of an amplifier output signal from the sum input signal; a second transistor for generating a second part of an amplifier output signal from the difference input signal; a combiner for combining the first and second parts of the amplifier output signal; a sensing circuit arranged to sense a current flowing in each of the first and second transistors; a control circuit arranged to determine the quiescent current of the first and second transistors in dependence on the sensed currents; and an adjustment circuit arranged to adjust the DC bias voltage in order to minimize variation in the quiescent current.

Abstract: A power amplifier, includes: a first and a second amplifier circuits that are controlled so that one of them do not amplify a signal when another one of them amplifies the signal; a first impedance conversion circuit, coupled between the first amplifier circuit and the output terminal, that converts an output impedance of the first amplifier circuit; a second impedance conversion circuit, coupled between the second amplifier circuit and a wiring coupling the first impedance conversion circuit and the output terminal, that converts an output impedance of the second amplifier circuit; and a connection circuit that, when the first amplifier circuit amplifies the signal, forms a path which bypasses the second impedance conversion circuit between a reference potential and the wiring coupling the first impedance conversion circuit and the output terminal, by coupling a wiring coupling the first amplifier circuit and the output terminal, with the reference potential.

Abstract: A multipath power amplifier device, configured to operate in a high power mode and a low power mode, includes a high power path, a low power path and an output switch. The high power path includes a high power mode (HPM) amplifying circuit for amplifying an input signal in the high power mode. The low power path includes a low power mode (LPM) amplifying circuit for amplifying the input signal in the low power mode. The output switch is configured to isolate the low power path from the high power path in the high power mode.

Abstract: An amplifier device having an extended bandwidth includes a DC coupled amplifier and multiple low noise amplifiers connected in series with one another and connected in parallel with at least a portion of the DC coupled amplifier. The DC coupled amplifier has a broad bandwidth, and each of the low noise amplifiers has a narrow bandwidth and a center frequency higher than a high end frequency of the broad bandwidth of the DC coupled amplifier. The extended bandwidth of the amplifier device is a combination of the broad bandwidth and the first narrow bandwidth.