Abstract: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.

Abstract: Multiple-Input-Single-Output (MISO) amplification and associated VPA control algorithms are provided herein. According to embodiments of the present invention, MISO amplifiers driven by VPA control algorithms outperform conventional outphasing amplifiers, including cascades of separate branch amplifiers using conventional power combiner technologies. MISO amplifiers can be operated at enhanced efficiencies over the entire output power dynamic range by blending the control of the power source, source impedances, bias levels, outphasing, and branch amplitudes. These blending constituents are combined to provide an optimized transfer characteristic function.

Abstract: Power amplifiers and methods of coating a protective film of alumina (Al2O3) on the power amplifiers are disclosed herein. The protective film is applied through an atomic layer deposition (ALD) process. The ALD process can deposit very thin layers of alumina on the surface of the power amplifier in a precisely controlled manner. Thus, the ALD process can form a uniform film that is substantially free of free of pin-holes and voids.

Abstract: A power amplifying device includes earth parts which are connected with via holes for grounding, source electrode earth conductors which connect the earth parts, source electrodes which are coupled to the source electrode earth conductors, an inner source electrode which is not in contact with the source electrode earth conductors, a drain electrode, a gate electrode and an air bridge which directly connects the inner source electrode and earth parts.

Abstract: An integrated circuit comprises a GaAs substrate thermally and mechanically mounted on a SiC substrate. The GaAs substrate is doped to define first and second transistors. Circuit conductors are defined on the GaAs substrate, which conductors interconnect the source of the first transistor to neutral and the drain to the source of the second transistor. Conductors connect the gate of the second transistor to neutral, to define a cascode amplifier. The SiC substrate supports first and second matching circuits, one of which is connected to the gate of the first transistor, and the other of which is connected to the drain of the second transistor.

Abstract: Multiple-Input-Single-Output (MISO) amplification and associated VPA control algorithms are provided herein. According to embodiments of the present invention, MISO amplifiers driven by VPA control algorithms outperform conventional outphasing amplifiers, including cascades of separate branch amplifiers using conventional power combiner technologies. MISO amplifiers can be operated at enhanced efficiencies over the entire output power dynamic range by blending the control of the power source, source impedances, bias levels, outphasing, and branch amplitudes. These blending constituents are combined to provide an optimized transfer characteristic function.

Abstract: A monolithic microwave integrated circuit (MMIC) includes a transistor, coupled line and multiple air bridges. The coupled line is configured to output a coupled signal from the transistor, the coupled line running parallel to a drain of the transistor. The air bridges connect the drain of the transistor with a bond pad for outputting a transistor output signal, the bridges being arranged parallel to one another and extending over the coupled line. The air bridges and the coupled line effectively provide coupling of the transistor output signal to a load.

Abstract: Disclosed are devices and methods for improving power added efficiency and linearity of radio-frequency power amplifiers implemented in flip-chip configurations. In some embodiments, a harmonic termination circuit can be provided so as to be separate from an output matching network configured to provide impedance matching at a fundamental frequency. The harmonic termination circuit can be configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. Such a configuration of separate fundamental matching network and harmonic termination circuit allows each to be tuned separately to thereby improve performance parameters such as power added efficiency and linearity.

Abstract: A reference buffer amplifier within an integrated circuit includes a first output terminal connected to a first bond pad, the first bond pad being connected to a first external pin of the integrated circuit chip, the first external pin to allow an external capacitance to be connected to the output terminal. The reference buffer further includes a variable, settable resistance sub-circuit connected to a second bond pad, the second bond pad also being connected to the first external pin. The resistance sub-circuit is configured to be set to exhibit a resistance value to critically dampen a response of the reference buffer amplifier.

Abstract: Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

Abstract: There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.

Abstract: According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.

Abstract: This disclosure relates to a packaged radio frequency (RF) power transistor that includes an internal input impedance matching circuit adapted to achieve an impedance at the input lead of the package substantially higher at the input terminal of a RF power device. In particular, the internal input impedance matching circuit includes an inductive element coupled in series with a resistive element between the input terminal of the RF power device and ground. The inductance element is adapted to counter the inherent capacitance at the input terminal of the RF power device in order to substantially increase the effective input impedance of the device. The resistive element is adapted to reduce the variation of the effective input impedance of the RF power device in order provide acceptable input impedance matching across wider frequency bandwidths.

Abstract: A monolithic microwave integrated circuit (MMIC) includes a transistor, coupled line and multiple air bridges. The coupled line is configured to output a coupled signal from the transistor, the coupled line running parallel to a drain of the transistor. The air bridges connect the drain of the transistor with a bond pad for outputting a transistor output signal, the bridges being arranged parallel to one another and extending over the coupled line. The air bridges and the coupled line effectively provide coupling of the transistor output signal to a load.

Abstract: This disclosure relates to a harmonic termination circuit that is separate from a load line. In one embodiment, the load line is configured to match an impedance at the power amplifier output at a fundamental frequency of the power amplifier output and the harmonic termination circuit is configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. According to certain embodiments, the load line and the harmonic termination circuit can be electrically coupled to the power amplifier output external to a power amplifier die via different output pins of the power amplifier die.

Abstract: Aspects of the present disclosure relate to a current multiplier that can generate an output current with high linearity and/or high temperature compensation. Such current multipliers can be implemented by complementary metal oxide semiconductor (CMOS) circuit elements. In one embodiment, the current multiplier can include a current divider and a core current multiplier. The current divider can generate a divided current by dividing an input current by an adjustable division ratio. The division ratio can be adjusted, for example, based on a comparison of the input current with a reference current. The core current multiplier can generate the output current based on multiplying the divided current and a different current. According to certain embodiments, the output current can be maintained within a predetermined range as the input current to the current divider varies within a relatively wide range.

Abstract: In one embodiment, the present invention includes an amplifier having a transistor stage coupled between a supply voltage and a bias current. The transistor stage has an input to receive a radio frequency (RF) input signal obtained from an antenna. The amplifier has an input impedance that is unmatched to a source impedance of the antenna. In some embodiments, this unmatched input impedance may be substantially greater than the source impedance, and may further be controlled based on a strength of the RF input signal.

Abstract: In one embodiment, the present disclosure includes a circuit comprising an amplifier having an input and an output, an offset detection circuit to detect an offset of the amplifier at the output of the amplifier, and an offset generation circuit having an input coupled to the offset detection circuit and an output coupled to the input of the amplifier to generate an offset at the input of the amplifier during an operational phase of the amplifier based on the detected offset. The generated offset cancels a least a portion of the offset of the amplifier. In one implementation, the amplifier is a sense amplifier in a memory.

Abstract: Power amplifier circuits which constitute an RF power module used for a digital device capable of handling high frequency signals in two frequency bands are disposed over the same IC chip. The power amplifier circuits are disposed around the IC chip, and a secondary circuit is disposed between the power amplifier circuits. Thus, the power amplifier circuits are provided within the same IC chip to enable a size reduction. Further, the distance between the power amplifier circuits is ensured even if the power amplifier circuits are provided within the same IC chip. It is therefore possible to suppress the coupling between the power amplifier circuits and restrain crosstalk between the power amplifier circuits.

Abstract: A radio frequency amplifier circuit includes a substrate that is capable of receiving a substrate bias voltage. The source of a transistor is capable of receiving a source bias voltage. The drain of the transistor is capable of receiving a drain bias voltage. The gate of the transistor is located between the source and the drain. A radio frequency input signal is coupled to the gate. A substrate bias circuit provides the substrate bias voltage. The substrate bias voltage and the source bias voltage forward bias the first diode formed by the source and the substrate. The substrate bias voltage and the drain bias voltage reverse bias the second diode formed by the drain and the substrate.

Abstract: Embodiments of amplifiers with depletion and enhancement mode thin film transistors are disclosed herein. Other examples, devices, and related methods are also disclosed herein.

Abstract: Embodiments of the invention are concerned with configurable RFICs. In an exemplary embodiment there is provided a configurable radio-frequency integrated circuit (RFIC) including one or more configurable low noise amplifier circuits, each of said one or more configurable low noise amplifier circuits being configurable between: an internal input impedance matching topology in which the respective low noise amplifier circuit includes one or more internal input impedance matching components adapted to match the input impedance of the respective low noise amplifier to a given input, said one or more internal input impedance matching components being located internally to the respective low noise amplifier circuit; and a topology different from said internal input impedance matching topology.

Abstract: Power amplifiers and methods of coating a protective film of alumina (Al2O3) on the power amplifiers are disclosed herein. The protective film is applied through an atomic layer deposition (ALD) process. The ALD process can deposit very thin layers of alumina on the surface of the power amplifier in a precisely controlled manner. Thus, the ALD process can form a uniform film that is substantially free of free of pin-holes and voids.

Abstract: Apparatus and methods for electronic amplification are disclosed herein. In certain implementations, an amplifier is provided for amplifying a RF signal, and the amplifier includes a first transistor and a second transistor electrically connected in a Darlington configuration. The first and second transistors can be, for example, bipolar or field effect transistors and the first transistor can amplify an input signal and provide the amplified input signal to the second transistor. The first and second transistors are electrically connected to a power low node such as a ground node through first and second bias circuits, respectively. In certain implementations, the first transistor includes an inductor disposed in the path from the first transistor to the power low voltage. By including the inductor in the path from the first transistor to the ground node, the third order distortion of the amplifier can be improved.

Abstract: Embodiments of circuits, apparatuses, and systems for a flip-chip power amplifier and impedance matching network are disclosed. Other embodiments may be described and claimed.

Abstract: A power amplifier according to the embodiments includes: a silicon substrate; an input terminal configured to receive an input of a RF signal; a power dividing unit configured to divide the RF signal into a first signal and a second signal; a phase modulating unit configured to modulate a phase of the second signal; an N well formed in the silicon substrate; a P well formed in the N well and configured to receive an input of the second signal of a modulated phase; a gate insulating film formed on the P well; a gate electrode formed on the gate insulating film and configured to receive an input of the first signal; source and drain electrodes formed on both sides of the gate electrode in the silicon substrate; and an output terminal configured to output a RF signal obtained from the drain electrode.

Abstract: An RF power amplifier is disclosed that has improved input matching or reduced return losses over a wider frequency range. The amplifier includes an input impedance matching network, a resistive element, a transistor, and an output impedance matching network. The resistive element is coupled between the input impedance matching network and the input of the transistor. The resistive element is configured to lower the quality factor (Q) of the input impedance matching network. This has the effect of reducing the input impedance variation over a given frequency range. As a result, the overall impedance matching over the given frequency range is improved, thereby reducing the input return losses. This allows the RF power amplifier to be used in wider bandwidth applications.

Abstract: A power circuit includes a power device, an output match network and a bypass network. The output match network is coupled to an output of the power device and includes a blocking capacitor which forms part of a high quality factor RF path of the output match network. The output match network is operable to provide a range of impedance matching over a signal bandwidth and a low frequency gain peak outside the signal bandwidth which corresponds to a low frequency resonance of the high quality factor RF path. The bypass network is coupled in parallel with the blocking capacitor of the output match network. The bypass network is operable to attenuate the low frequency gain peak while maintaining the high quality factor RF path.

Abstract: According to an embodiment, a power amplifier includes: an MMIC substrate; a high frequency probe pad disposed on the MMIC substrate; and a metal plate disposed on the MMIC substrate so as to adjoin to the high frequency probe pad, and connected to an MMIC external circuit via a bonding wire.

Abstract: According to one embodiment, a semiconductor integrated circuit has a transconductance circuit, a first load circuit, and a second load circuit. The transconductance circuit has a first current generator configured to generate a first current depending on an input voltage, and a second current generator configured to generate a second current depending on the input voltage. The first load circuit has a first load configured to output a first output voltage depending on the first current from a first output terminal. The second load circuit has a second load configured to output a second output voltage depending on the second current from a second output terminal. At least one of the transconductance circuit, the first load circuit and the second load circuit comprises an impedance adjusting module configured to adjust impedance.

Abstract: A semiconductor device includes a semiconductor chip in which an internal circuit is formed, with the internal circuit having an output signal that fluctuates due to variation of fluctuation in electrical characteristics of multiple circuit elements constituting the internal circuit; a chip tab on which the semiconductor chip is mounted, with the semiconductor chip completely overlapping the chip tab and the circuit elements in the semiconductor chip arranged on the chip tab, and encapsulation resin within which the semiconductor chip and the chip tab are sealed. A horizontal surface area of the chip tab is smaller than that of the semiconductor chip, and a distance between a periphery of the chip tab and a periphery of the semiconductor chip is sufficient to cause stress exerted on the semiconductor chip by the encapsulation resin to be uniform across the horizontal surface area of the chip tab.

Abstract: In general, in accordance with an exemplary aspect of the present invention, an electrical system configured to use power combining of microwave signals, such as those from monolithic microwave integrated circuits or MMICs is provided. In one exemplary embodiment, the system of the present invention further comprises a low loss interface that the circuits are directly connected to. In another exemplary embodiment, the circuits are connected to a pin which is connected to the low loss interface. In yet another exemplary embodiment of the present invention, a multi-layer power amplifier is provided that comprises two or more chassis and circuits attached to impedance matching interfaces according to the present invention. This multi-layered power amplifier is configured to amplify an energy signal and have a significantly reduced volume compared to existing power combiners.

Abstract: An integrated circuit transimpedance amplifier arrangement constituted of: a plurality of internal matched resistors; a current multiplier arranged to output a signal whose value is a function of an input current signal, an external resistor and a first set of the plurality of internal matched resistors; and an output transimpedance amplifier coupled to the output of the current multiplier, the output transimpedance amplifier exhibiting a gain whose value is a function of a second set of the plurality of internal matched resistors, wherein the output of the output transimpedance amplifier is a function of the input current signal, the external resistor, the first set of the plurality of internal matched resistors and the second set of the plurality of internal matched resistors, wherein the variations with temperature of the first set of the plurality of internal matched resistors and the second set of the plurality of internal matched resistors cancel.

Abstract: According to one embodiment, a class-C power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being less than ?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?/2)?sin(1.5·?o)/3), or each of the variables is set thereto so as to become equal substantially.

Abstract: A class-AB power amplifier according to the present embodiment includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1, load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2, and load impedance of a 3rd harmonic being expressed as Z3=R3+j?X3 which are observed from a dependent current source of an equivalent circuit of the amplifying element, and a relationship between variables X1 and R1 is set to ?0.5·R1<=X1<=0.5·R1, variable R1 is set to R1=Vdc/Imax·{1?cos(?o/2)}·?/{?o/2?sin(?o)/2}, variable X2/X1 is set to X2/X1=?2·{?o?sin(?o)}/{ sin(?o/2)?sin(1.5·?o)/3}, and variable X3/X1 is set to X3/X1={?o?sin(?o)}/{ sin(?o)/3?sin(2·?o)/6}, or each of the variables is set thereto so as to become equal substantially.

Abstract: Power amplification devices are disclosed having a vertical ballast configuration to prevent thermal runaway in at least one stack of bipolar transistors formed on a semiconductor substrate. To provide a negative feedback to prevent thermal runaway in the bipolar transistors, a conductive layer is formed over and coupled to the stack. A resistivity of the conductive layer provides an effective resistance that prevents thermal runaway in the bipolar transistors. The vertical placement of the conductive layer allows for vertical heat dissipation and thus provides ballasting without concentrating heat.

Abstract: An integrated circuit for providing programmable microphone interface includes an input terminal for receiving an input signal and an output terminal for providing an output audio signal. In an embodiment, the integrated circuit includes a bias circuit, an amplifier circuit and two feedback circuits. The amplifier circuit includes a first input, a second input, and an output. The first input receives either the input signal or a feedback signal, depending upon mode control signals. The second input receives either the feedback signal or the input signal depending upon the mode control signals. The first feedback circuit is in communication with the output and the first input of the amplifier and includes a first resistor and a first capacitor connected in parallel. The second feedback circuit includes an integrator circuit and provides the feedback signal. The mode control signals can be set in a programmable mode control register.

Abstract: An amplifier output impedance matching configuration including a first impedance transformer and one or more second impedance transformers. The first impedance transformer receives input signals from a power amplifier and generates output signals to a load. The one or more second impedance transformers are connected between the first impedance transformer and the load through which the output signals are passed.

Abstract: Embodiments of amplifiers with depletion and enhancement mode thin film transistors are disclosed herein. Other examples, devices, and related methods are also disclosed herein.

Abstract: A low noise amplifier includes a first Group III-nitride based transistor and a second Group III-nitride based transistor coupled to the first Group III-nitride based transistor. The first Group III-nitride based transistor is configured to provide a first stage of amplification to an input signal, and the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal.

Abstract: Power source noises of a digital amplifier arising from regenerative current of an inductor of a low pass filter is reduced. A semiconductor integrated circuit includes: a digital amplifier, a driver; and a charge pump unit which is supplied with a positive operating voltage and generates a positive power supply voltage and a negative power supply voltage. An output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor. The charge pump unit includes a first switch through a sixth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node. Regenerative current which flows between the filter capacitor and the positive power supply voltage or the negative power supply voltage is absorbed by the second capacitor, by controlling the sixth switch to an on state.

Abstract: The invention relates to an integrated Doherty amplifier with an input network connecting the input to the main stage and to the peak stage, and with an output network connecting the main stage and the peak stage to the output. The output network has a shunt capacitor to signal-ground in parallel to a parasitic capacitance of the main stage, and has a shunt inductor between the main stage and signal ground. The shunt configuration enables to use the MMIC Doherty amplifier in a wide frequency range. At least some of the inductors of the input network and/or output network are implemented using bond wires. Their orientations and locations provide minimal mutual electromagnetic coupling between the wires and the return RF current paths.

Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies, which is desirable.

Abstract: An apparatus on a single integrated circuit (IC) die includes a multiple stage power amplifier having at least first and second stages, a multiple stage voltage regulator for providing a regulated voltage signal to the at least first and second stages of the multiple stage power amplifier, a power coupler for providing a portion of a power output of the multiple stage power amplifier to a power detector, the power detector for developing a power detect signal, and a power control loop including at least the second stage and an output stage of the multiple stage power amplifier, the power coupler, the power detector, and at least one stage of the multiple stage voltage regulator, the power control loop controlling only the second stage and the output stage of the multiple stage power amplifier.

Abstract: The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.

Abstract: An amplifier (1) includes an analogue-to-digital converter (ADC) (7) and a switched capacitor output stage (8). The ADC (7) converts an analogue signal into a digital signal containing a sequence of symbols. The switched capacitor output N stage (8) charges and discharges a capacitor to produce charge pulses at an output (3). During discharge, switches selectively couple the capacitor to the output (3) in opposite directions to produce charge pulses of opposing polarity. The values of the symbols in the digital signal are used to decide the polarity of charge pulses. In this manner, amplification can be achieved without introducing a direct current (DC) component to the signal at the output (3).

Abstract: The apparatus and method thereof accurately sense and convert a radio frequency (RF) current signal to direct current (DC) independent of process variation and temperature, and without requiring high speed, high voltage amplifiers for its operation. The apparatus comprises an AC coupled circuit that couples the RF signal from the main device to a sense device with an N:M ratio, a low pass filter system that extracts the DC content of the RF current signal, and a negative feedback loop that forces the DC content of the main device and the sensed device to be equal. Exemplary embodiments include a current sensor that provides feedback to protect an RF power amplifier from over-current condition, and a RF power detection and control in a RF power amplifier (PA) that multiplies the sensed output current by the sensed output voltage to be used as a feedback to control the PA's bias.

Abstract: A presented semiconductor integrated circuit, which processes an RF signal, achieves preferable distortion characteristics even at the low supply voltage. It includes an attenuator configured to attenuate an input signal with a variable attenuation, a source follower configured to receive an output of the attenuator, and an amplifying unit configured to perform a filtering process on an output of the source follower, and then amplify the output of the source follower with a variable gain.

Abstract: A semiconductor device includes a semiconductor chip with first and second low noise amplifier for amplifying an inputted signal. The chip is mounted over a wiring substrate which includes first and second electrodes and first, second and third GND electrodes. The wiring substrate includes first and second conductor patterns, wherein the first conductor pattern electrically connects the first and second GND electrodes and surrounds the first and second electrodes in a plan view. The second conductor pattern electrically connects the first conductor pattern and the third GND electrode to each other and is arranged between the first and second electrodes in the plan view. The first conductor pattern extends toward an inside of the semiconductor chip from the first and second GND electrodes in the plan view.

Abstract: A high frequency amplifier includes a package substrate, an amplifying active device disposed on a top surface of the package substrate, a transmission line connected to the amplifying active device and transmitting a high frequency signal, a surface mounted device (SMD) component shunt-connected at a first end to the transmission line, a SMD component terminal connected to a second end of the SMD component and partially exposed at a back surface of the package substrate, and an external terminal partially exposed at the back surface of the package substrate and connected to a first end of the transmission line, opposite a second end of the transmission line that is connected to the amplifying active device.