Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

Abstract: The present invention provides a single chain power amplifier for a multi-mode and/or multi band wireless communication. The power amplifier comprise switchable input, inter-stage and output matching networks as well as active periphery adjustable driver stage power device and power stage power device. Switches and bias are configured for each frequency band and/or wireless communication standard. A driver stage power device, switches, control and bias circuitry, input matching, inter-stage matching and a part of output matching is fabricated on CMOS Silicon On Insulator process (SOI), while a power stage power device maybe fabricated by Gallium Arsenide (GaAs) processing.

Abstract: This photodetecting circuit 1 is capable of suppressing oscillation of an output, and operates as a zero bias circuit in a case of a small photoelectric current to an extent that a dark current is concerned about, and limits an output current in a case of a large photoelectric current to an extent that troubles are caused in the circuit operation. Because a resistive element TR2 is provided in the photodetecting circuit 1, even when a modulation frequency of light, in other words, a frequency of a photoelectric current I flowing in a photodiode PD is made higher, oscillation can be suppressed. Further, due to the resistive element TR2 being inserted, this functions as a limiter as well, and a bias voltage to be applied to the photodiode PD is made to be a positive bias voltage, which prevents an excess current from being generated to suppress abnormal operations of the circuit.

Abstract: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

Abstract: A high frequency amplifier includes a package substrate, an amplifying active device disposed on a top surface of the package substrate, a transmission line connected to the amplifying active device and transmitting a high frequency signal, a surface mounted device (SMD) component shunt-connected at a first end to the transmission line, a SMD component terminal connected to a second end of the SMD component and partially exposed at a back surface of the package substrate, and an external terminal partially exposed at the back surface of the package substrate and connected to a first end of the transmission line, opposite a second end of the transmission line that is connected to the amplifying active device.

Abstract: There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.

Abstract: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.

Abstract: An amplifier circuit on a single die comprises a low voltage amplifier with a first common mode voltage and having an input and an output. A power amplifier has a second common mode voltage whose input is operably coupled to an output of the low voltage amplifier. The first common mode voltage and second common mode voltage are unequal. A compensation circuit is operably coupled to an input of the power amplifier and arranged to inject a DC-current or apply a common mode voltage into the power amplifier that is representative of a difference between the first common mode voltage and the second common mode voltage.

Abstract: A high-frequency input circuit. The input circuit includes an input node, a bond pad, and a signal conversion resistor coupled in series between the input node and the bond pad to convert substantially all of a signal voltage at the input node to a signal current at the bond pad.

Abstract: A high frequency amplifier includes a package substrate, an amplifying active device disposed on a top surface of the package substrate, a transmission line connected to the amplifying active device and transmitting a high frequency signal, a surface mounted device (SMD) component shunt-connected at a first end to the transmission line, a SMD component terminal connected to a second end of the SMD component and partially exposed at a back surface of the package substrate, and an external terminal partially exposed at the back surface of the package substrate and connected to a first end of the transmission line, opposite a second end of the transmission line that is connected to the amplifying active device.

Abstract: A method and system for utilizing the heat dissipated by quiescent IC leakage currents to control the start-up temperature of components. A temperature control sub-system utilizes a thermal sensor to sense the junction temperature of the component. When the temperature is below an operating threshold, the control sub-system applies power to the component, and the component is self-heated due to the quiescent leakage current inherent to the component. This quiescent self-heating property serves as a source of pre-heat to elevate the temperature of the component, until the temperature, as indicated by the thermal sensor, rises above the minimum specified operating temperature of the component. The system may then be reliably initialized by applying full system power, and triggering a hardware reset or defined initialization sequence/procedure. Once the component(s) is operational, self-heating continues to maintain the component's temperature above the minimum operating threshold.

Abstract: An integrated circuit includes a power amplification circuit and a switch circuit wherein the switch circuit is coupled to an output of the power amplification circuit, a bypass input, and a control input, such that the switch selectively couples the power amplification circuit output or the bypass input to an output of the integrated circuit.

Abstract: A semiconductor device and a radio frequency circuit which are appropriate for multiband, multimode performance can be realized as a semiconductor device including a field-effect transistor formed on a semiconductor substrate, and include: ohmic electrodes serving as source and drain electrodes of the field-effect transistor, first and second Schottky electrodes provided between the ohmic electrodes and serving as gate electrodes of the field-effect transistor, and a third Schottky electrode provided and grounded between the first and second Schottky electrodes.

Abstract: A semiconductor integrated circuit device includes: a substrate which has a first conductivity type and in which a first amplifier area and a second amplifier area are defined; a first well which has a second conductivity type, a first pocket well which has the first conductivity type and is separated from the first well, and a first deep well which has the second conductivity type, surrounds the first pocket well, and is separated from the first well; and a second well which has the second conductivity type, a second pocket well which has the first conductivity type and is separated from the second well, and a second deep well which has the second conductivity type, surrounds the second pocket well, and is separated from the second well The first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate.

Abstract: There is provided a balance signal output type sensor producing a high quality balance signal output. There is provided a balance signal output type sensor including a capacitor unit having a first electrode serving as a movable electrode and a second electrode disposed opposite the first electrode, a first amplifier that is connected to the first electrode and that amplifies a signal from the first electrode, and a second amplifier that is connected to the second electrode and that amplifies a signal from the second electrode.

Abstract: The present invention relates to an integrated electrical circuit in particular a receiver or driver suitable for broadband communication, such as optical interconnect. The circuit comprises two amplifiers which share current supply wherein the integrated circuit is arranged so that cross talk via this current supply is avoided over a large range of frequencies.

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract: Multiple-Input-Single-Output (MISO) amplification and associated VPA control algorithms are provided herein. According to embodiments of the present invention, MISO amplifiers driven by VPA control algorithms outperform conventional outphasing amplifiers, including cascades of separate branch amplifiers using conventional power combiner technologies. MISO amplifiers can be operated at enhanced efficiencies over the entire output power dynamic range by blending the control of the power source, source impedances, bias levels, outphasing, and branch amplitudes. These blending constituents are combined to provide an optimized transfer characteristic function.

Abstract: Power amplifier circuits which constitute an RF power module used for a digital device capable of handling high frequency signals in two frequency bands are disposed over the same IC chip. The power amplifier circuits are disposed around the IC chip, and a secondary circuit is disposed between the power amplifier circuits. Thus, the power amplifier circuits are provided within the same IC chip to enable a size reduction. Further, the distance between the power amplifier circuits is ensured even if the power amplifier circuits are provided within the same IC chip. It is therefore possible to suppress the coupling between the power amplifier circuits and restrain crosstalk between the power amplifier circuits.

Abstract: According to one embodiment, provided is a high frequency module comprising: a semiconductor device; an input matching circuit; an output matching circuit; a high temperature operating use gate bias circuit and operating use gate bias circuit connected to the input matching circuit; a high temperature operating use gate bias terminal connected to the high temperature operating use gate bias circuit; an operating use gate bias terminal connected to the operating use gate bias circuit; a high frequency input terminal connected to the input matching circuit; a drain bias circuit connected to the output matching circuit; a drain bias terminal connected to the drain bias circuit; and a high frequency output terminal connected to the output matching circuit, wherein the high frequency module is housed by one package.

Abstract: A reduction is achieved in the primary-side input impedance of a transformer (voltage transformer) as an output matching circuit without involving a reduction in Q-factor. An RF power amplifier includes transistors, and a transformer as the output matching circuit. The transformer has a primary coil and a secondary coil which are magnetically coupled to each other. To the input terminals of the transistors, respective input signals are supplied. The primary coil is coupled to each of the output terminals of the transistors. From the secondary coil, an output signal is generated. The primary coil includes a first coil and a second coil which are coupled in parallel between the respective output terminals of the transistors, and each magnetically coupled to the secondary coil. By the parallel coupling of the first and second coils of the primary coil, the input impedance of the primary coil is reduced.

Abstract: A variety of circuits, methods and devices are implemented for radiofrequency amplifiers. According to one such implementation, a radiofrequency amplifier circuit is implemented in a SMD package. The circuit amplifies a radiofrequency signal having a base-band portion and a plurality of carrier signals frequency-spaced larger than the base-band bandwidth. The circuit includes a radiofrequency transistor connected to a circuit output having a parasitic output capacitance. The source-drain terminal is electrically connected to the circuit output. An internal shunt inductor provides compensation for the parasitic output capacitance. A high-density capacitor is connected between the internal shunt inductor and a circuit ground. The high-density capacitor has a terminal with a surface area can be at least ten times that of a corresponding planar surface.

Abstract: The invention proposes an integrated circuit arrangement (10) for generating a digital variable gain control signal (SA) for a digitally variable gain amplifier (14), comprising: a memory (16) for storing at least one digital signal sequence (DS) defining a time gain profile, a controller (18) for generating the digital variable gain control signal (SA) by reading out the memory (16), and a programming interface (20) for programming the memory (16). The integrated circuit arrangement (10) in accordance with the invention makes it possible to read out e.g. a gain characteristic as needed at the time for an ultrasound or radar application of a VGA in fast response at a defined rate from the memory (16).

Abstract: A high frequency amplifier includes a package substrate, an amplifying active device disposed on a top surface of the package substrate, a transmission line connected to the amplifying active device and transmitting a high frequency signal, a surface mounted device (SMD) component shunt-connected at a first end to the transmission line, a SMD component terminal connected to a second end of the SMD component and partially exposed at a back surface of the package substrate, and an external terminal partially exposed at the back surface of the package substrate and connected to a first end of the transmission line, opposite a second end of the transmission line that is connected to the amplifying active device.

Abstract: An amplifier circuit on a single die comprises a low voltage amplifier with a first common mode voltage and having an input and an output. A power amplifier has a second common mode voltage whose input is operably coupled to an output of the low voltage amplifier. The first common mode voltage and second common mode voltage are unequal. A compensation circuit is operably coupled to an input of the power amplifier and arranged to inject a DC-current or apply a common mode voltage into the power amplifier that is representative of a difference between the first common mode voltage and the second common mode voltage.

Abstract: Embodiments of a high-frequency millimeter-wave amplifier are generally described herein. The high-frequency millimeter-wave amplifier may be constructed on a substrate to operate at a frequency of at least 75 GHz. In some embodiments, the millimeter-wave amplifier may include at least first, second, third and fourth amplifier stages coupled in series. A single drain bias bond pad provided on the substrate to provide a drain bias voltage to the drains of the first, second, third and fourth amplifier stages. Drain bias lines may be electrically coupled to the single drain bias bond pad and extend at least partially alongside and between some of the amplifier stages. A signal path through the second amplifier stage extends in a direction opposite of signal paths through the first and third amplifier stages. In some embodiments, a 95 GHz amplifier is provided and configured occupy an area on the substrate of no greater than approximately four square millimeters.

Abstract: A novel RF power amplifier integrated circuit (PA IC), unit cell, and method for amplifying RF signals are disclosed. One embodiment of a PA IC includes at least two linear arrays comprising transistor device units, and at least one linear array comprising capacitors. The transistor device units include source nodes that are jointly coupled to a source bus, and selected gate nodes that are jointly coupled to a gate bus. First electrodes of the capacitors are also jointly coupled to the source bus, and second electrodes of the capacitors are jointly coupled to the gate bus. Each linear array comprising capacitors is disposed between at least two linear arrays comprising transistor device units. In one embodiment, the PA IC includes unit cells. In some embodiments, each unit cell comprises two transistor device units and one or more capacitors. The capacitors are disposed between the transistor device units.

Abstract: Power amplifier circuits which constitute an RF power module used for a digital device capable of handling high frequency signals in two frequency bands are disposed over the same IC chip. The power amplifier circuits are disposed around the IC chip, and a secondary circuit is disposed between the power amplifier circuits. Thus, the power amplifier circuits are provided within the same IC chip to enable a size reduction. Further, the distance between the power amplifier circuits is ensured even if the power amplifier circuits are provided within the same IC chip. It is therefore possible to suppress the coupling between the power amplifier circuits and restrain crosstalk between the power amplifier circuits.

Abstract: Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil.

Abstract: Systems and apparatus for converting an input current signal into two or more output voltage signals on an integrated circuit. In one aspect, an integrated circuit includes a first trans-impedance amplifier that includes a first cascode amplifier; and a second trans-impedance amplifier that includes a second cascode amplifier, the second cascode amplifier and the first cascode amplifier sharing an input transistive element; where the first cascode amplifier is coupled to one or more first switches that disable the first trans-impedance amplifier, the second cascode amplifier is coupled to one or more second switches that disable the second trans-impedance amplifier, and control logic coupled to the one or more first switches and the one or more second switches disables at least one of the first trans-impedance amplifier or the second trans-impedance amplifier.

Abstract: An integrated power combiner is disclosed. The power combiner includes a first circular geometry primary winding having one or more inductive elements, such as an active winding with one or more driver stages. A circular geometry secondary winding is disposed adjacent to the first primary winding, such as an active winding with one or more driver stages. A second circular geometry primary winding is disposed adjacent to the secondary winding and has one or more inductive elements. One or more connections are provided between one or more of the inductive elements of the first circular geometry primary winding and one or more of the inductive elements of the second circular geometry primary winding.

Abstract: A hybrid broadband power amplifier module design is disclosed. In a power amplifier design, low impedance transmission lines are typically needed at the input and output of the transistor to match for its optimum source and load impedance. The peripheral of the GaN (Gallium Nitride) transistor is very small due to the high power density of the GaN transistor. The transmission line, for example a microstrip line, needs to be very wide to achieve low impedance on ceramic substrates such as Alumina. The dimensional mismatch from the low impedance transmission line to the transistor causes additional parasitic effect to the matching networks and limits the bandwidth of the amplifier. Capacitor materials are typically very high in dielectric constant; hence a single layer capacitor with small dimensions equalizes to a low impedance transmission line. Selected capacitors with proper dimensions can be used as the low impedance transmission lines in the matching networks.

Abstract: An integrated circuit transimpedance amplifier arrangement constituted of: a plurality of internal matched resistors; a current multiplier arranged to output a signal whose value is a function of an input current signal, an external resistor and a first set of the plurality of internal matched resistors; and an output transimpedance amplifier coupled to the output of the current multiplier, the output transimpedance amplifier exhibiting a gain whose value is a function of a second set of the plurality of internal matched resistors, wherein the output of the output transimpedance amplifier is a function of the input current signal, the external resistor, the first set of the plurality of internal matched resistors and the second set of the plurality of internal matched resistors, wherein the variations with temperature of the first set of the plurality of internal matched resistors and the second set of the plurality of internal matched resistors cancel.

Abstract: An integrated HF-amplifier has an input bond pad, cells displaced in a first direction, and an output bond pad. Each has a amplifier with input pad, active area, and output pad. The active area is arranged in-between the input and output pads, and the input pad, active area, and output pad are respectively displaced in a second direction substantially perpendicular to the first direction. A first network interconnects input pads of adjacent cells, and extends in the first direction. A second network interconnects output pads of adjacent cells, and extends in the first direction. The first and second networks obtain an output signal at the output bond pad having for all interconnected cells an equal phase shift and amplitude for a same input signal at the input bond pad. At particular bias and phase shift conditions this provides a Doherty amplifier with improved efficiency at power back off.

Abstract: An apparatus and system are provided to adjust an output voltage of an integrated circuit (IC) die. For instance, the apparatus can include an on-chip source termination and a bias generator. The bias generator can be configured to provide a source current to the on-chip source termination to adjust the output voltage. In particular, when adjusting the output voltage of the IC die, the bias generator can adjust the source current using a first current with a first adjustable current gain and a second current source with a second adjustable current gain.

Abstract: Embodiments of a high-frequency millimeter-wave amplifier are generally described herein. The high-frequency millimeter-wave amplifier may be constructed on a substrate to operate at a frequency of at least 75 GHz. In some embodiments, the millimeter-wave amplifier may include at least first, second, third and fourth amplifier stages coupled in series. A single drain bias bond pad provided on the substrate to provide a drain bias voltage to the drains of the first, second, third and fourth amplifier stages. Drain bias lines may be electrically coupled to the single drain bias bond pad and extend at least partially alongside and between some of the amplifier stages. A signal path through the second amplifier stage extends in a direction opposite of signal paths through the first and third amplifier stages. In some embodiments, a 95 GHz amplifier is provided and configured occupy an area on the substrate of no greater than approximately four square millimeters.

Abstract: Embodiments include but are not limited to apparatuses and systems including a circuit comprising a unit cell including an input and an output, and a harmonic trap, intrinsic to the unit cell, implemented on one of the input and the output. Other embodiments may be described and claimed.

Abstract: An on-chip inductor structure for a DC-DC power regulator circuit merges the switching transistor metallization with the inductor. Thick top level conductor metal that is used to strap the transistor array and to lower its on-state resistance is also used to extend the power inductor into the transistor array. Thus, the structure includes three basic components: a power inductor that spirals around the transistor array, the transistor array itself, and the transistor array metallization that is used to form a distributed inductance situated over the transistor array.

Abstract: An amplifier includes: a substrate; first to fourth amplifying units arranged on the substrate and each having first and second terminals, and each amplifying first and second signals to generate first and second amplified signals; a first inductive line arranged on the substrate, connecting the first terminal of the first amplifying unit and the first terminal of the second amplifying unit, and having a linear portion and a bending portion; a second inductive line arranged on the substrate, connecting the second terminal of the second amplifying unit and the first terminal of the third amplifying unit, and having a linear portion and a bending portion; a third inductive line arranged on the substrate, connecting the second terminal of the third amplifying unit and the first terminal of the fourth amplifying unit, and having a linear portion and a bending portion; a fourth inductive line arranged on the substrate, connecting the second terminal of the fourth amplifying unit and the second terminal of the firs

Abstract: An image signal amplifying circuit comprises: an amplifier circuit for amplifying an image signal; an output capacitor and a resistance, both being serially connected between an output node of the amplifier circuit and an output terminal; and a second-order high pass filter having a value of Q larger than one, the second-order high pass filter being provided at a preceding stage of the amplifier circuit, wherein distortion to correct a sag arising in a high pass filter on an output side, the high pass filter including the output capacitor and the resistance, is caused in the input image signal by a characteristic of the second-order high pass filter.

Abstract: A description is provided of a high-frequency, multi-stage, millimeter wave amplifier integrated circuit, and of a method for designing and constructing the circuit. The methods and structures have been created to enable the construction of an amplifier offering substantial gain at a relatively high power and high frequency, but occupying minimal area of an integrated circuit die. Various structures and methodologies are described which each contribute to the practical feasibility of constructing an amplifier with such performance in a relatively compact space.

Abstract: An input inductor or input inductive network is used to improve the performance of circuits working in discrete time domain, especially a sample and hold circuit. Input series inductors resonate with the capacitance at the input of the sample and hold at high frequencies to extend its bandwidth. At high frequencies, the inductors act as high impedance chokes between the termination resistor and the capacitors and thus also improve the input reflection of the chip.

Abstract: A front-end module comprises a plurality of chips that includes first and second functional blocks and an interconnection circuit. The first functional block is formed using a first process type and includes a digital control circuit that generates a digital control signal in response to an external control signal from outside the front end module. The second functional block is formed using a second process type and includes a digitally controlled circuit controlled by the digital control signal generated by the first functional block. The second process type is different from the first process type. The interconnection circuit couples the digital control circuit and the digitally controlled circuit to provide the digital control signal to the digitally controlled circuit. In one aspect, the first functional block may be a low noise amplifier formed by a pseudomorphic high electron mobility transistor process.

Abstract: A method of protecting a circuit design implemented within an integrated circuit (IC) from electrostatic discharge (ESD) can include positioning a device array pair comprising first and second device arrays on the IC to share a common centroid, wherein the first and second device arrays are matched. An ESD diode array pair comprising first and second ESD diode arrays can be positioned on the IC adjacent to a first perimeter encompassing the first and second device arrays, wherein the first and second ESD diode arrays share the common centroid and are matched. A cathode terminal of each ESD diode of the first ESD diode array can be coupled to an input of the first device array, and a cathode terminal of each ESD diode of the second ESD diode array can be coupled to an input of the second device array.

Abstract: In order to allow to make compact a distributed amplifier by dispensing with any choke coil and reduce its cost, the distributed amplifier is configured such that it comprises an input side transmission line, an output side transmission line, and plural amplifier circuits connected to the input side transmission line and the output side transmission line, wherein push-pull amplifier circuits are employed as the amplifier circuits.

Abstract: An amplifier module includes an integrated circuit device including a first amplifier circuit electrically connected to a first input terminal. The amplifier circuit includes a number of x first amplifier branches electrically connected to the first input terminal. The amplifier module also includes a number y of first output terminals each assigned to a respective TX frequency band, a first switching unit that electrically connects one or more of the first amplifier branches to one of the first output terminals, and a multilayer substrate, on top of which the integrated circuit device and the switching unit are mounted. The substrate includes integrated passive matching elements that are part of matching circuits where x?1 and y?2. Each of the first amplifier branches is adapted to deliver a different power level at its output and is matched to a load at the first output terminals by one of the matching circuits.

Abstract: A millimeter wave amplifier constructed on a substrate and configured for use at a frequency of 75 GHz or higher, may include four amplifier stages. A first inter-stage filter, resonant at an operating frequency of the amplifier, may couple the output of the first stage to the input of the second stage. A second inter-stage filter, resonant at the operating frequency, may couple the output of the second stage to the input of the third stage. A third inter-stage filter, resonant at the operating frequency, may couple the output of the third stage to the input of the fourth stage. A plurality of bias supply leads that couple a gate bias voltage and a drain bias voltage to each of the amplifier stages. A plurality of bias line filters, resonant at the operating frequency, may be connected from at least some of the bias supply leads to a ground plane.

Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.

Abstract: An amplifying system includes an amplifier operated according to a supply voltage, and a detector coupled to the amplifier for generating a first control signal to the amplifier to disable an output stage of the amplifier when the supply voltage reaches a threshold.

Abstract: An audio signal processing circuit for processing an audio signal which is compact and small is provided. For the audio signal processing circuit of the invention, an input circuit, a feedback circuit, and a smoothing circuit are formed using a chip capacitor with small mounting space and a thin film resistor on an insulating substrate. Accordingly, the audio signal processing circuit that is small and further a display device incorporating the audio signal processing circuit are provided.