Terminal Coated On Patents (Class 338/309)
  • Patent number: 7042330
    Abstract: The low resistance value resistor 11 has two electrodes 12,13 of metal strips having a high electrical conductivity. The metal strips are affixed on the resistor body by means of rolling and/or thermal diffusion bonding. A fused solder layer is formed on a surface of each electrode comprised by the metal strip. Thus, sufficient bonding strength and superior current distribution in the resistor body is obtained. Further, a portion of the resistor body is trimmed by removing a portion of the body material along a direction of current flow between the electrodes to adjust a resistance value. Thus, a precise resistor value and superior characteristics of temperature coefficient of resistance (TCR) can be obtained.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: May 9, 2006
    Assignee: KOA Corporation
    Inventors: Keishi Nakamura, Mikio Tatuguchi
  • Patent number: 7042331
    Abstract: A thick-film resistor component may include a thick film component formed between a thick-film resistor and an electrically conductive sheet, wherein a portion of the sheet is selectively removed to form resistor contacts while exposing a portion of the thick-film component. Electrical terminals to a thick-film resistor may be sized to reduce stress and/or be selectively positioned relative to the resistor to define a desired resistor value. A thick-film resistor may include one or more resistor segments configured to be selectively open-circuited to incrementally adjust the value of the resistor.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: May 9, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Jiming Zhou, Dwadasi H. Sarma, Carl W. Berlin, John D Myers, M. Ray Fairchild
  • Patent number: 7038572
    Abstract: A method and apparatus for a stacked power chip resistor is disclosed. The invention provides for multiple power chip resistors to be stacked, providing for encapsulant such as glass to separate each power chip resistor and a metal barrier such as nickel plating on each end of the stacked power chip resistor to provide for electrical and mechanical connection of each power chip resistor in the stack.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: May 2, 2006
    Assignee: Vishay Dale Electronics, Inc.
    Inventors: Louis Peter Huber, Ziv Shoshani
  • Patent number: 7034653
    Abstract: A semiconductor resistor comprises a resistor body formed on a semiconductor substrate and first and second conductive terminals electrically connected to the resistor body at opposite ends thereof. The semiconductor resistor further includes at least first and second conductive paths between at least one of the first and second conductive terminals and the resistor body. The at least one conductive terminal is configured such that a resistance of the at least one conductive terminal between the at least first and second conductive paths is substantially matched to a resistance of the resistor body between the at least first and second conductive paths. In this manner, a current distribution between the at least first and second conductive paths is substantially matched.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: April 25, 2006
    Assignee: Agere Systems Inc.
    Inventors: Dipankar Bhattacharya, John Christopher Kriz, Stefan Allen Siegel, Joseph E. Simko, Yehuda Smooha
  • Patent number: 7026908
    Abstract: A sensor and method of manufacturing an extended temperature range variable resistance sensor that is cost effective and highly reliable, with stable resistance with an operating range of up to 1700° C. in hostile environments. The sensor is formed of highly stable dispersion hardened materials capable of withstanding mechanical loads and chemical attacks at elevated temperatures while maintaining internal chemical integrity. Electronics are implemented to condition the devices output and convert it to an industry standard.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: April 11, 2006
    Assignee: Harco Laboratories, Inc.
    Inventor: Samir W. Habboosh
  • Patent number: 7026911
    Abstract: A point contact array, including plural point contacts electrically and reversibly controlling conductance between electrodes and being applicable to an arithmetic circuit, a logic circuit, a memory device, a NOT circuit, and an electronic circuit including the same. The circuit includes plural point contacts each including a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. The conductance of each point contact is controlled to realize the circuit. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material. When a semiconductor or insulator material is interposed between the electrodes, a crystal or an amorphous material of GeSx, GeSex, GeTex, or WOx (0<x<100) is preferably used as the semiconductor or insulator material.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: April 11, 2006
    Assignees: Japan Science and Technology Corporation, Riken
    Inventors: Masakazu Aono, Tsuyoshi Hasegawa, Kazuya Terabe, Tomonobu Nakayama
  • Patent number: 6993828
    Abstract: A metal resistor and a method for manufacturing the resistor are provided. A first insulation film is formed on a substrate, a photosensitive film is applied on the insulation film, and an insulation film pattern is formed by patterning the insulation film. After a metal thin film is formed among the insulation film pattern and on the photosensitive film, with removing the photo-sensitive film is a metal thin film pattern formed among the insulation film pattern. On the metal thin film pattern and the insulation film pattern is a second insulation film formed and at the pad region of the metal thin film pattern is a lead wire connected, after that, a metal thin film resistor is manufactured with forming a preservation film on and around the lead wire.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 7, 2006
    Assignee: Inostek Inc.
    Inventors: Jo-Woong Ha, Seung-Hyun Kim, Dong-Yeon Park, Dong-Su Lee, Hyun-Jung Woo
  • Patent number: 6982624
    Abstract: A chip resistor includes an insulating chip substrate, a resistor film formed on the substrate, a pair of upper electrodes formed from silver paste to be connected to the resistor film, a cover coat covering the resistor film, an auxiliary electrode formed on each of the upper electrodes to partially overlap the cover coat, a side electrode formed on each of the side surfaces of the substrate to be connected to the upper electrode and the auxiliary electrode, a nickel-plated layer covering the auxiliary electrode and the side electrode, and a soldering layer covering the nickel-plated layer. The side electrode is made from nonmagnetic conductive resin paste, whereas the auxiliary upper electrode is made from carbon-based conductive resin paste.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: January 3, 2006
    Assignee: Rohm Co., Ltd.
    Inventors: Daisuke Saito, Takahiro Kuriyama, Masato Doi
  • Patent number: 6960980
    Abstract: A power converter includes a shunt resistor constituted by a shunt resistance and a plurality of main electrodes made of a sheet-like resistive material. In the shunt resistor, plates lower in volume electric resistivity than the resistive material, higher in thermal conductivity than the resistive material and thicker in thickness than the resistive material are fixedly attached by solder, to the side surfaces of the main electrodes opposite to the side surfaces with which the main electrodes are fixedly attached to an insulating layer. At least one plate main electrode for electrically connecting with main circuit wiring is provided in each of the plates. At least one constricted portion is formed between each of the plate main electrodes and the shunt resistance. Plate detection electrodes for detecting a voltage between the opposite ends of the shunt resistance is provided on the plates near the shunt resistance portion.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: November 1, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Kinya Nakatsu, Masataka Sasaki, Ryuichi Saito, Satoshi Ibori, Masato Takase
  • Patent number: 6943662
    Abstract: Resistance or side electrodes of a chip resistor is prevented from being lost due to chemical reaction with NaCl contained in human sweat and so on when human sweat, seawater, etc. are adhered thereto. The chip resistor comprises an insulating substrate, thick-film upper surface electrodes formed at opposite ends of the top surface of the insulating substrate, a thin-film resistance made of a constituent material not reacting with NaCl, and formed so as to be extended over the upper surface of the insulating substrate and respective portions of the upper surface of the thick-film upper surface electrodes, thick-film back surface electrodes formed at spots on the back surface of the insulating substrate, corresponding to the thick-film upper surface electrodes, respectively, and thick-film side surface electrodes connecting the thick-film back surface electrodes with respective portions of the thick-film upper surface electrodes, exposed out of the thin-film resistance, respectively.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: September 13, 2005
    Assignee: Rohm Co., Ltd.
    Inventor: Masanori Tanimura
  • Patent number: 6935016
    Abstract: An inexpensive fine resistor which do not require dimensional classifications of discrete substrates, eliminating a process of replacing a mask according to a dimensional ranking of each discrete substrate as in the prior art. The resistor includes discrete substrate made into pieces by dividing an insulated substrate sheet along a first slit dividing portion and a second dividing portion perpendicular to the first dividing portion; top electrode layer formed on a top face of discrete substrate; resistor layer formed such that a part of resistor layer overlaps top electrode layer; protective layers formed so as to cover resistor layer; side electrode layer formed on a side face of discrete substrate such that side electrode layer is electrically coupled to top electrode layer.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: August 30, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masato Hashimoto, Yoshiro Morimoto, Akio Fukuoka, Hiroaki Kaito, Hiroyuki Saikawa, Toshiki Matsukawa, Junichi Hayase
  • Patent number: 6901655
    Abstract: A surface mount resistor includes an elongated piece of resistive material having strips of conductive material attached to its opposite ends. The strips of conductive material are separated to create an exposed central portion of the resistive material therebetween. According to the method the resistive strip is attached to a single co extensive strip of conductive material and a central portion of the conductive material is removed to create the exposed central portion of the resistive strip.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: June 7, 2005
    Assignee: Vishay Dale Electronics, Inc.
    Inventors: Joel J. Smejkal, Steve E. Hendricks
  • Patent number: 6897761
    Abstract: A ball grid array resistor network has a planar substrate formed of an organic material. The substrate preferably is a printed circuit board. The substrate has a top and bottom surface. A ball pad is located on the bottom surface. A low temperature resistor is located on the bottom surface and is connected to the ball pad. A solder mask is located over the first surface except for the ball pads. A conductive ball is attached to the ball pad. A reflowed solder paste connects the conductive ball to the ball pad. Several embodiments of the invention are shown.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: May 24, 2005
    Assignee: CTS Corporation
    Inventors: Craig Ernsberger, Jason B. Langhorn, Yinggang Tu
  • Patent number: 6885280
    Abstract: A resistor structure is disclosed that is constructed out of two layers of polysilicon. The intrinsic device is made using the top layer which is either a dedicated deposition, or formed as part of an existing process step such as a base epi growth in a BiCMOS flow. This poly layer can be made with a relatively high (greater than 2000 ohms per square) sheet resistance by appropriate scaling of the implant dose or by insitu doping methods. In this invention this layer is arranged to be about 1000 A or less thick. Such a resistor form with this thickness has been shown to demonstrate a better standard; deviation of resistance compared to resistors made with a thicker layer. Additionally, practical resistors made in elongated forms demonstrate better standard deviations of resistance when five bends were incorporated into the form. The resistor ends are formed by the addition of a bottom poly layer in a self aligned manner with a deposition that may already be part of the process sequence.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: April 26, 2005
    Assignee: Fairchild Semiconductor Corporation
    Inventor: James Michael Olson
  • Patent number: 6882265
    Abstract: On a surface of a transfer sheet, a resistor paste is first patterned, and a binder resin thereof is then heat-cured to form resistor layers. Next, an electrode paste containing a binder resin, which has a thermosetting temperature lower than a thermosetting temperature and a glass transition temperature of the binder resin of the resistor layers, is patterned on surfaces of the resistor layers and is then heat-cured, thereby forming electrode layers. By the steps described above, powdered silver contained in the electrode layers is unlikely to ooze into the resistor layers.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: April 19, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventors: Yoshihiro Taguchi, Shunetsu Satou
  • Patent number: 6880233
    Abstract: A fast heat rise resistor comprising a substrate, a foil bridge on the surface of the substrate, the foil bridge having an elevated portion and a contact portion, the elevated portion above the substrate, the contact portion in contact with the substrate, a conductive layer attached to the contact portion of said foil bridge. The activation energy and/or response time is reduced as the foil bridge is suspended over the substrate. Another aspect of the invention include a method of manufacturing the foil bridge and application to autoignition vehicle airbags.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: April 19, 2005
    Assignee: Vishay Intertechnology, Inc.
    Inventors: George V. Gerber, Anthony E. Troianello, Haim Goldberger
  • Patent number: 6882266
    Abstract: A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: April 19, 2005
    Assignee: CTS Corporation
    Inventors: Cynthia A. Christian, Richard Cooper, Yinggang Tu, David A. Christian
  • Patent number: 6859999
    Abstract: The invention provides for a method of manufacturing a stacked power chip resistor. The method includes adhering a first chip resistor to a second chip resistor with a glass encapsulant, connecting a first terminal of the first chip resistor to a first terminal of the second chip resistor with the first metal barrier, and connecting a second terminal on the first chip resistor to a second terminal of the second chip resistor with a second metal barrier.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: March 1, 2005
    Assignee: Vishay Techno Components, LLC
    Inventors: Louis P. Huber, Ziv Shoshani
  • Patent number: 6861941
    Abstract: A chip resistor including an elongated chip substrate, a resistive layer formed on the substrate, a silver-containing upper electrode connected to the resistive layer, an undercoat enclosing the resistive layer and extending onto part of the upper electrode, an auxiliary electrode connected to the upper electrode and extending onto part of the undercoat, and overcoat enclosing the undercoat and extending onto part of the auxiliary electrode. In the longitudinal direction of the substrate The undercoat extends longitudinally of the substrate beyond the overcoat, so that the extremity of the undercoat is offset from the extremity of the overcoat by an appropriate distance.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: March 1, 2005
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Kuriyama
  • Patent number: 6859133
    Abstract: The resistor of the present invention comprises a substrate, a pair of upper electrode layers disposed on one surface of the substrate, and a resistor layer connected to the pair of upper electrode layers, wherein the upper electrode layer includes a first thin film layer that strongly adheres to the substrate and the resistor layer, and a second thin film layer having volume resistivity lower than the volume resistivity of the first upper electrode thin film layer. Further, the resistor of the present invention comprises a pair of side electrodes, electrically connected to the upper electrode layers, at the end portion of the substrate, and the side electrode includes a first side thin film layer and a second side thin film layer, and the material that forms the second side thin film layer has a solid solubility with the first side thin film layer.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: February 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsutomu Nakanishi, Takashi Morino, Tadao Yagi, Tetsuhiro Korechika
  • Patent number: 6854176
    Abstract: A process for manufacturing a composite polymeric circuit protection device in which a polymeric assembly is provided and is then subdivided into individual devices (2). The assembly is made by providing first and second laminates (7,8), each of which includes a laminar polymer element having at least one conductive surface, providing a pattern on at least one of the conductive surfaces on one laminate, securing the laminates in a stack (1) in a desired configuration, at least one conductive surface of at least one of the laminates forming an external conductive surface (3) of the stack, and making a plurality of electrical connections (31,51) between a conductive surface of the first laminate and a conductive surface of the second laminate. The laminar polymer elements may be PTC conductive polymer compositions, so that the individual devices made by the process exhibit PTC behavior. Additional electrical components may be attached directly to the surface of the device or assembly.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: February 15, 2005
    Assignee: Tyco Electronics Corporation
    Inventors: Scott Hetherton, Wayne Montoya, Thomas Bruguier, Randy Daering, James Toth, Daniel A. Chandler, Matthew P. Galla
  • Patent number: 6856234
    Abstract: A chip resistor includes an insulating substrate 2 in the form of a chip having an upper surface and an opposite pair of side surfaces, a resistor film 4 formed on the upper surface of the insulating substrate 2, a pair of upper electrodes 5 formed on the upper surface of the insulating substrate 2 to flank the resistor film 4 in electrical connection thereto, a cover coat 6 covering the resistor film 4, an auxiliary upper electrode 7 formed on each of the upper electrodes 5 and including a first portion 7a adjoining the relevant side surface of the insulating substrate 2 and a second portion 7b overlapping the cover coat 6, and a side electrode 8 formed on each of the side surfaces of the insulating substrate 2 and electrically connected to at least the upper electrode 5 and the auxiliary upper electrode 7.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: February 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Takahiro Kuriyama, Masato Doi
  • Patent number: 6856233
    Abstract: A chip resistor having a highly accurately adjusted low resistance value is obtained. The chip resistor having a vertically three-layered structure is obtained by forming a first electrode 1A by printing paste for an electrode on an insulating substrate 5 and drying it, a resistor layer 3 by printing paste for a resistor on the first electrode 1A and drying it, a second electrode 1B by printing paste for an electrode on the resistor layer 3 and the insulating substrate 5 and baking it. Trimming is applied to the thus fabricated chip resistor so as to adjust a resistance value to a given value.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: February 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Torayuki Tsukada, Mitsuo Nonaka
  • Patent number: 6847018
    Abstract: A heating element made from flexible circuit technology with a single contiguous heating zone for uniform heating or multiple temperature heating zones is described. These flexible heating elements can conform to three dimensional object surfaces with irregular shape. The heating element's overall flexibility and its thickness (in the region of 10 mils) allow for heating many object shapes in an efficient, compact and light-weight manner. Each thermal sensor or thermostat is used to regulate each heating zone and provide a unique temperature setting. A thermostat can be mounted directly on an object's metallic surface. In addition, using diodes connected to the flexible heating element is described here to allow the use of two or multiple voltage sources. The technique permits one heating element to be powered from either AC or DC sources with comparable heating characteristics from both.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: January 25, 2005
    Inventor: Chon Meng Wong
  • Patent number: 6833520
    Abstract: A suspended thin-film resistor and methods for producing the same are disclosed. In one embodiment, a device is produced by depositing a first and second contact on a substrate, depositing a sacrificial material on the substrate at a location between the first and second contacts, depositing a thin-film resistor over the first and second contacts and the sacrificial material, and thermally decomposing the sacrificial material.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: December 21, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Marvin Glenn Wong, Ling Liu
  • Publication number: 20040252009
    Abstract: A chip resistor includes a resistor element in the form of a chip, and at least two electrodes formed on the resistor element. The resistor element includes an upper surface, a lower surface, and two end surfaces extending between the upper and the lower surfaces and spaced from each other. The two electrodes are provided on the lower surface of the resistor element. Each of the end surfaces of the resistor element is formed with a conductor film integrally connected to a corresponding one of the electrodes. The conductor film is made of copper, for example, and is higher in solder-wettability than the resistor element.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 16, 2004
    Applicant: ROHM CO., LTD.
    Inventor: Torayuki Tsukada
  • Publication number: 20040252010
    Abstract: A circuit board high in reliability and a method for manufacturing the circuit board are provided. The electrical resistance is accurately adjustable without damaging the circuit body even if it is made of resinous material and is free from a change over time. A circuit board in which a resistor (16) consisting of a resistor paste is printed between electrodes (14a) formed on a circuit pattern (14) printed on a printed circuit board (11), wherein a conductor (18) for adjusting the electrical resistance value of the resistor is coated on the surface of the resistor.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 16, 2004
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Koichi Tanaka
  • Patent number: 6828898
    Abstract: A resistor card for a fuel level sensor has improved resistance to corrosion and wear. The resistor card has a substrate with a resistive layer and a conductive layer. A nickel layer covers the conductive layer. A nickel-gold alloy layer covers the nickel layer. The nickel-gold alloy layer protects the conductive layer from sulfur corrosion and improves wear resistance.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: December 7, 2004
    Assignee: CTS Corporation
    Inventors: Ronald Dedert, Robert Heimann, Craig Hoffman, Kevin Kurtz
  • Publication number: 20040233032
    Abstract: A high power resistor includes a resistance element with first and second leads extending out from the opposite ends thereof. A heat sink of dielectric material is in heat conducting relation to the resistance element. The heat conducting relationship of the resistance element and the heat sink render the resistance element capable of operating as a resistor between the temperatures of −65° C. to +275° C. The heat sink is adhered to the resistance element and a molding compound is molded around the resistance element.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: VISHAY DALE ELECTRONICS, INC.
    Inventors: Greg Schneekloth, Nathan Welk, Brandon Traudt, Joel Smejkal, Ronald J. Miksch, Steve Hendricks, David L. Lange
  • Publication number: 20040227614
    Abstract: In one embodiment, an integrated circuit includes a thin film resistor, which includes a resistor material that has been deposited on a substrate surface within a channel defined by opposing first and second portions of a stencil structure formed on the substrate surface, the resistor material having an initial width determined by a width of the channel. The stencil structure has been adapted to receive a planarizing material that protects against reduction of the initial width of the resistor material during subsequent process steps for removing the stencil structure. A head mask overlays an end portion of the thin film resistor and a dielectric overlays the head mask, the dielectric defining a via formed in the dielectric above a portion of the head mask. A conductive material has been deposited in the via, coupled to the portion of the head mask and electrically connecting the thin film resistor to other components of the integrated circuit.
    Type: Application
    Filed: June 24, 2004
    Publication date: November 18, 2004
    Inventors: Siang Ping Kwok, Eric W. Beach, Philipp Steinmann
  • Patent number: 6817088
    Abstract: A power adapter is shown for use on injection molding runner nozzles. The power adapter provides for quick and easy installation (and removal) of thick film resistance heaters on the runner nozzles, without the need for rewiring. The power adapter comprises a series of rings that allow insertion of the terminal end of the heater, which is then rotated into a locked position. One of the rings contains contacts which are at least semi-permanently wired to a power source. To facilitate the power adapter, a novel method terminating the heating element is used. A noble-metal-based bonding agent (such a silver-base ink) is applied to the heating element and/or terminal plate. The terminal plate is then affixed to the heating element and the bonding agent is fired.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: November 16, 2004
    Assignee: Watlow Electric Msg.C
    Inventor: Hongy Lin
  • Publication number: 20040201447
    Abstract: A thin-film resistor device is disclosed. In one embodiment, the device comprises a substrate supporting first and second contacts. A compliant material is deposited on the substrate. A thin-film resistor is deposited on the compliant material and coupled between the first and second contacts.
    Type: Application
    Filed: April 14, 2003
    Publication date: October 14, 2004
    Inventor: Marvin Glenn Wong
  • Publication number: 20040196139
    Abstract: The low resistance value resistor 11 has two electrodes 12,13 of metal strips having a high electrical conductivity. The metal strips are affixed on the resistor body by means of rolling and/or thermal diffusion bonding. A fused solder layer is formed on a surface of each electrode comprised by the metal strip. Thus, sufficient bonding strength and superior current distribution in the resistor body is obtained. Further, a portion of the resistor body is trimmed by removing a portion of the body material along a direction of current flow between the electrodes to adjust a resistance value. Thus, a precise resistor value and superior characteristics of temperature coefficient of resistance (TCR) can be obtained.
    Type: Application
    Filed: April 14, 2004
    Publication date: October 7, 2004
    Applicant: KOA CORPORATION
    Inventors: Keishi Nakamura, Mikio Tatuguchi
  • Patent number: 6794985
    Abstract: The low resistance value resistor 11 has two electrodes 12, 13 of metal strips having a high electrical conductivity. The metal strips are affixed on the resistor body by means of rolling and/or thermal diffusion bonding. A fused solder layer is formed on a surface of each electrode comprised by the metal strip. Thus, sufficient bonding strength and superior current distribution in the resistor body is obtained. Further, a portion of the resistor body is trimmed by removing a portion of the body material along a direction of current flow between the electrodes to adjust a resistance value. Thus, a precise resistor value and superior characteristics of temperature coefficient of resistance (TCR) can be obtained.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: September 21, 2004
    Assignee: KOA Corporation
    Inventors: Keishi Nakamura, Mikio Tatuguchi
  • Publication number: 20040164842
    Abstract: A chip resistor includes an insulating substrate 2 in the form of a chip having an upper surface and an opposite pair of side surfaces, a resistor film 4 formed on the upper surface of the insulating substrate 2, a pair of upper electrodes 5 formed on the upper surface of the insulating substrate 2 to flank the resistor film 4 in electrical connection thereto, a cover coat 6 covering the resistor film 4, an auxiliary upper electrode 7 formed on each of the upper electrodes 5 and including a first portion 7a adjoining the relevant side surface of the insulating substrate 2 and a second portion 7b overlapping the cover coat 6, and a side electrode 8 formed on each of the side surfaces of the insulating substrate 2 and electrically connected to at least the upper electrode 5 and the auxiliary upper electrode 7.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Applicant: ROHM CO., LTD.
    Inventors: Takahiro Kuriyama, Masato Doi
  • Publication number: 20040164841
    Abstract: A chip resistor includes an insulating chip substrate, a resistor film formed on the substrate, a pair of upper electrodes formed from silver paste to be connected to the resistor film, a cover coat covering the resistor film, an auxiliary electrode formed on each of the upper electrodes to partially overlap the cover coat, a side electrode formed on each of the side surfaces of the substrate to be connected to the upper electrode and the auxiliary electrode, a nickel-plated layer covering the auxiliary electrode and the side electrode, and a soldering layer covering the nickel-plated layer. The side electrode is made from nonmagnetic conductive resin paste, whereas the auxiliary upper electrode is made from carbon-based conductive resin paste.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Applicant: ROHM CO., LTD.
    Inventors: Daisuke Saito, Takahiro Kuriyama, Masato Doi
  • Patent number: 6781506
    Abstract: Disclosed is a resistor structure for embedding in a dielectric material including a thin film resistive material disposed on a surface of a conductive layer wherein the surface has an isotropic surface roughness having a Rz (din) value of 3 to 10 &mgr;m and a peak-to-peak wavelength of 2 to 20 &mgr;m.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: August 24, 2004
    Assignee: Shipley Company, L.L.C.
    Inventors: John Schemenaur, Rajan Hariharan, Marc Langlois, Craig S. Allen
  • Publication number: 20040160303
    Abstract: A chip resistor including an elongated chip substrate, a resistive layer formed on the substrate, a silver-containing upper electrode connected to the resistive layer, an undercoat enclosing the resistive layer and extending onto part of the upper electrode, an auxiliary electrode connected to the upper electrode and extending onto part of the undercoat, and overcoat enclosing the undercoat and extending onto part of the auxiliary electrode. In the longitudinal direction of the substrate The undercoat extends longitudinally of the substrate beyond the overcoat, so that the extremity of the undercoat is offset from the extremity of the overcoat by an appropriate distance.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 19, 2004
    Applicant: ROHM CO., LTD.
    Inventor: Takahiro Kuriyama
  • Publication number: 20040150507
    Abstract: A resistor structure is disclosed that is constructed out of two layers of polysilicon. The intrinsic device is made using the top layer which is either a dedicated deposition, or formed as part of an existing process step such as a base epi growth in a BiCMOS flow. This poly layer can be made with a relatively high (greater than 2000 ohms per square) sheet resistance by appropriate scaling of the implant dose or by insitu doping methods. In this invention this layer is arranged to be about 1000 A or less thick. Such a resistor form with this thickness has been shown to demonstrate a better standard; deviation of resistance compared to resistors made with a thicker layer. Additionally, practical resistors made in elongated forms demonstrate better standard deviations of resistance when five bends were incorporated into the form. The resistor ends are formed by the addition of a bottom poly layer in a self aligned manner with a deposition that may already be part of the process sequence.
    Type: Application
    Filed: January 31, 2003
    Publication date: August 5, 2004
    Inventor: James Michael Olson
  • Patent number: 6771160
    Abstract: A resistor foil, comprised of a copper layer having a first side and a second side. An intermediate layer having a thickness of between 5 Å and 70 Å is disposed on the first side of the copper layer. A first layer of a first resistor metal having a thickness of between 50 Å and 2 &mgr;m is disposed on the intermediate layer, and a second layer of a second resistor metal having a thickness of between 50 Å and 2 &mgr;m is disposed on the first layer of the first resistor metal. The first resistor metal has a resistance different from the second resistor metal.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: August 3, 2004
    Assignee: Nikko Materials USA, Inc.
    Inventors: Jiangtao Wang, Michael A. Centanni, Sidney J. Clouser
  • Publication number: 20040130435
    Abstract: A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 8, 2004
    Inventors: David A. Christian, Cynthia A. Christian, Richard Cooper, Yinggang Tu
  • Publication number: 20040130434
    Abstract: A method is disclosed of fabricating a MIMCAP (a capacitor (CAP) formed by successive layers of metal, insulator, metal (MIM)) and a thin film resistor at the same level. A method is also disclosed of fabricating a MIMCAP and a thin film resistor at the same level, and a novel integration scheme for BEOL (back-end-of-line processing) thin film resistors which positions them closer to FEOL (front-end-of-line processing) devices.
    Type: Application
    Filed: January 6, 2003
    Publication date: July 8, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anil K. Chinthakindi, Shwu-Jen Jeng, Michael F. Lofaro, Christopher M. Schnabel, Kenneth J. Stein
  • Publication number: 20040113751
    Abstract: A method for producing thin film sensors that includes applying a sensor structure to a front of a glass substrate so as to define a combination, connecting a support on a front of the combination. The method further includes removing a portion of the glass substrate over a large surface from a direction directed from a back of the combination down to a final thickness (d) of the glass substrate and releasing a connection between the support and the combination.
    Type: Application
    Filed: January 5, 2004
    Publication date: June 17, 2004
    Inventor: Wolfgang Timelthaler
  • Publication number: 20040108937
    Abstract: A ball grid array resistor network has a planar substrate formed of an organic material. The substrate preferably is a printed circuit board. The substrate has a top and bottom surface. A ball pad is located on the bottom surface. A low temperature resistor is located on the bottom surface and is connected to the ball pad. A solder mask is located over the first surface except for the ball pads. A conductive ball is attached to the ball pad. A reflowed solder paste connects the conductive ball to the ball pad. Several embodiments of the invention are shown.
    Type: Application
    Filed: December 4, 2002
    Publication date: June 10, 2004
    Inventors: Craig Ernsberger, Jason B. Langhorn, Yinggang Tu
  • Patent number: 6732422
    Abstract: A method of forming a resistor is described which achieves improved resistor stability and voltage coefficient of resistance. A resistor is formed from a conducting material such as doped silicon or polysilicon. The resistor has a rectangular first, second, third, fourth, and fifth resistor elements. A layer of protective dielectric is formed over the first, second, and third resistor elements leaving the fourth and fifth resistor elements exposed. The conducting material in the exposed fourth and fifth resistor elements is then changed to a silicide to form low resistance contacts between the second and fourth resistor elements and between the second and fourth resistor elements. The second and third resistor elements are wider than the first resistor element and provide a low resistance contacts to the first resistor element. This provides a low voltage coefficient of resistance and thermal process stability for the resistor.
    Type: Grant
    Filed: January 4, 2002
    Date of Patent: May 11, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Kong-Beng Thei, Chih-Hsien Lin, Shyh-Chyi Wong
  • Publication number: 20040085183
    Abstract: A metal resistor and a method for manufacturing the resistor are provided. A first insulation film is formed on a substrate, a photosensitive film is applied on the insulation film, and an insulation film pattern is formed by patterning the insulation film. After a metal thin film is formed among the insulation film pattern and on the photosensitive film, with removing the photo-sensitive film is a metal thin film pattern formed among the insulaion film pattern. On the metal thin film pattern and the insulation film pattern is a second insulation film formed and at the pad region of the metal thin film pattern is a lead wire connected, after that, a metal thin film resistor is manufactured with forming a preservation film on and around the lead wire.
    Type: Application
    Filed: August 21, 2003
    Publication date: May 6, 2004
    Inventors: Jo-Woong Ha, Seung-Hyun Kim, Dong-Yeon Park, Dong-Su Lee, Hyun-Jung Woo
  • Publication number: 20040080397
    Abstract: A method of protecting a thick film resistor, including the steps of: providing a substrate having a plurality of conductive elements thereon; applying an electrically resistive material to a surface of the substrate, thereby forming the thick film resistor, the resistive material being electrically connected to at least one corresponding conductive element; curing the resistive material; and applying a coating over at least a substantial portion of the resistive material.
    Type: Application
    Filed: October 25, 2002
    Publication date: April 29, 2004
    Inventors: Mike Cubon, Jose A. Martinez, Ksawera Saletnik
  • Patent number: 6725529
    Abstract: According to the method the resistive strip is attached to a single co extensive strip of conductive material and a central portion of the conductive material is removed to create the exposed central portion of the resistive strip.
    Type: Grant
    Filed: February 18, 2002
    Date of Patent: April 27, 2004
    Assignee: Vishay Dale Electronics, Inc.
    Inventors: Joel J. Smejkal, Steve E. Hendricks
  • Patent number: 6727798
    Abstract: The present invention provides for a flip chip resistor having a substrate having opposite ends, a pair of electrodes formed from a first electrode layer disposed on the opposite ends of the substrate, a resistance layer electrically connecting the pair of electrodes, a protective layer overlaying the resistance layer, and a second electrode layer overlaying the first electrode layer and at least a portion of the protective layer. The present invention provides for higher reliability performance and enlarging the potential soldering area despite small chip size.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: April 27, 2004
    Assignee: Vishay Intertechnology, Inc.
    Inventors: Leonid Akhtman, Sakaev Matvey
  • Publication number: 20040075529
    Abstract: The present invention provides a high dopant concentration diffused resistor, a method of manufacture therefor, and an integrated circuit including the same. In one embodiment of the invention, the high dopant concentration diffused resistor includes a doped tub located over a semiconductor substrate and a doped resistor region located in the doped tub, the doped resistor region forming a junction within the doped tub. In a related embodiment, the high dopant concentration diffused resistor further includes first and second terminals each contacting the doped tub and the doped resistor region, wherein the first and second terminals cause the doped tub and doped resistor region to have a zero potential difference at any point across the junction when a voltage is applied to the first and second terminals.
    Type: Application
    Filed: September 24, 2003
    Publication date: April 22, 2004
    Applicant: Agere Systems Inc.,
    Inventor: Kadaba R. Lakshmikumar
  • Patent number: 5248298
    Abstract: An insert is provided to be attached to a shield on a surgical trocar obturator handle. The insert is actuated by the surgical trocar cannula handle so that it causes the shield to expose the sharpened obturator tip after insertion of the obturator and shield within the cannula. After usage, the insert is deactivated so that the shield again covers the obturator. The obturator can then be removed from the cannula handle and obturator shield, and the obturator handle can be discarded safely.
    Type: Grant
    Filed: April 16, 1992
    Date of Patent: September 28, 1993
    Assignee: Ethicon, Inc.
    Inventors: James Bedi, Steven Annunziato