Interface (e.g., Controller) Patents (Class 345/520)
  • Publication number: 20090322767
    Abstract: A dual transceiver architecture provides source and sink device capabilities for communicating visual information between information handling systems and displays. A detector determines whether a cable connected to a port provides visual information or receives digital information. If visual information is received at a port, the visual information is provided to an adjacent port through a dual transceiver architecture so that the visual information is available to forward to another display, information handling system or other device. A common connector configuration simplifies the connection of multiple displays or devices, such as in a daisy chain configuration.
    Type: Application
    Filed: June 26, 2008
    Publication date: December 31, 2009
    Inventors: David W. Douglas, Jeffrey Thelen
  • Patent number: 7639264
    Abstract: An interface unit, a device with the interface unit and a process for generating an image signal containing color image data is provided for activating a color monitor from an image signal containing monochrome image data. The interface unit has an input terminal (16), an output terminal (17) and a processor (18) coupled between the input terminal (16) and the output terminal (17). This processor (18) is set up to receive, via the input terminal (16), a first image signal issued by a monitor activating device (1) of an apparatus for activating a monochrome monitor. The signal contains monochrome image data, at least a part of which represents a number of graphic objects (9, 10), and which is set up to activate a monochrome monitor, such that the graphic objects (9, 10) are displayed on this monitor. One or more colors are assigned to each graphic object (9, 10) by the processor (18) on the basis of a predetermined dependence stored in this processor (18).
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: December 29, 2009
    Assignee: Dräger Medical AG & Co. KG
    Inventor: Thomas Ressing
  • Publication number: 20090315900
    Abstract: A method, medium, and system are provided for a generic surface manager which allows graphics surfaces generated according to various existing and/or new graphics protocols to be rendered by a graphics consumer. The generic surface manager functions as an interface between a graphics consumer and one or more applications that generate graphics surfaces. Support is provided for various existing graphics protocols and the generic surface manager can be easily modified to accept surfaces generated according to new graphics protocols. An extensible system is thereby provided that can support a variety of graphics protocols without requiring modifications to be made to the graphics consumer.
    Type: Application
    Filed: June 23, 2008
    Publication date: December 24, 2009
    Applicant: MICROSOFT CORPORATION
    Inventors: Oreste Dorin Ungureanu, Younus Aftab, Ivan Brugiolo, Andrei Baioura, Yutaka Nakajima, David R. Blythe
  • Patent number: 7636921
    Abstract: Software for dynamically previewing changes to hardware driver settings for a graphics adapter is disclosed. Changes to the driver settings are dynamically previewed by forcing an executable graphics program module to load hardware parameter settings as changed, and drawing a region reflecting the changes using the executable graphics program library. The graphics program module may be forced to load new settings as a result of being newly instantiated. Conveniently, a preview region reflecting changes may be drawn in place of an already existing preview region.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: December 22, 2009
    Assignee: ATI Technologies Inc.
    Inventor: Wayne C. Louie
  • Publication number: 20090309886
    Abstract: An external display configuration approach is disclosed. In one embodiment, a method can include: using an interface of a portable computing device to define preferred settings, where the preferred settings designate preferences for a display that is external to the portable computing device; detecting in the portable computing device, a connection of an external display to the portable computing device; loading the preferred settings when capabilities of the external display support the preferred settings; and adjusting settings of the external display to match the preferred settings.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 17, 2009
    Applicant: OQO, Inc.
    Inventor: Brandon Sneed
  • Publication number: 20090309885
    Abstract: In accordance with some embodiments, a graphics process frame generation frame rate may be monitored in combination with a utilization or work load metric for the graphics process in order to allocate performance resources to the graphics process and in some cases, between the graphics process and a central processing unit.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 17, 2009
    Inventors: Eric Samson, Murali Ramadoss
  • Publication number: 20090310935
    Abstract: In a stereoscopic image generation device according to the invention, an obtaining means 11 obtains sequentially a plurality of original images Ga arranged in a time line and forming a content item. A calculation means 12 calculates an image characteristic value Ng from pixel values of a plurality of pixels included in an original image Ga obtained by the obtaining means 11. A storage device 21 stores a project file Fp by which image characteristic values Nf for the original images Ga forming the content item are respectively associated with stereoscopic parameters for generating stereoscopic images Gb from the original images Ga. A retrieval means 13 compares an image characteristic value calculated by the calculation means 12 from a particular original image Ga, with each of the image characteristic values Nf stored in the storage device 21, to retrieve a stereoscopic parameter for the particular original image Ga on the basis of a comparison result.
    Type: Application
    Filed: May 9, 2006
    Publication date: December 17, 2009
    Inventor: Kazunari Era
  • Patent number: 7633461
    Abstract: The graphics display system comprises a plurality of heads. Each of the heads includes a VGA controller and each of the heads is adapted for a display. The display system also includes a host coupled to the heads, wherein all the standard VGA settings for each of the heads could be programmed by a single command by the host. A method and system in accordance with the invention includes one VGA controller per head. In a broadcast mode a write transaction from the bus is broadcast to both heads. The output timing registers specific to a non-CRT output are not broadcast. To provide broadcast VGA to a CRT and/or a flat panel, software sets up the timing in extended registers and enables the display devices. The VGA application can provide mode settings via the appropriate write VGA registers and the correct display will be on each head.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: December 15, 2009
    Assignee: NVIDIA Corporation
    Inventors: Jonah Matthew Alben, Krishnaraj S. Rao
  • Patent number: 7629979
    Abstract: A system and method communicate information from a single-threaded application over multiple I/O busses to a computing subsystem for processing. In accordance with one embodiment, a method is provided that partitions state-sequenced information for communication to a computer subsystem, communicates the partitioned information to the subsystem over a plurality of input/output busses, and separately processes the information received over each of the plurality of input/output busses, without first se-sequencing the information.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: December 8, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Darel N. Emmot, Byron A. Alcorn, Ronald D. Larson
  • Patent number: 7629978
    Abstract: Circuits, methods, and apparatus that provide multiple graphics processor systems where specific graphics processors can be instructed to not perform certain rendering operations while continuing to receive state updates, where the state updates are included in the rendering commands for these rendering operations. One embodiment provides commands instructing a graphics processor to start or stop rendering geometries. These commands can be directed to one or more specific processors by use of a set-subsystem device mask.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: December 8, 2009
    Assignee: NVIDIA Corporation
    Inventor: Franck R. Diard
  • Publication number: 20090289946
    Abstract: In a video matrix display interface, an interface includes one or more subsystems to receive information from a plurality of display devices, compile the information from the plurality of display devices, report the compiled information to a graphics processing device, generate a video image using the compiled information, the image to be viewable across the plurality of display devices, splice the video image into portions and transmit the video image portions to the plurality of display devices, thereby creating a continuous image across the plurality of display devices.
    Type: Application
    Filed: May 22, 2008
    Publication date: November 26, 2009
    Applicant: DELL PRODUCTS L.P.
    Inventors: Joe Goodart, Shuguang Wu, Bruce C. Montag, Seen Yee Cheong
  • Patent number: 7621769
    Abstract: One embodiment of an edge connector for a field changeable graphics system includes a right angle edge connector having a plurality of contact pins adapted to engage contacts on a graphics card. The edge connector is adapted to interface the graphics card with the motherboard of a computing device, without directly mounting the graphics card to the motherboard. One advantage of the disclosed edge connector is that it is compatible with a plurality of graphics cards and systems, thereby enabling a computing device user to upgrade the existing device's graphics system. Thus, the user is not forced to purchase an entirely new computing device in order to take advantage of graphics innovations. A further advantage of the disclosed edge connector is that it enables upgrades to low voltage differential signaling (LVDS) features, without the need for additional costly devices capable of operating at LVDS data rates.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: November 24, 2009
    Assignee: NVIDIA Corporation
    Inventors: Michael B. Diamond, Daniel J. Driscoll, Craig E. Dowdall, Charles E. Buffington
  • Publication number: 20090284536
    Abstract: A display apparatus is provided that is capable of selecting an external device to which a CEC message is transmitted according to a user's operation to switch input as a device for operation, even when the device is not in an active state. A television apparatus 100 includes an HDMI terminal connected to an external device and is connected hierarchically in a tree structure to a plurality of external devices through the HDMI terminal. When input switching is instructed to any of the plurality of external devices according to a user's operation to switch input, the television apparatus 100 transmits a CEC message of <Set Stream Path> for switching an input route to the external device to which the instruction of input switching has been given and selects an external device to be a transmission destination of the CEC message of <Set Stream Path> as a device for operation.
    Type: Application
    Filed: July 23, 2007
    Publication date: November 19, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Tatsuya Yoshida
  • Publication number: 20090267952
    Abstract: The present invention discloses an apparatus for wirelessly transmitting display signals between a plurality of external host device and a display device. The apparatus comprises a wireless signal transceiver unit for establishing a network-transmission-protocol-based high-frequency signal channel for respective external host devices; a main controller, connected to the wireless signal transceiver unit, for analyzing signals from the wireless signal transceiver unit to extract information of the plurality of external host devices, configuration information and/or the display data, performing configurations and display mode selection based on the configuration information, and outputting the active display data; an image data process control unit, connected to the main controller and the display device, for storing the display data from the main controller, controlling the output of the display data, and performing timing control to interface signals of the display device.
    Type: Application
    Filed: March 22, 2006
    Publication date: October 29, 2009
    Applicant: Lenovo (Beijing) Limited
    Inventors: Xiaoping Yan, Zihua Guo
  • Publication number: 20090267954
    Abstract: A novel personal electronic device includes a first (embedded) and second (non-embedded) processors including associated operating systems and functions. In one aspect, the first processor performs relatively limited functions, while the second processor performs relatively broader functions under control of the first processor. Often the second processor requires more power than the first processor and is selectively operated by the first processor to minimize overall power consumption. Protocols for functions to be performed by the second processor may be provided directly to the second processor and processed by the second processor. In another aspect, a display controller is designed to interface with both processors. In another aspect, the operating systems work with one another. In another aspect, the first processor employs a thermal control program. Advantages of the invention include a broad array of functions performed by a relatively small personal electronic device.
    Type: Application
    Filed: July 8, 2009
    Publication date: October 29, 2009
    Applicant: DUALCOR TECHNOLOGIES, INC.
    Inventors: Bryan T. Cupps, Timothy J. Glass
  • Publication number: 20090267953
    Abstract: The invention comprises systems and methods for partitioning displays, and in particular, displays of interferometric modulator displays. In one embodiment, a display system includes one driving circuit configured to provide signals based on video data intended for display, and a bi-stable display comprising an array having a plurality of bi-stable display elements. The array is configured to display video data using signals received from the driving circuit, and the driving circuit is configured to partition the array into two or more fields, each field including at least one bi-stable display element, and refresh each of the two or more fields in accordance with a refresh rate associated with each field.
    Type: Application
    Filed: July 7, 2009
    Publication date: October 29, 2009
    Applicant: IDC, LLC
    Inventors: Jeffrey B. Sampsell, Karen Tyger, Mithran Mathew
  • Patent number: 7602395
    Abstract: Multiple graphics devices are operable in parallel to render stereo images using efficient programming techniques. The same command stream is delivered to each graphics device, and device masks are used to control the execution of commands by different graphics devices. A viewing transform command corresponding to a left-eye transform is executed by one device while a viewing transform command corresponding to a right-eye transform is executed another device. Other rendering commands are executed by both devices to render the same image from somewhat different viewpoints.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: October 13, 2009
    Assignee: NVIDIA Corporation
    Inventor: Franck R. Diard
  • Patent number: 7598959
    Abstract: Apparatus and systems, as well as methods and articles, may operate to update video display pixels. A video display bus can communicate data to a video display according to specified clock frequencies and a refresh time period. Power conservation can be enhanced by adjusting the specified clock frequencies and/or refresh time period to provide idle time on the video display bus.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: October 6, 2009
    Assignee: Intel Corporation
    Inventors: James P. Kardach, David Williams, Achintya K. Bhowmik, Barnes Cooper
  • Patent number: 7589734
    Abstract: A repeater comprises an EDID memory to store a control data and a memory control unit. The memory control unit is configured to make access to the EDID memory to read the control data therefrom, store the read control data into the EDID memory and, when access is made to the EDID memory by the set-top box, transfer the control data stored in the EDID memory to the set-top box. In this case, the memory control unit outputs an inhibiting signal to a set-top box to inhibit it from making access to the EDID memory until the completion of an operation of storing the control data from the EDID memory in the set-top box into the EDID memory in the repeater.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: September 15, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Mawatari, Yutaka Kawada
  • Publication number: 20090225090
    Abstract: An apparatus for adjusting parameters of a display card is provided. The apparatus comprises a connecting interface, an input unit, a processing unit, and a display unit. The connecting interface is used for connecting the apparatus to the display card. The input unit is used for inputting an input frequency. The processing unit is used for detecting an adjustable frequency range of a graphic processing unit (GPU) in the display card and adjusting a working frequency of the GPU within the adjustable frequency range according to the input frequency. The display unit is used for displaying the working frequency of the display card. Therefore, the adjustment of parameters of the display card becomes more convenient and information of the display card can be obtained more easily.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Nai-Wei Chiu, Yu-Liang Liu, Hsiao-Chien Chien
  • Patent number: 7585286
    Abstract: A method for batch implementation of settings in a renal replacement therapy device including: displaying on a user interface control settings which may be manually selected by an operator; selecting an independent control setting of the plurality of control settings; adjusting the independent control setting to an independent control setting level selected by an operator; temporarily storing the adjusted independent control setting level; automatically adjusting a dependent control setting level based upon the independent control level; displaying the adjusted independent control setting level and the adjusted dependent control setting, and implementing both the adjusted independent control setting level and the adjusted dependent control setting to control the device, by actuating a batch setting acceptance operation.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: September 8, 2009
    Assignee: CHF Solutions, Inc.
    Inventors: John J. O'Mahony, Thomas Robert Lendway, Andrew J. Halpert
  • Patent number: 7586493
    Abstract: A system, method, and computer program product are provided for offloading application tasks in a multi-processor environment. In use, an application is executed utilizing a first processor. Such application performs a plurality of tasks. A driver is provided for determining at least a subset of the tasks. To this end, the subset of tasks may be executed utilizing a second processor.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: September 8, 2009
    Assignee: NVIDIA Corporation
    Inventor: Rudy Jason Sams
  • Patent number: 7576745
    Abstract: A system and method for providing a dedicated interface between two or more graphics adapters installed on a motherboard. Surplus signals within an interface conforming to an interface specification are used to create the dedicated interface. The dedicated interface may connect the two or more graphics adapters using connectors via an interface device. Alternatively the dedicated interface may directly connect the two or more graphics adapters using dedicated connectors or a portion of the connectors coupled through conductive traces integrated onto the motherboard.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: August 18, 2009
    Assignee: NVIDIA Corporation
    Inventors: Abraham B. de Waal, Anthony M. Tamasi, Ross F. Jatou, Ludger Mimberg
  • Publication number: 20090201303
    Abstract: The invention provides, in some aspects, a system for rendering images, the system having one or more client digital data processors and a server digital data processor in communications coupling with the one or more client digital data processors, the server digital data processor having one or more graphics processing units. The system additionally comprises a render server module executing on the server digital data processor and in communications coupling with the graphics processing units, where the render server module issues a command in response to a request from a first client digital data processor.
    Type: Application
    Filed: November 21, 2008
    Publication date: August 13, 2009
    Applicant: MERCURY COMPUTER SYSTEMS, INC.
    Inventors: Malte Westerhoff, Detlev Stalling
  • Patent number: 7567253
    Abstract: Described is a technology including a mechanism that when activated, detects a call to a device independent bitmap. An appropriate mirror driver, such as one or more registered as an accessibility driver, may then be notified of the call. The mechanism may be activated upon creation or selection of the device independent bitmap, and may comprise a wrapper/driver that, from the perspective of the mirror driver, simulates a call to a device dependent bitmap. The notification may be performed by having the driver communicate a function call that emulates a drawing primitive to the mirror driver.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: July 28, 2009
    Assignee: Microsoft Corporation
    Inventors: Jeremy de Souza, Pravin K. Santiago, Stephen H. Wright
  • Patent number: 7564463
    Abstract: Apparatus and method for displaying input data in various colors on a display in a portable terminal is provided. If a user selects a data color change, data is displayed in a random color. If the user selects a user selection-based data color change, the data is displayed in a user-selected color.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: July 21, 2009
    Assignee: Samsung Electronics Co., Ltd
    Inventor: Seok-Hoon Lee
  • Patent number: 7561161
    Abstract: A method and system for quantitatively measuring performance of a video interface is disclosed. The method and system determine an effectives frames per second based upon a measured frames per second that is rendered by the video interface and system resource utilization by the video interface during execution of a benchmark.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: July 14, 2009
    Assignee: Microsoft Corporation
    Inventor: Yannis Minadakis
  • Patent number: 7562161
    Abstract: The subject invention relates to a Universal Graphics Adapter (UGA) that is a hardware-independent design that encapsulates and abstracts low-level graphics hardware in a standard manner through firmware. UGA is a firmware standard, intended to wrap existing or planned hardware, including VGA. UGA does not require the use of real-mode assembly language, direct hardware register, or frame buffer access to program, thus providing advantages over conventional systems. UGA supports basic drawing operations, continuous display modes, and power management. As a firmware-based standard, UGA facilitates updating a system to support both evolving and new hardware features.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: July 14, 2009
    Assignee: Microsoft Corporation
    Inventor: Maciej Maciesowicz
  • Patent number: 7557809
    Abstract: The basic section of the multimedia data-processing system includes a CPU 1100, an image display unit 2100, a unified memory 1200, a system bus 1920, and devices 1300, 1400, and 1500 connected to the system bus. In this configuration, the CPU is formed on an LSI mounted on a single silicon wafer including instruction processing unit 1110 and display control unit 1140. Main storage area 1210 and display area 1220 are stored within the unified memory. Unified memory port 1910 for connecting the corresponding LSI and the unified memory is provided independently of the system bus intended to connect the LSI and the input/output devices. The unified memory port can be driven faster than system bus.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: July 7, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Yasuhiro Nakatsuka, Tetsuya Shimomura, Manabu Jyou, Yuichiro Morita, Takashi Hotta, Kazushige Yamagishi, Yutaka Okada
  • Publication number: 20090167773
    Abstract: The present invention provides a control method for switching display between a plurality of OSs as well as a computer system. The method comprises: detecting that the currently displayed guest operating system (GOS) is required to be switched from a first GOS to a second GOS; determining whether the first GOS satisfies a preset switching condition, and switching the currently displayed GOS to the second GOS if the preset switching condition is satisfied, and otherwise, prohibiting the switching from the currently displayed GOS. With the method and the computer system, it is possible to avoid picture distortion or blurring or system collapse in switching display between a plurality of OSs.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Applicants: BEIJING LENOVO SOFTWARE LTD., LENOVO (BEIJING) LIMITED
    Inventors: Bibo Wang, Yongfeng Liu, Chunmei Liu, Jun Chen, Zhuqiang Wang
  • Patent number: 7552244
    Abstract: The subject invention relates to a Universal Graphics Adapter (UGA) that is a hardware-independent design that encapsulates and abstracts low-level graphics hardware in a standard manner through firmware. UGA is a firmware standard, intended to wrap existing or planned hardware, including VGA. UGA does not require the use of real-mode assembly language, direct hardware register, or frame buffer access to program, thus providing advantages over conventional systems. UGA supports basic drawing operations, continuous display modes, and power management. As a firmware-based standard, UGA facilitates updating a system to support both evolving and new hardware features.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: June 23, 2009
    Assignee: Microsoft Corporation
    Inventor: Maciej Maciesowicz
  • Publication number: 20090153572
    Abstract: Disclosed are an apparatus and a method for processing data, capable of controlling the use of a graphic controller based on data usage in a memory, a variation speed of a memory data value, and/or operating states/conditions of a system.
    Type: Application
    Filed: May 22, 2008
    Publication date: June 18, 2009
    Inventor: Kyong Uk NAM
  • Patent number: 7548247
    Abstract: The present invention enables dust removal to be effectively performed even when using the operation history on images containing different pictures. An image editing apparatus includes a storage unit for storing a plurality of image data to be edited and a display unit for displaying the image data to be edited, an image processing unit adapted to perform image processing on the image data to be edited, a history storage unit adapted to store information regarding the processing history of image data to be edited which have previously undergone image processing, a position obtaining unit adapted to obtain position information regarding a position at which the image processing had been applied from the processing history information, and a display controller adapted to cause a portion, to which the image processing would be applied among the images to be edited, to be displayed on a display area for images to be edited on the display unit, based on the position information.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: June 16, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takuya Kotani
  • Patent number: 7548237
    Abstract: A visual tree structure as specified by a program is constructed and maintained by a visual system's user interface thread. As needed, the tree structure is traversed on the UI thread, with changes compiled into change queues. A secondary rendering thread that handles animation and graphical composition takes the content from the change queues, to construct and maintain a condensed visual tree. Static visual subtrees are collapsed, leaving a condensed tree with only animated attributes such as transforms as parent nodes, such that animation data is managed on the secondary thread, with references into the visual tree. When run, the rendering thread processes the change queues, applies changes to the condensed trees, and updates the structure of the animation list as necessary by resampling animated values at their new times. Content in the condensed visual tree is then rendered and composed. Animation and a composition communication protocol are also provided.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: June 16, 2009
    Assignee: Microsoft Corporation
    Inventors: Paul C. David, Gerhard A. Schneider, Matthew W. Calkins, Oreste Dorin Ungureanu, Ashraf Michail, Andrey E. Arsov, Leonardo E. Blanco
  • Publication number: 20090141032
    Abstract: A method for synchronizing an input data stream with an output data stream in a video processor. The method includes receiving an input data stream and receiving an output data stream, wherein the input data stream and the output data stream each comprise a plurality of pixels. The method further includes sequentially storing pixels of the input data stream using an input buffer and sequentially storing pixels of the output data stream using an output buffer. Timing information is determined by examining the input data stream and the output data stream. A synchronization adjustment is applied to the input buffer and the output buffer in accordance with the timing information. Pixels are output from the input buffer and the output buffer to produce a synchronized mixed video output stream.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 4, 2009
    Inventors: Dat Nguyen, Lauro Manalac
  • Patent number: 7543098
    Abstract: A computer mainboard (1), for example for notebook computers, having an integrated graphics component (2), which has at least one signal output (3), and at least one connection (5) for a display unit. A first plug connector (4) having at least one electrical connection is coupled to the signal output (3) of the integrated graphics component (2). A second plug connector (6) is coupled to the connection (5) for a display unit. At least one releasable electrical connection component (8) is provided between the first plug connector (4) and the second plug connector (6).
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: June 2, 2009
    Assignee: Fujitsu Siemens Computers GmbH
    Inventors: Friedrich Lederer, Immanuel Koehn
  • Publication number: 20090128572
    Abstract: A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.
    Type: Application
    Filed: September 22, 2008
    Publication date: May 21, 2009
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Greg A. Kranawetter
  • Publication number: 20090115788
    Abstract: A system and method is disclosed for wirelessly communicating displayable information for display on an auxiliary display device. A primary display device comprising a first display and a first wireless modem generates displayable information. The availability of one or more auxiliary display devices and information is collected to determine which of the auxiliary display devices are supported by the primary display device. The power state of the primary display device is monitored. If it is operating in a full power state, a full auxiliary display output mode is maintained allowing all, or a subset, of the displayable information generated by the first display device to be displayed on supported auxiliary display devices. If it is operating in a low or off power state, a subset auxiliary display output mode is activated and a predetermined subset of the displayable information is displayed on the supported auxiliary display devices.
    Type: Application
    Filed: November 6, 2007
    Publication date: May 7, 2009
    Inventors: James Timothy Black, Terry Lynn Cole, Mario A. Rivas
  • Patent number: 7528836
    Abstract: A CPU selectively programs one or more graphics devices by writing a control command to the command buffer that designates a subset of graphics devices to execute subsequent commands. Graphics devices not designated by the control command will ignore the subsequent commands until re-enabled by the CPU. The non-designated graphics devices will continue to read from the command buffer to maintain synchronization. Subsequent control commands can designate different subsets of graphics devices to execute further subsequent commands. Graphics devices include graphics processing units and graphics coprocessors. A unique identifier is associated with each of the graphics devices. The control command designates a subset of graphics devices according to their respective unique identifiers. The control command includes a number of bits. Each bit is associated with one of the unique identifiers and designates the inclusion of one of the graphics devices in the first subset of graphics devices.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: May 5, 2009
    Assignee: Nvidia Corporation
    Inventor: Franck R. Diard
  • Patent number: 7522169
    Abstract: A graphics processing unit has a set of parallel processing units. A primitive pipeline delivers tiles of a primitive to selected processing units of the set of processing units. An attribute pipeline distributes attributes to the selected processing units when the end of the primitive is reached, while withholding attributes from the remaining processing units of the set of processing units.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: April 21, 2009
    Assignee: Nvidia Corporation
    Inventors: Lukito Muliadi, Justin S. Legakis
  • Patent number: 7518613
    Abstract: An activity poller on an external graphics box is activated during inactivity in communication from a host information handling system to the external graphics box, such as over an external PCI Express cable. The activity poller periodically sends a memory read request from the external graphics box to the host information handling system through the PCI Express cable and analyzes the response to determine the operational state of the host information handling system. Failure of the host information handling system to respond to the polling for a predetermined time results in presentation of a locally generated diagnostic message at the external graphics box, such as message stored in shader instructions of the external graphics box.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: April 14, 2009
    Assignee: Dell Products L.P.
    Inventor: Lawrence E. Knepper
  • Patent number: 7516925
    Abstract: A display support mechanism allowing an easy operation of controlling the angle of a display screen with no requirement for a round shaft serving as an axis of rotation is obtained. This display support mechanism comprises a support shaft provided in the form of a plate, a display screen support member, having a first hole receiving the platelike support shaft, rotatable about the support shaft serving as an axis of rotation and a base support member having a second hole receiving the platelike support shaft, while at least either the display screen support member or the base support member is provided with a projecting portion brought into pressure contact with opposed surfaces of the display screen support member and the base support member for developing frictional resistance.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: April 14, 2009
    Assignee: Funai Electric Co., Ltd.
    Inventors: Kunio Sawai, Katsuyuki Yokota
  • Patent number: 7515157
    Abstract: A data transfer method is executed to transit a three-state transmitting circuit from a high-impedance state into a data output state, transmit a preamble (dummy data) onto a bus, and sequentially transmit the essential data. The shortening of a waveform caused in the first data piece after the transition from the high-impedance state into the data output state is executed against the preamble and no shortening of a waveform is not brought about in the essential data subsequent to the preamble. This makes it possible to exclude the limitation on speeding up the data transfer imposed by the shortening of the waveform.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: April 7, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Toyohiko Komatsu, Hideki Osaka, Masashi Horiguchi, Susumu Hatano, Kazuya Ito
  • Publication number: 20090085920
    Abstract: Methods for controlling complementary dual displays for use with an electronic device are presented including: receiving an input for display on a non-native display, where the input includes a native user interface (UI) input and a non-native UI input, and where the non-native display is a bistable, low frame rate display; if the input is the native UI input, sending the first native UI input to a corresponding application, processing the native UI input by the corresponding application, calling a non-native API for forwarding the processed native UI input to a non-native display driver, and sending a non-native display signal to the non-native display; receiving another native UI input for display on a native display, where the native display is a refresh-based, high frame rate display; and sending the other native UI input to the corresponding application.
    Type: Application
    Filed: February 19, 2008
    Publication date: April 2, 2009
    Inventors: Albert Teng, Xiao Bin, Jack Yuan
  • Publication number: 20090085919
    Abstract: The present disclosure includes system and method of mapping shader variables into physical registers. In an embodiment, a graphics processing unit (GPU) and a memory coupled to the GPU are disclosed. The memory includes a processor readable data file that has a register file portion. The register file portion has a rectangular structure including a plurality of data items. At least two of the plurality of data items corresponding to data elements of a shader program. The data elements have different data storage types.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Lin Chen, Junhong Sun, Guofang Jiao, Chihong Zhang, Lingjun Chen
  • Publication number: 20090079732
    Abstract: A navigation system for navigating a three-dimensional (3D) scene that includes a model or object with which a user can interact. The system accommodates and helps both novice and advanced users. To do this, the system locks a cursor to a model point in a scene during panning and controls panning speed relative to a bounding box size of the scene.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 26, 2009
    Applicant: Autodesk, Inc.
    Inventors: George Fitzmaurice, Justin Matejka, Igor Mordatch, Ryan Schmidt
  • Publication number: 20090079751
    Abstract: A method, graphics card, system, and data stream for generating a deep pixel display on a display device are provided. A first set of data relating to a region associated with a display is provided. The first set of data is processed to define a pixel definition. A second set of data relating to the first pixel is determined. At least one portion of the first set of data is rearranged to form at least a portion of the second set of data. A deep pixel is defined based upon the second set of data. The present invention also includes a system that includes a display controller that is adapted to define a deep pixel based upon rearranging the portion of the first set of data.
    Type: Application
    Filed: December 3, 2008
    Publication date: March 26, 2009
    Inventor: Ian Hendry
  • Patent number: 7509502
    Abstract: The present invention provides a data processing apparatus and method for merging secure and non-secure data. The apparatus comprises at least one processor operable to execute a non-secure process to produce non-secure data to be included in an output data stream, and to execute a secure process to produce secure data to be included in the output data stream. A non-secure buffer is provided for receiving the non-secure data produced by the non-secure process, and in addition a secure buffer is provided for receiving the secure data produced by the secure process, the secure buffer not being accessible by the non-secure process. An output controller is then arranged to read the non-secure data from the non-secure buffer and the secure data from the secure buffer, and to merge the non-secure data and the secure data in order to produce a combined data stream, the output data stream then being derivable from the combined data stream.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: March 24, 2009
    Assignee: ARM Limited
    Inventors: Hedley James Francis, Ashley Miles Stevens, Andrew Christopher Rose
  • Patent number: 7502076
    Abstract: A method and apparatus for a digital video display. A digital display device receives an analog signal representing an image formed of pixels in video lines and a signal containing a synchronization waveform for the image. An analog-to-digital converter (ADC) receives the analog signal and converts it to a sampled digital waveform. A phase-locked loop including a programmable frequency divider controls the sampling time for the ADC. The programmable frequency divider is controlled by a dividing-ratio algorithm that selects a dividing ratio, measures the number of pixels in a video line using the dividing ratio, and recomputes the dividing ratio by multiplying the selected dividing ratio by the expected number of pixels in a video line and dividing by the measured number of pixels. The sampling phase for the ADC is selected by a sampling-phase control algorithm that minimizes a function representative of the flatness of the sampled digital waveform.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 10, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Liming Xiu, Wen Li, Xiaopeng Li
  • Publication number: 20090059346
    Abstract: An optical device suitable for forming a pixel in a video display. The optical device includes a first layer having a first refractive index; a second layer over the first layer, the second layer having a second refractive index less than the first refractive index; and a third layer over the second layer, the third layer having a third refractive index larger than the second refractive index; and a fourth layer that is at least partially optically absorptive, wherein the optical stack and the fourth layer are a first distance from one another when the device is in a first state and are a second distance from one another when the device is in a second state, the first distance different from the second distance.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 5, 2009
    Applicant: QUALCOMM Incorporated
    Inventor: Gang Xu