Abstract: A graphics processing system is provided. The graphics processing system comprises a display unit, a frame buffer, an interface, and a controller. The frame buffer, defined by an initial pointer and a boundary pointer first image data in the frame buffer, stores first image data corresponding to a first image area displayed on the display unit. The interface receives a scrolling request directing the first image to scroll in a vertical and/or horizontal direction. The controller determines a reading pointer of the frame buffer according to the initial and boundary pointers and the scrolling request, loads new image data into a memory location at which a particular part of the first image data is stored.

Abstract: The display control method includes the steps of: making a first determination of whether the analog RGB signal is present or absent, and switching an input to the analog RGB signal and displaying an image expressed by the analog RGB signal when the analog RGB signal has been determined to be present; making a second determination of whether the digital signal is present or absent when the analog RGB signal has been determined to be absent, and switching the input to the digital signal and displaying an image expressed by the digital signal when the digital signal has been determined to be present; and starting a power-saving mode after a predetermined lapse of time when both the analog RGB signal and the digital signal have been determined to be absent.

Abstract: One embodiment of the invention discloses projector circuit boards comprising an image receiving terminal, a central processing unit, a motor driving module, a DMD and a DMD control module. The image receiving terminal receives an image signal and transmits the received image signal to the central processing unit. The central processing unit processes the received image signal. The motor driving module drives a motor on the basis of the processed image signal to rotate a color wheel to generate a colored beam. The DMD, comprising a plurality of micro-mirrors, is used in reflecting the colored beam, transforming the colored beam into an image beam, and transmitting the image beam to a projection lens to project an image. The rotation angles of the micro-mirrors are controlled by the DMD control module coupled between the central processing unit and the DMD. The projector circuit board is perpendicular to a light path of the projection lens.

Abstract: A graphics adapter comprises a frame buffer operable to store graphics image data. The graphics adapter also comprises a network interface operable to receive at least a portion of the graphics image data, the network interface further operable to format the received graphics image data into a plurality of packets for transmission over a communication network.

Abstract: Various embodiments of a display EDID emulator system and method are disclosed.

Abstract: A graphics adapter comprises a frame buffer operable to store graphics image data. The graphics adapter also comprises a network interface operable to receive at least a portion of the graphics image data, the network interface further operable to format the received graphics image data into a plurality of packets for transmission over a communication network.

Abstract: According to one embodiment, an image processing device of the invention includes a storage portion which stores EDID information, a communication portion which executes communication based on HDMI standard with another image processing device through a communication passage, supplies the EDID information stored in the storage portion and receives an image/sound signal from the another image processing device, a reproducing portion which reproduces the image/sound signal received by the communication portion, and a changing portion which changes the EDID information stored in the storage portion when the reproducing portion cannot reproduce the image/sound signal properly.

Abstract: A memory hub permits a graphics processor to access random access memories, such as dynamic random access memories (DRAMs). In one implementation, the memory hub permits an increase in effective memory bandwidth by aggregating the memory of two or more memories. In another implementation, the memory hub permits a graphics processor to offload memory access interfacing operations to the memory hub.

Abstract: A laptop computer is disclosed. The laptop computer comprises a processor, a memory, a graphics controller, a display panel and a display housing. The display housing is for holding the display panel. The display housing has an opening for fixing a replaceable camera module or a replaceable cover module selectively. When the replaceable camera module is fixed to the opening, the replaceable camera module is electrically connected with the graphics controller and provides pixel data. The graphics controller then drives the display panel to display the pixel data.

Abstract: An interface for an integrated circuit chip is provided. The interface includes a first port configured to receive a command signal indicating whether command information or data is being transferred to the integrated circuit chip. The interface further includes a second port configured to receive the command information and the data. Coded data detection logic configured to detect a transition of the command signal indicating that the command information and the data are coded is provided. The transition of the command signal occurs subsequent to a first clock cycle indicating a type of access to the integrated circuit. A method for reducing overhead for a serial interface when receiving or transmitting data is also included.

Abstract: An object of the present invention is to improve efficiency of transfer of control information, graphic data, and the like for drawing and display control in a graphic data processor. A graphic data processor includes: a CPU; a first bus coupled to the CPU; a DMAC for controlling a data transfer using the first bus; a bus bridge circuit for transmitting/receiving data to/from the first bus; a three-dimensional graphics module for receiving a command from the CPU via the first bus and performing a three-dimensional graphic process; a second bus coupled to the bus bridge circuit and a plurality of first circuit modules; a third bus coupled to the bus bridge circuit and second circuit modules; and a memory interface circuit coupled to the first and second buses and the three-dimensional graphic module and connectable to an external memory, wherein the bus bridge circuit can control a direct memory access transfer between an external circuit and the second bus.

Abstract: A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.

Abstract: When controlling display of a UI for setting working conditions of a peripheral, a plurality of sets of stylized working data specifying working conditions for carrying out stylized operations in the peripheral are stored in a predetermined storage medium; this stylized working data is referred to when displaying a plurality of stylized operation candidates on a predetermined output device, and instruction thereof is handled; setting data indicating settings for working conditions of the handled stylized operation is stored in a predetermined storage medium; a working condition setting instruction is handled, and decision branches for setting working conditions are displayed on a predetermined output device, while handling input of working condition settings; and settings data is updated with settings of working conditions input in the working condition input/output step.

Abstract: A graphics processor is provided. The graphics processor includes a memory storing image data for presentation and a display memory region in communication with the memory, the display memory region supplying image data to a display panel for presentation. The graphics processor includes bandwidth control logic configured to monitor a lag between an output from the display memory region and an input into the display memory region. The bandwidth control logic is further configured to prevent a level of the display memory from decrementing when the lag between the output and the input is capable of causing corruption on the display panel due to a lack of data from the display memory region. A method for avoiding a buffer under run and a device are included.

Abstract: A display system comprises a plurality of display devices, a plurality of display control devices, each display device O connected to at least one display control device, a data processing device and a data network, the data processing device connected to each display control device via the data network. The data processing device is arranged to transmit a control signal to a display control device, the control signal comprising video signal configuration data, the video signal configuration data comprising timing and frequency data. Alternatively or additionally, the control signal can comprise at least one of power saving data, memory use data, brightness and contrast data, colour temperature data or display address data.

Abstract: A network management card is provided to capture a screen image of a host system for transmission over a computer network for remote viewing and remote system management. The network management card is provided with a processor which processes a program to implement a video capture sequence of operations; and a bus controller having operations controlled by the processor, which tracks events on a bus of the host system, including operations of a video subsystem of the host system, and which executes a video capture sequence of operations to capture a screen image provided by the video subsystem of the host system for transmission to a remote system over a computer network or other communications link for remote viewing and remote system management.

Abstract: A video card is controlled by a control unit to output video data to a display or through a network. The video card includes a network interface, an interface controller and a bus interface. The network interface is connected to the network to transfer the video data. The interface controller is coupled to the network interface and controlled by the control unit to output the video data to the display or through the network interface. The bus interface is coupled between the interface controller and the control unit and is for inputting the video data from the control unit to the interface controller.

Abstract: Apparatus, system, and method for arbitrating between memory requests are described. In one embodiment, a processing apparatus includes a memory request generator configured to generate memory requests specifying data for respective presentation elements. The memory request generator is configured to assign priorities to the memory requests based on a presentation order of the presentation elements. The processing apparatus also includes a memory request arbiter connected to the memory request generator. The memory request arbiter is configured to issue the memory requests based on the priorities assigned to the memory requests.

Abstract: In a transmitting terminal, a first displaying section displays, synchronously with a receiving terminal, a portion of content that has been transmitted to the receiving terminal. A second displaying section displays a portion of the content that has yet to be transmitted to the receiving terminal. A saving flag setting section sets a saving flag, the saving flag specifying whether to permit or prohibit the receiving terminal to save the content after the receiving terminal receives and displays the content. An adder adds the saving flag to the content; and a transmitter transmits the content to the receiving terminal with the saving flag.

Abstract: A raster image processor (RIP) using a self-tuning banding mode is disclosed. The RIP automatically and continuously adjusts the band size used for generating the raster image based on past performance (i.e. past data throughput values) and corresponding band sizes. At the start of each page of image, or after a certain number of pages has been processed or certain amount of time has elapsed, the RIP determines whether performance has worsened since the last band size adjustment. If it has worsened, the band size is reverted to a previous best performing value. If the performance has improved, then the band size is changed in the same direction as the last change.

Abstract: A computer system includes an integrated graphics subsystem and a graphics connector for attaching either an auxiliary graphics subsystem or a loopback card. A first bus connection communicates data from the computer system to the integrated graphics subsystem. With a loopback card in place, data travels from the integrated graphics subsystem back to the computer system via a second bus connection. When the auxiliary graphics subsystem is attached, the integrated graphics subsystem operates in a data forwarding mode. Data is communicated to the integrated graphics subsystem via the first bus connection. The integrated graphics subsystem then forwards data to the auxiliary graphics subsystem. A portion of the second bus connection communicates data from the auxiliary graphics subsystem back to the computer system. The auxiliary graphics subsystem communicates display information back to the integrated graphics subsystem, where it is used to control a display device.

Abstract: A multimodal electronic device (100) includes a shutter enabled dynamic keypad for presenting one of a plurality of keypad configurations to a user. Each keypad configuration, which is presented by an optical shutter (204) that opens or closes windows or shutters that are geometrically configured as alphanumeric or device keys or symbols. Each keypad configuration, in one embodiment, is limited to those needed for the particular mode of operation of the device (100). The optical shutter (204) is a low-resolution display that presents user actuation targets to a user in a low-resolution key area. As each mode of the device changes, the corresponding keypad configuration presented changes accordingly.

Abstract: A map user interlace is described, including a first view transmitted from a server computer system to the client computer system, the first view including a first map and the initial path displayed on the first map, the initial path being from a starting location via at least one intermediate location to an end location, a deletion selector, selection of the deletion selector causing transmission of a deletion command being indicative of removal, of a selected one of the locations, and a second view generated in response to the transmission of the deletion command, the second view including a second map and the modified path displayed on the second map, the modified path including all of the locations but not including the selected location.

Abstract: A processing architecture includes a first CPU core portion coupled to a second embedded dynamic random access memory (DRAM) portion. These architectural components jointly implement a single processor and instruction set. Advantageously, the embedded logic on the DRAM chip implements the memory intensive processing tasks, thus reducing the amount of traffic that needs to be bussed back and forth between the CPU core and the embedded DRAM chips. The embedded DRAM logic monitors and manipulates the instruction stream into the CPU core. The architecture of the instruction set, data paths, addressing, control, caching, and interfaces are developed to allow the system to operate using a standard programming model. Specialized video and graphics processing systems are developed. Also, an extended very long instruction word (VLIW) architecture implemented as a primary VLIW processor coupled to an embedded DRAM VLIW extension processor efficiently deals with memory intensive tasks.

Abstract: An apparatus for testing a display device includes a display device to display test patterns, a graphic process unit to supply analog mode signals and digital mode signals to the display device, and a control unit to allow test patterns of an analog testing mode and test patterns of a digital testing mode to be sequentially displayed on the display device upon receiving a control signal from the graphic process unit, and to output a control signal to the display device to sequentially change display characteristics of an image according to an on-screen-display mode testing menus.

Abstract: There is provided a controller that prevents any external power source from supplying its power if a host device and a monitoring device are not connected exactly through optical extension cables based on DVI standard, and that prevents a sequence for digital transmission of a video signal from being started if the external power source remains off. Only when the proper (DDC+5V) signal is generated from the host device and the external power source has been turned on, the (DDC+5V) signal is transmitted to the monitoring device, and when it is detected in the monitoring device that the transmitted signal is the proper (DDC+5V) signal, the (DDC+5V) signal is transmitted to the monitoring device.

Abstract: A bidirectional data transmission system and the transmitting method thereof are disclosed. A video graphics array interface or an interface including a display data channel is utilized in the bidirectional data transmission to transmit data in bi-direction.

Abstract: Systems and methods for delivering two data streams via two buses allow one of the buses to be used for delivering selected elements of the data stream that is primarily being delivered by the other bus. At an input rerouting circuit, the selected elements are rerouted from the second data stream into the first data stream; a token inserted in the second data stream identifies a position of the rerouted element. The modified streams are transmitted by the two buses. A receiving circuit reinserts the rerouted data element into the second data stream at the sequential position identified by the placeholder token.

Abstract: An imaging system (100) for displaying colour images is described. The imaging system (100) comprises an illumination source (102) for generating an illumination beam, an illumination splitting means (106) typically for generating different primary colour illumination beams and a plurality of image modulators (104a, 104b, 104c). The illumination splitting means (106) comprises a dynamic selecting means (108) adapted for, for a single colour image to be imaged, subsequently generating different sub-sets of primary colour sub-beams from said illumination beam and directing these sub-sets of primary colour sub-beams to a static selecting means (110).

Abstract: A graphics processing unit (GPU) context switching system is provided. The GPU renders digital 3D images based on register values therein. A video random access memory (VRAM) temporarily stores the images before the images are output to a display. A driver controls the GPU. Upon receiving a first request for rendering an image from a first application, the driver generates register values corresponding to the first application according to the first request and writes the register values to the registers of the GPU. Upon receiving a second request for rendering an image from another application, the GPU stores the register values as a first backup in the VRAM.

Abstract: A remote access device is installed on a first computing device with a first video source to receive a first video signal. A second computing device may access the first computing device via a network. The remote access comprises a second video source to provide a second video signal, a controller, a switch controlled by the controller to select one of the first video signal and the second video signal based on an instruction from the second computing device and a network interface coupled to the switch and the controller to transmit one of the first video signal and the second video signal, selected by the switch, to the second computing device.

Abstract: A PC-based computing system employing a silicon chip having a routing unit and a control unit for parallelizing multiple GPU-driven pipeline cores during a graphics application. The PC-based computing system includes system memory for storing software graphics applications, software drivers and graphics libraries, and an operating system (OS), stored in the system memory, and a central processing unit (CPU), for executing the OS, graphics applications, drivers and graphics libraries. The system also includes a CPU/memory interface module, a CPU bus, a silicon chip of monolithic construction interfaced with the CPU/memory interface module by way of the CPU bus. The routing unit (i) routes the stream of geometrical data and graphic commands from the graphics application to one or more of the GPU-driven pipeline cores, and (ii) routes pixel data output from one or more of GPU-driven pipeline cores during the composition of frames of pixel data corresponding to final images for display on the display surface.

Abstract: A parallel graphics rendering system is embodied within a host computing system and includes a plurality of graphic processing pipelines (GPPLs) and graphics processing modules. The parallel graphics rendering system supports one or more modes of parallel operation selected from the group consisting of object division, image division, and time division. a plurality of graphic processing pipelines The GPPLs support a parallel graphics rendering process that employs one or more of the object division, image division and/or time division modes of parallel operation in order to execute graphic commands and process graphics data, and render pixel-composited images containing graphics for display on a display device during the run-time of the graphics-based application. An automatic mode control module automatically controls the mode of parallel operation of the parallel graphics rendering system during the run-time of the graphics-based application.

Abstract: A video card for processing a video signal comprises an interchangeable connector module and a video processing module. The interchangeable connector module has a specific configuration. The video processing module has a connector for coupling the interchangeable connector module. The specific configuration of the interchangeable connector module sets the characteristics of the video processing module.

Abstract: Systems and methods that provide for a common device enumeration point to a class of software objects, which represent hardware and can emit 2D bitmaps, via a presentation interface component. Such presentation interface component can further include a factory component that centralizes enumeration and creation for any components that control or communicate with the frame buffer of the graphics display subsystems. Accordingly, a smooth transition can be supplied between full screen and window models, within desktop composition systems, wherein applications can readily support such transitions.

Abstract: An image pipeline performs image processing operations (for example, Bayer-to-RGB conversion, white balancing, autoexposure, autofocus, color correction, gamma correction, zooming, unsharp masking, mirroring, resizing, color space conversion) on tiles whose sizes are varied, whose widths are less than the width of the output image frame being generated, and whose heights are less than the height of the output image frame. A tile processor program executing on a processor in the camera determines configuration information for configuring each pipeline stage based on user input and camera usage. The configuration information is determined so that the pipeline outputs properly combine to form the output image frame. The sizes, shapes, locations and processing order of the tiles are determined such that a single tile of a particular size is in a desired location with respect to the overall image frame, thereby facilitating such functions as autofocus, autoexposure and face detection.

Abstract: A multimedia system and method that provides easy universal text searching for non-technical users, is disclosed. A configuration of the multimedia system and method of the present invention also facilitates content delivery through multiple, independent, simultaneous feeds from a single source to two or more different destinations without impairing audio and/or video and/or data stream quality.

Abstract: A multi-display system and a method thereof which solves an overloading problem on a memory bus. The multi-display system includes displays which independently display separate images, a main memory which stores input image signals, image signal process units which are disposed corresponding to the displays and process the image signals according to the corresponding displays, a secondary memory which stores the image signals processed by the image signal process units, and a controller which controls the image signal process units to display the image signals stored in the main memory on each of the corresponding displays. The controller controls the image signal process units to display the image signals stored in the secondary memory on some of the displays in response to overloading of the image signals on the memory bus, through which the image signals are retrieved from, where the image signals are displayed on more than two displays.

Abstract: A USB image transmission system is provided. The USB image transmission system may include a content source configured to be operatively coupled to a USB-enabled display device. Image data may be transmitted over the USB connection from the content source for display by the display device. In some embodiments, a USB collaboration hub may enable multiple content sources to be operatively linked through a USB connection to one or more USB-enabled display devices.

Abstract: A data providing apparatus stores data waiting to be rendered, and communicates with a data rendering apparatus through a commonly supported standard. The data providing apparatus includes a digital media controller (DMC) for controlling the data rendering apparatus, a controller outputting the data waiting to be rendered, a converter converting the data waiting to be rendered to be suitable for the data rendering apparatus, and a streaming server receiving the converted data. The controller controls the data rendering apparatus through the DMC such that the streaming server transmits the converted data to the data rendering apparatus. A data providing method is also disclosed.

Abstract: Embodiments of a graphics processor and method for controlling a display panel in self-refresh and low-response time modes are generally described herein. Other embodiments may be described and claimed. In some embodiments, a self-refresh (SR) control signal is generated for a display controller when an image represented by the frames becomes static instructing the display controller to enter SR mode. A lower-response-time (LRT) control signal is generated for the display controller when the image becomes active instructing the display controller to enter an LRT mode.

Abstract: The invention provides a system and method of testing a computer graphic display controller applicable to a computer platform, for allowing the user to perform testing procedures on a graphic display controller installed in a computer, characterized in that all video formats that need to be set for testing the graphic display controller can be automatically retrieved and displayed on the user's operating interface, thereby enabling the user to conveniently and quickly be informed of all video formats that are supported by the computer of an indicated graphic display controller under test, and also the efficiency of testing can be improved by reducing the number of times that the user has to click the mouse buttons.

Abstract: In one embodiment, a display device comprises a graphics interface, an image processing system, an input device coupled to the image processing system to receive a screen capture signal and transmit the screen capture signal to the image processing system, and a storage subsystem coupled to the image processing system to store, in response to the screen capture signal, screen capture data generated by the image processing system.

Abstract: Embodiments of the present invention provide detection, enumeration, and software configuration of optional choice of add-in cards types through a multiplexed bus interface. The PROM allows identification of the add-in device and software configuration to adapt to support it. In particular, plug and play detection of digital display codec devices and display and integration of software and firmware support for devices inside the add-in card are provided for.

Abstract: A method for acquiring a computer screen image is disclosed that includes the steps of: acquiring the update region of a non-hardware-accelerated image and adding the acquired update region to an update-region list; acquiring a hardware-accelerated image by intercepting the invocation of a graphics/image hardware-acceleration interface; and combining update regions in the update-region list and acquiring the image data of the combined update region from a frame buffer. With the method of the present invention, both hardware-accelerated and non-hardware-accelerated images on the computer screen can be acquired rapidly at the same time.

Abstract: An embodiment of the present invention is a technique to interface a display card through an interface connector. A video output device on the display card generates digital video output signals from a graphics chipset on a motherboard. The card is plugged into an interface connector on the motherboard. The interface connector is compatible with a first interface standard. The video output device is compatible to a second interface standard. A card detector is coupled to the video output device and the interface connector to enable the video output device if the graphics chip set supports the video output device.

Abstract: A graphical display system utilizes a plurality of display devices and a plurality of graphical acceleration units for rendering graphical data to the display devices. More specifically, each of the plurality of graphical acceleration units respectively interfaces a portion of graphical data defining an image to one of the display devices. Each of the display devices displays a portion of the image based on the graphical data rendered to it. To make the system more efficient and/or to improve image quality, at least one of the graphical acceleration units includes a plurality of graphical pipelines for rendering the graphical data to be displayed by the display device that is interfaced with the one graphical acceleration unit.

Abstract: In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.

Abstract: A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data, and interface circuitry adapted selectively to couple the graphics subsystem to a local memory through electrical connectors and to couple the memory controller hub to a graphics controller through the electrical connectors.

Abstract: A device and a method for updating the function of a monitor according to the invention. By using the USB signal lines directly for data transmission and recording the data of a monitor controller to the erasable programmable read only memory, data update can be achieved. Moreover, the erasable programmable read only memory can be updated by separating the recording path and the normal visual path using a recording path separator of the monitor controller. Compared to the prior art, the device and the method of the invention are more convenient and time saving for function update of the monitor.