Plural Storage Devices Patents (Class 345/536)
  • Patent number: 11798198
    Abstract: Embodiments are generally directed to compression in machine learning and deep learning processing. An embodiment of an apparatus for compression of untyped data includes a graphical processing unit (GPU) including a data compression pipeline, the data compression pipeline including a data port coupled with one or more shader cores, wherein the data port is to allow transfer of untyped data without format conversion, and a 3D compression/decompression unit to provide for compression of untyped data to be stored to a memory subsystem and decompression of untyped data from the memory subsystem.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: October 24, 2023
    Assignee: INTEL CORPORATION
    Inventors: Joydeep Ray, Ben Ashbaugh, Prasoonkumar Surti, Pradeep Ramani, Rama Harihara, Jerin C. Justin, Jing Huang, Xiaoming Cui, Timothy B. Costa, Ting Gong, Elmoustapha Ould-ahmed-vall, Kumar Balasubramanian, Anil Thomas, Oguz H. Elibol, Jayaram Bobba, Guozhong Zhuang, Bhavani Subramanian, Gokce Keskin, Chandrasekaran Sakthivel, Rajesh Poornachandran
  • Patent number: 11663707
    Abstract: A method for image processing, which comprises the following steps: Generating a first histogram from a first image; Calculating a first parameter profile from the first image indicative of the quality of the first image; Adjusting the first parameter profile to generate a second parameter profile; Using the second parameter profile to generate a statistical distribution via a statistical distribution generator, wherein the statistical distribution is characterized by at least three parameters; Using the statistical distribution to perform a histogram specification to the first histogram of the first image to generate a second histogram; Generating a second image based on the first image and the second histogram.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: May 30, 2023
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Guoyin Wang, Tong Zhao, Bin Xiao
  • Patent number: 11599282
    Abstract: A memory system and an operating method thereof are disclosed. An operating method of a memory system including a nonvolatile memory device and a controller configured to control the nonvolatile memory device includes the controller updating original data of firmware stored in the nonvolatile memory device, the controller transmitting a notification signal, which notifies a host device of completion of the updating of the original data, to the host device when the updating of the original data is completed, and the controller updating backup data of the firmware stored in the nonvolatile memory device after the notification signal is transmitted.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 7, 2023
    Assignee: SK hynix Inc.
    Inventor: Joo Young Lee
  • Patent number: 11561930
    Abstract: A fleet of query accelerator nodes is established for a data store. Each accelerator node caches data items of the data store locally. In response to determining that an eviction criterion has been met, one accelerator node removes a particular data item from its local cache without notifying any other accelerator node. After the particular data item has been removed, a second accelerator node receives a read query for the particular data item and provides a response using a locally-cached replica of the data item.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: January 24, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: Kiran Kumar Muniswamy Reddy, Anand Sasidharan, Omer Ahmed Zaki, Brian O'Neill
  • Patent number: 11487755
    Abstract: A system includes reception of a first fragment of a first result set of a first one of a plurality of queries, storage of the first fragment of the first result set in a first local buffer associated with the first one of the plurality of queries, reception of a first fragment of a second result set of a second one of a plurality of queries, storage the first fragment of the second result set in a second local buffer associated with the second one of the plurality of queries, determination to flush the first local buffer, and, in response to the determination, transmit all fragments currently stored in the first local buffer to a client from which the plurality of queries was received with an identifier of the first one of the plurality of queries, before receiving all fragments of the first result set.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: November 1, 2022
    Assignee: SAP SE
    Inventors: Pierre-Olivier Ceffis, Stephane Lecercle
  • Patent number: 11451699
    Abstract: An electronic device includes a processor, and an image sensor module, wherein the image sensor module may include an image sensor, and a control circuit electrically connected to the image sensor and connected to the processor through an interface, and wherein the control circuit may obtain raw image data through the image sensor, sense at least one pixel data included in the raw image data and at least one error data based on a difference between pixel values of the at least one pixel data and each of at least one other pixel data adjacent to the at least one pixel data, generate attribute information corresponding to the at least one error data, correct the at least one error data based on a specified scheme, compress the raw image data in which the at least one error data are corrected, and transmit the compressed raw image data and the attribute information to the processor.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: September 20, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung Ju Chun, Jin Min Bang, A Rang Lee, Jong Bum Choi, Sung Oh Kim, Young Jo Kim, Hyun Hee Park, Ha Joong Park
  • Patent number: 11436761
    Abstract: In an approach to image compression while retaining feature information at original coordinates, one or more computer processors compress an image while retaining pattern and feature information at original coordinates, wherein the image is a full resolution 3D image. The one or more computer processors create one or more image subsets based on the one or more determined regions of interest identified by utilizing a first pass selection of the regions of interest based on the compressed image. The one or more computer processors train one or more models based the created one or more image subsets that contain one or more regions of interest based on the compressed image.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: September 6, 2022
    Assignee: International Business Machines Corporation
    Inventors: Jean-Armand Broyelle, Marc Fiammante
  • Patent number: 11373268
    Abstract: The present disclosure relates to methods and apparatus for hybrid rendering of video/graphics content by a graphics processing unit. The apparatus can configure the graphics processing unit of a display apparatus to perform multiple rendering passes for a frame of a scene to be displayed on a display device. Moreover, the apparatus can control the graphics processing unit to perform a first rendering pass of the multiple rendering passes to generate a first render target that is stored in either an on-chip graphics memory of the GPU or a system of the display apparatus. The apparatus can also control the graphics processing unit to perform a second rendering pass to generate a second render target that is alternatively stored in the system memory of the display apparatus or on-chip graphics memory of the GPU.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: June 28, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Srihari Babu Alla, Jonnala Gadda Nagendra Kumar, Avinash Seetharamaiah, Andrew Evan Gruber, Richard Hammerstone, Thomas Edwin Frisinger, Daniel Archard
  • Patent number: 11334277
    Abstract: Techniques for issuing efficient writes to an erasure coded storage object in a distributed storage system are provided. In one set of embodiments, a node of the system can receive a write request for updating a logical data block of the storage object, write data/metadata for the block to a record in a data log of a metadata object of the storage object (where the metadata object is stored on a performance storage tier), place the block data in a free slot of an in-memory bank, and determine whether the in-memory bank has become full. If the in-memory bank is full, the node can further allocate a segment in a capacity object of the storage object for holding contents of the in-memory bank (where the capacity object is stored on a capacity storage tier), and write the in-memory bank contents via a full stripe write to the allocated segment.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 17, 2022
    Assignee: VMWARE INC.
    Inventors: Wenguang Wang, Vamsi Gunturu, Eric Knauft, Pascal Renauld
  • Patent number: 11334276
    Abstract: Techniques for supporting large segments when issuing writes to an erasure coded storage object in a distributed storage system are provided. In one set of embodiments, a node of the system can pre-allocate a segment of space in a capacity object of the storage object, receive a write request for updating a logical data block of the storage object, write data/metadata for the block to a record in a data log of a metadata object of the storage object, place the block in an in-memory bank, and determine whether the in-memory bank has become full. If so, the node can compute/fill-in one or more parity blocks for each stripe of the storage object in the in-memory bank and write, based on a next sub-segment pointer pointing to a free sub-segment of the pre-allocated segment, the contents of the in-memory bank via a full stripe write to the free sub-segment.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: May 17, 2022
    Assignee: VMWARE INC.
    Inventors: Wenguang Wang, Vamsi Gunturu
  • Patent number: 11234157
    Abstract: A location for application processing is selected based on latency measurements associated with a mobile network. Instead of performing application processing at a predetermined location within a network, the application processing for an application is located within the network based on latencies measured within the network as well as other considerations. For instance, the determination of the location within the network can be based on latency measurements, target latency specifications of an application, the availability of computing resources at a location, and the like. A latency aware routing controller selects one or more locations to perform application processing. The locations may include computing resources located at or near the wireless base station (BS), between the base station and other locations within the network, at the core network, at the Internet, and/or at other locations to provide applications with the computing resources to perform the application processing.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: January 25, 2022
    Assignee: T-Mobile USA, Inc.
    Inventors: Gaviphat Lekutai, Taha Najeeb, Shuqing Xing, Brian Allan Olsen
  • Patent number: 11194749
    Abstract: A multi-chip package includes a logic integrated circuit (IC) die formed with plural memory controller circuits, a first memory IC die and a second memory IC die. The second memory IC die is mounted to the first memory IC die. The first memory IC die and the logic IC die are mounted to one another. The logic IC die includes a serial link interface for coupling to multiple serial links. The first memory die includes a first memory group accessed by a first one of the plural memory controller circuits, and a second memory group accessed by a second one of the plural memory controller circuits.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: December 7, 2021
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Kishore Kasamsetty
  • Patent number: 11189065
    Abstract: The present disclosure provides at least an apparatus for a depth enhanced image editing. In an example, the apparatus includes a processor and a storage, comprising instructions that when executed with the processor cause the apparatus to store a received depth enhanced image. In an example, the depth enhanced image comprises image data, depth data, and calibration data. The apparatus may apply an edit to the image data and the calibration data without editing the depth data in response to a request for an image edit. The apparatus may further return an edited depth enhanced image.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: November 30, 2021
    Assignee: Intel Corporation
    Inventors: Jonathan Abramson, Avigdor Eldar, Omer Levy
  • Patent number: 11042962
    Abstract: An apparatus for filtering multiple images so that they can be stitched together to form a blended image, the apparatus comprising a plurality of filters configured such that: (i) each filter is configured to process only images from the multiple images that will be non-overlapping with each other in the blended image; and (ii) images that will overlap with each other in the blended image are processed by different filters.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: June 22, 2021
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: James Hutchinson, Thomas Oscar Miller, Stephen John Barlow, Jack Stuart Haughton
  • Patent number: 11042279
    Abstract: A method displays a user interface for a graphical view application. The user interface includes shelves for specifying graphical views of a dataset. A user associates first and second fields of the dataset with first and second shelves. In response, the method displays graphical views in the user interface according to the first and second fields. Each of the graphical views corresponds to a respective distinct value of the second field and each of the graphical views includes a set of graphical marks. When the first shelf defines color encoding, each graphical mark has a respective color that corresponds to a respective data value associated with the first field. When the first shelf defines size encoding, each graphical mark has a respective size that corresponds to a respective data value associated with the first field.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: June 22, 2021
    Assignee: Tableau Software, Inc.
    Inventors: Jock Douglas Mackinlay, Christopher Richard Stolte
  • Patent number: 11029954
    Abstract: According to one general aspect, an apparatus may include execution unit circuits, each configured to access one or more pieces of data. The apparatus may include local register file circuits, each associated with a respective execution unit circuit and each configured to store data. The apparatus may include a main register circuit. The main register circuit may include a main register file circuit configured to store data. The main register circuit may include a local index register circuit configured to map an index supplied by the main register file circuit to a storage location in the local register file circuits. The main register circuit may be configured to: receive from a control circuit a request to access the storage location of the specified data, and supply a target local register file circuit with the target local register file circuit's storage location of the specified data.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: June 8, 2021
    Inventors: Wilson Wai Lun Fung, Mrinal Deo
  • Patent number: 11003498
    Abstract: Systems and methods are provided for fail-safe loading of information on a user interface, comprising receiving, via a modular platform, requests for access to a mobile application platform from a plurality of mobile devices, opening and directing the requests for access to the mobile application platform to a sequential processor of an application programming interface (API) gateway when a parallel processor of the API gateway is unresponsive to requests for access to the mobile application platform for a predetermined period of time, periodically checking a status of the parallel processor, and redirecting the requests for access to the mobile application platform to the parallel processor when the parallel processor is capable of processing requests for access to the mobile application platform.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: May 11, 2021
    Assignee: Coupang Corp.
    Inventors: Yong Seok Jang, Hong Gwi Joo
  • Patent number: 10923011
    Abstract: The disclosure provides a bistable display device and a driving circuit. The bistable display device includes a display panel and the above-described driving circuit, wherein the driving circuit includes a source driver, a first image buffer, a second image buffer, and a timing controller. The source driver is coupled to the display panel to drive the display panel according to a pixel signal. The timing controller is coupled to the first image buffer, the second image buffer, and the source driver. The timing controller alternately selects a first image signal temporarily stored in the first image buffer and a second image signal temporarily stored in the second image buffer as a current image signal and a previous image signal. The timing controller performs a look-up mechanism based on the current image signal and the previous image signal to generate the pixel signal.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: February 16, 2021
    Assignee: ITE Tech. Inc.
    Inventors: Tzu-Yi Wu, Ming-Hsun Sung
  • Patent number: 10896657
    Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, an object space adjuster communicatively coupled to the graphics subsystem to adjust an object space parameter based on a screen space parameter, and a sample adjuster communicatively coupled to the graphics subsystem to adjust a sample parameter of the graphics subsystem based on a detected condition. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: January 19, 2021
    Assignee: Intel Corporation
    Inventors: Louis Feng, Altug Koker, Tomasz Janczak, Andrew T. Lauritzen, David M. Cimini, Nikos Kaburlasos, Joydeep Ray, John H. Feit, Travis T. Schluessler, Jacek Kwiatkowski, Philip R. Laws, Devan Burke, Elmoustapha Ould-Ahmed-Vall, Abhishek R. Appu
  • Patent number: 10866873
    Abstract: A display device includes a display panel including a plurality of data lines; a plurality of data drive ICs configured to provide data voltages to the data lines; and a controller configured to rearrange video data received from an external device and transmit region-wise video data to the plurality of data drive ICs, to receive coordinates of information regions included in the video data and store video data of the information regions in advance, to calculate a checksum for checking an error in the region-wise video data based on the coordinates, to transmit the coordinates and the checksum to the data drive ICs and receive feedbacks about comparison results with respect to the checksum, and when a data drive IC that has failed is confirmed based on the feedback results, to update video data of the information region displayed by the data drive IC to region-wise video data of a normal data drive IC and output the video data.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: December 15, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Myungkook Moon, Semin Koong, Haejong Jang
  • Patent number: 10803973
    Abstract: A memory management method and a storage controller using the same are provided. The method includes reading a target word-line to identify a plurality of raw Gray code indexes corresponding to a plurality of memory cells of the target word-line; performing a decoding operation on raw data of the target word-line to identify a plurality of decoded Gray code indexes corresponding to the memory cells; calculating a plurality of Gray code absolute bias values corresponding to the memory cells according to the raw Gray code indexes and the decoded Gray code indexes; and identifying one or more abnormal memory cells among the memory cells according to the Gray code absolute bias values; and recording the one or more abnormal memory cells into an abnormal memory cell table, wherein a Gray code absolute bias value of each of the one or more abnormal memory cells is greater than a bias threshold.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: October 13, 2020
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Chia-Wei Chang
  • Patent number: 10782875
    Abstract: A method for taking medically precise measurements with a multi-touch input surface 206 having the steps of displaying, by a graphical user interface: a first point 101 on an ultrasound image 103, wherein the first point 101 is configured to translate with two dimensions of translational freedom upon actuation by a user, and a floating magnification window 102, wherein displaying the floating magnification window 102 comprises calculating a square frame based on the first point 101, a size of an area of magnification, a width of the multi-touch input surface 206, and a height of the multi-touch input surface 206, wherein the square frame is configured to crop a copy 104 of the ultrasound image 103.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: September 22, 2020
    Assignee: EMAGINE SOLUTIONS TECHNOLOGY LLC
    Inventors: Jose L. Juarez, Courtney Williams
  • Patent number: 10747095
    Abstract: A method for calibrating a projection device, the projection device being equipped with at least two controllable and regulatable light sources, which each transmit a beam component of a scanning beam. The calibration method includes defining a reference beam for the scanning beam; determining, in each instance, a dewarping function for the x-projector coordinate and for the y-projector coordinate of the reference beam, each dewarping function converting the specific projector coordinate to corresponding image coordinates, which are assigned to the image information; determining, in each instance, an offset function for the x-projector coordinate and the y-projector coordinate for all beam components, each offset function approximating the offset between the specific x- or y-image coordinate of the reference beam and the x- or y-image coordinate of the respective beam component.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: August 18, 2020
    Assignee: Robert Bosch GmbH
    Inventors: Alexander Ehlert, Julian Heinzelmann
  • Patent number: 10740882
    Abstract: An image correction apparatus includes a second memory configured to store at least a part of an input image; a first memory configured to selectively read a first image block from the second memory and store the selectively read first image block in the first memory; a controller configured to control the first image block to be selectively read from the second memory and to be stored in the first memory based on a predetermined output image generation rule which is determined based on a type of an input image stored in the second memory, wherein the controller is further configured to determine whether the first image block corresponding to a second image block is stored in the first memory based on the predetermined output image generation rule, and when the first image block is not stored in the first memory, read the first image block from the second memory and store the first image block in the first memory, and generate an output image based on the first image block stored in the first memory.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: August 11, 2020
    Assignee: HANWHA TECHWIN CO., LTD.
    Inventor: Kwan Hoo Kim
  • Patent number: 10726517
    Abstract: One embodiment provides for a parallel processor comprising a processing array within the parallel processor, the processing array including multiple compute blocks, each compute block including multiple processing clusters configured for parallel operation, wherein each of the multiple compute blocks is independently preemptable. In one embodiment a preemption hint can be generated for source code during compilation to enable a compute unit to determine an efficient point for preemption.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: July 28, 2020
    Assignee: Intel Corporation
    Inventors: Altug Koker, Ingo Wald, David Puffer, Subramaniam M. Maiyuran, Prasoonkumar Surti, Balaji Vembu, Guei-Yuan Lueh, Murali Ramadoss, Abhishek R. Appu, Joydeep Ray
  • Patent number: 10642455
    Abstract: The disclosure relates to generation of at least one second instance of a user interface presented by a first device. The first device stores data objects comprising event information associated with user interfaces presented by the first device based on data from a source of data. The first device can generate a user interface based on data from the source of data and at least one of the stored data objects. The at least one data object is communicated from the first device for use by at least one second device in generation of a second instance of the generated user interface by the at least one second device.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 5, 2020
    Assignee: SSH COMMUNICATIONS SECURITY OYJ
    Inventor: Jarkko Ketola
  • Patent number: 10623659
    Abstract: An image processing system, an image processing method, and a program capable of implementing an association of a person appearing in a video image through a simple operation are provided. The image processing system includes an input device which accepts input of video images captured by a plurality of video cameras, a display screen generating unit which causes a display device to display at least one video image among the video images inputted from the input device, and a tracked person registering unit which is capable of registering one or more persons appearing in the video image displayed by the display device. When a person appears in the video image displayed by the display device, the display screen generating unit selectably displays person images of one or more persons, which are associable with the person appearing in the video image and which are registered by the tracked person registering unit, in a vicinity of the video image.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: April 14, 2020
    Assignee: NEC CORPORATION
    Inventors: Yusuke Takahashi, Hiroo Ikeda
  • Patent number: 10602014
    Abstract: An image processing apparatus including two image reading units can sequentially execute image processing of front face image data and back face image data of a document using a single image processing circuit. The image processing apparatus transfers the first face image data of the read document to a first ring buffer and the second face image data thereof to a second ring buffer, respectively, while switching, predetermined unit by unit, whether to transfer the first face image data or the second face image data of the image data to an image processing unit.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 24, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Seijiro Morita
  • Patent number: 10554905
    Abstract: An image processing system, an image processing method, and a program capable of implementing an association of a person appearing in a video image through a simple operation are provided. The image processing system includes an input device which accepts input of video images captured by a plurality of video cameras, a display screen generating unit which causes a display device to display at least one video image among the video images inputted from the input device, and a tracked person registering unit which is capable of registering one or more persons appearing in the video image displayed by the display device. When a person appears in the video image displayed by the display device, the display screen generating unit selectably displays person images of one or more persons, which are associable with the person appearing in the video image and which are registered by the tracked person registering unit, in a vicinity of the video image.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: February 4, 2020
    Assignee: NEC CORPORATION
    Inventors: Yusuke Takahashi, Hiroo Ikeda
  • Patent number: 10533871
    Abstract: A computing device receives, via a communication network, map data including (i) a description of geometries of map features and (ii) a first description of visual characteristics defined separately and independently of the description of the geometries. The computing device applies the visual characteristics to the geometries to render a first digital map. The computing device then receives, via the communication network, a second description of visual characteristics for application to the geometries previously provided to the computing device as part of the map data, and applies the second visual characteristics to the previously received geometries of the plurality of map features to render a second digital map.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: January 14, 2020
    Assignee: GOOGLE LLC
    Inventors: Jennifer Maurer, Sean Egan, Brian Cornell
  • Patent number: 10523985
    Abstract: A client device receives, from a server, first content directed to a first buffer in the client device and second content directed to a second buffer in the client device. The second buffer is deeper than the first buffer. The client device buffers the first content in the first buffer and buffers the second content in the second buffer. At least a portion of the second content is buffered in the second buffer simultaneously with buffering the first content in the first buffer. The client device selects between the first content in the first buffer and the second content in the second buffer, and provides the selected content for display.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: December 31, 2019
    Assignee: ACTIVEVIDEO NETWORKS, INC.
    Inventors: Bert Visscher, Gerrit Hiddink, Maarten Hoeben
  • Patent number: 10515712
    Abstract: A memory management method and a storage controller using the same are provided. The method includes reading a target word-line to identify a plurality of raw Gray code indexes corresponding to a plurality of memory cells of the target word-line; performing a decoding operation on raw data of the target word-line to identify a plurality of decoded Gray code indexes corresponding to the memory cells; calculating a plurality of Gray code absolute bias values corresponding to the memory cells according to the raw Gray code indexes and the decoded Gray code indexes; and identifying one or more abnormal memory cells among the memory cells according to the Gray code absolute bias values; and recording the one or more abnormal memory cells into an abnormal memory cell table, wherein a Gray code absolute bias value of each of the one or more abnormal memory cells is greater than a bias threshold.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: December 24, 2019
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventors: Yu-Hua Hsiao, Chia-Wei Chang
  • Patent number: 10469767
    Abstract: An information processing apparatus that acquires first image data captured by a first image capturing unit; acquires second image data captured by a second image capturing unit; controls a display to operate in a first mode in which the first and second images are simultaneously displayed; controls the display to operate in a second mode in which a relationship of the second image with the first image is indicated; and selects between the first and second modes based on a predetermined condition.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 5, 2019
    Assignee: SONY CORPORATION
    Inventor: Yasuhito Shikata
  • Patent number: 10417815
    Abstract: Improvements in graphics processing pipelines are disclosed. The graphics processing pipeline processes graphics objects in a particular order (application programming interface order—“API order”) as requested by an application or other entity. However, certain components within the graphics processing pipeline, such as the pixel shader stage, may process those objects out of order. A technique is provided herein to allow the pixel shader stage to complete and export processed fragments out of order. The technique includes using a scoreboard to determine whether fragments ready to be exported from a pixel shader stage are the newest fragments in API order. If the fragments are the newest in API order, then the fragments are exported. If the fragments are not the newest in API order, then the fragments are discarded.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: September 17, 2019
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Pazhani Pillai, Christopher J. Brennan
  • Patent number: 10368010
    Abstract: An image processing system, an image processing method, and a program capable of implementing an association of a person appearing in a video image through a simple operation are provided. The image processing system includes an input device which accepts input of video images captured by a plurality of video cameras, a display screen generating unit which causes a display device to display at least one video image among the video images inputted from the input device, and a tracked person registering unit which is capable of registering one or more persons appearing in the video image displayed by the display device. When a person appears in the video image displayed by the display device, the display screen generating unit selectably displays person images of one or more persons, which are associable with the person appearing in the video image and which are registered by the tracked person registering unit, in a vicinity of the video image.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: July 30, 2019
    Assignee: NEC CORPORATION
    Inventors: Yusuke Takahashi, Hiroo Ikeda
  • Patent number: 10264293
    Abstract: A method of displaying video embedded in a user interface is performed at an electronic device such as a server system or client device. The method includes obtaining user-interface frames having a first placeholder for a first video window and obtaining source video frames having a first video stream in the first video window. The source video frames and the user-interface frames are interleaved to form an output video stream, which is provided for decoding and display.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: April 16, 2019
    Assignee: ActiveVideo Networks, Inc.
    Inventor: Maarten Hoeben
  • Patent number: 10244143
    Abstract: An image processing apparatus scans an image of a document into image data, splits the image data into a plurality of areas to generate split image data, magnifies the split image data, and aggregates the magnified split image data at least based on a font size of one or more characters included in the split image data.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: March 26, 2019
    Assignee: Ricoh Company, Ltd.
    Inventor: Hiroyuki Baba
  • Patent number: 10216993
    Abstract: A non-transitory computer readable medium storing a program causing a computer to execute a parsing process including extracting one or more figure descriptions from a first entity of document in a sequential order and calculating the number of figure descriptions from the first entity of the document having figure descriptions; extracting one or more drawing pages from a second entity of document in a sequential order and calculating the number of drawing pages from the second entity of the document having drawing pages; computing a varying list of figure descriptions; and combining the varying list of figure descriptions with one of the one or more drawing pages to produce the single output, whereby a user of the single output can readily identify a figure number of the one of the one or more drawing pages and associate the figure number with a description from the varying list of figure descriptions.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: February 26, 2019
    Inventor: Cheng Ning Jong
  • Patent number: 10152766
    Abstract: An image processor, an application processor, a method of operating an image processor, and a chips set of an image processor are provided. The image processor includes a scaler configured to perform scaling on an input image and generate a scaled input image; and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal. The application processor includes a memory configured to store an input image; and an image processor configured to scale the input image, wherein the image processor comprises a scaler configured to perform scaling on the input image and generate a scaled input image and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: December 11, 2018
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Seong Woon Kim, Sung Chul Yoon, Sang Hoon Lee, Ha Na Yang
  • Patent number: 10140026
    Abstract: The present invention provides a data storage device including a flash memory and a random access memory. The flash memory has a data mapping table arranged to record a plurality of mapping relationships between the logical addresses and the physical addresses of a plurality of pages of the flash memory. The data mapping table is divided into a plurality of data mapping sets. The random access memory has a cache area, a sequential-order table, a reverse-order table and a cache-area mapping table. The cache area stores part of the data mapping sets. The cache-area mapping table records the set indexes of the data mapping sets of the cache area. The sequential-order table records the order that the data mapping sets are read from the cache area. The reverse-order table records the opposite order that the data mapping sets are read from the cache area.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: November 27, 2018
    Assignee: SILICON MOTION, INC.
    Inventor: Kuan-Yu Ke
  • Patent number: 10120580
    Abstract: In an example, a method of managing direct memory access (DMA) descriptors for commands to a non-volatile semiconductor storage device includes requesting DMA descriptors from the host system for each of a plurality of the commands stored in a command random access memory (RAM). The method further includes storing the DMA descriptors for each of the plurality of the commands in free descriptor regions in a descriptor RAM. The method further includes maintaining a dynamic descriptor list in the descriptor RAM for each of the plurality of commands, the dynamic descriptor list for each of the plurality of commands comprising occupied descriptor regions in the descriptor RAM having associated DMA descriptors.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: November 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventor: Sancar Kunt Olcay
  • Patent number: 10115132
    Abstract: A distribution apparatus includes a memory and a processor programmed to distribute control information and a first content to a terminal apparatus. The control information causes the terminal apparatus to execute displaying the first content superimposed onto a second content in a first display mode, the second content having a higher transparency than the first content; detecting an input operation causing the first content to move relative to the display region; in response to the detected input operation and the first content moving, changing the first display mode to a second display mode by changing a transparency of at least one of the first content and the second content, such that the first content and the second content are visible in the display region; and in response to completion of the input operation and the first content not moving, changing the second display mode to the first display mode.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: October 30, 2018
    Assignee: YAHOO JAPAN CORPORATION
    Inventors: Tatsuaki Suzuki, Daisuke Kobayashi
  • Patent number: 10073769
    Abstract: The present invention provides a data storage device including a random access memory and a controller. The random access memory has a cache area. The controller loads a part of data mapping sets of the data mapping table on a plurality of sectors of the cache area, wherein any of the data mapping sets that has been read less than a predetermined number of times is defined as an infrequent data mapping set, and any of the data mapping sets that has been read more than the predetermined number of times is defined as a frequent data mapping set.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: September 11, 2018
    Assignee: SILICON MOTION, INC.
    Inventor: Kuan-Yu Ke
  • Patent number: 9990657
    Abstract: According to one aspect of an embodiment, an information display device includes a display unit configured to display first content and second content in a display region so as to overlap each other. The information display device includes a change unit configured to change the second content to third content, depending on a position where a predetermined region included in the first content is displayed.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: June 5, 2018
    Assignee: YAHOO JAPAN CORPORATION
    Inventors: Daisuke Kobayashi, Tatsuaki Suzuki, Kensuke Takada
  • Patent number: 9984390
    Abstract: According to one aspect of an embodiment, an information display device includes a display unit configured to display first content in a region which accounts for a predetermined proportion of a display region and displays second content in another region. The information display device includes a detection unit configured to detect an inclination of the information display device. The information display device includes a change unit configured to change the proportion of the region in which the first content is displayed and the proportion of the region in which the second content is displayed in the display region, depending on the detection result of the detection unit.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: May 29, 2018
    Assignee: YAHOO JAPAN CORPORATION
    Inventors: Daisuke Kobayashi, Tatsuaki Suzuki, Kensuke Takada
  • Patent number: 9947277
    Abstract: Methods and devices for reducing the power consumption of a frame buffer and timing controller of an electronic display are provided. By way of example, a method of operating an electronic display includes receiving image data from a processor of the electronic display, storing the image data to a buffer of the electronic display, reading the image data from the buffer to supply the image data to a column driver of the electronic display, determining whether an amount of image data stored in buffer is less than a threshold, and switching from reading the image data from the buffer to reading the image data directly from the processor when the amount of image data stored in buffer is less than the threshold.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: April 17, 2018
    Assignee: APPLE INC.
    Inventors: Christopher P. Tann, Sandro H. Pintz, Satish S. Iyengar, David S. Zalatimo
  • Patent number: 9898240
    Abstract: Systems, devices, and methods relating to an electronic display are disclosed. A method of operating a display system may include conveying visual content representing a contiguous image to a display system including a plurality of display panels, wherein each display panel is adjacent at least one mounting member. The method may further include selectively retrieving with each display panel of the plurality an associated subset of the visual content belonging thereto. In addition, the method may include displaying on a display device of each display panel the associated subset of the visual content.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: February 20, 2018
    Assignee: PRISMVIEW, LLC
    Inventors: John S. Williams, Clifford Brent Brown
  • Patent number: 9870640
    Abstract: An apparatus may include an index buffer to store an index stream having a multiplicity of index entries corresponding to vertices of a mesh and a vertex cache to store a multiplicity of processed vertices of the mesh. The apparatus may further include a processor circuit, and a vertex manager for execution on the processor circuit to read a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream, and to remove a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: January 16, 2018
    Assignee: INTEL CORPORATION
    Inventors: Rahul P. Sathe, Tim Foley
  • Patent number: 9837040
    Abstract: A display driver includes a gamma voltage generation unit, a decoder, and a plurality of source amplifiers. The gamma voltage generation unit generates gamma reference voltages. The decoder transforms pixel data corresponding to received image information into data voltages using the gamma reference voltages. The plurality of source amplifiers outputs the data voltages to a display panel. The gamma voltage generation unit includes a first amplifier receiving a reference voltage and a voltage divider including a plurality of resistors and at least one first switch. The at least one first switch turns on or turns off a first connection between an output node of the first amplifier and the plurality of resistors depending on an operation mode. The voltage divider generates at least one first gamma reference voltage among the gamma reference voltages based on an output voltage of the first amplifier.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: December 5, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Bae Moon, Jihyun Lee
  • Patent number: 9805478
    Abstract: Apparatus and a corresponding method for processing image data are provided. The apparatus has compositing circuitry to generate a composite layer for a frame for display from image data representing plural layers of content within the frame. Plural latency buffers are provided to store at least a portion of the image data representing the plural layers. At least one of the plural latency buffers is larger than at least one other of the plural latency buffers. The compositing circuitry is responsive to at least one characteristic of the plural layers of content to allocate the plural layers to respective latency buffers of the plural latency buffers. Image data information for a layer allocated to the larger latency buffer is available for analysis earlier than that of the layers allocated to the smaller latency buffers and processing efficiencies can then result.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: October 31, 2017
    Assignee: ARM Limited
    Inventors: Daren Croxford, Sharjeel Saeed, Kushan Vijaykumar Vyas