Data Transfer Between Memories Patents (Class 345/537)
  • Patent number: 7898547
    Abstract: A method and system is provided for organizing and routing multiple memory requests from a plurality of clients to multiple memories. Requests from a plurality of clients, including a plurality of clients of the same type, such as multiple MPEG decoders, are directed to different memory controllers by a router. The memory controllers order the client requests by requests among similar client types. The memory controllers also order the client requests by different client types. The ordered requests are then delivered to memory. Returned data is sent back to the clients. A method of mapping motion pictures experts group (MPEG) video information for improved efficiency is presented, wherein image information is stored in blocks of memory referred to as tiles. Tiles are mapped in memory so that adjacent tiles only correspond to different banks of memory.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: March 1, 2011
    Assignee: Broadcom Corporation
    Inventors: Chun Wang, Youjing Zhang, Richard K. Sita, Glen T. McDonnell, Babs L. Carter
  • Patent number: 7880742
    Abstract: An information processing device in which a data bus for establishing interconnection between a plurality of control operating units formed in a main processor is connected at one end to a graphic processor and at the other end to a main memory. Image frame data generated by the graphic processor is sequentially transferred through the data bus and stored into the main memory. The data bus satisfies R1?R2?R4 and R1?R3?R4, where R1 is the data transmission rate from the main processor to the graphic processor, R2 is the data transmission rate from the graphic processor to the main processor, R3 is the data transmission rate between the main processor and the main memory, and R4 is the rate to transmit a single image frame of data within a vertical blanking interval.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: February 1, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Katsu Saito
  • Patent number: 7876287
    Abstract: A system with a main monitor for a host computer and a second, mini monitor for displaying a portion of the display normally intended for the main monitor. In one embodiment, the mini monitor is connected to the computer over a shared, peripheral bus, such as the universal serial bus (USB). The smaller size of the mini monitor and either compression or slower refresh rates allow it to be connected to the USB just like other peripheral devices.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: January 25, 2011
    Assignee: Logitech Europe S.A.
    Inventors: Hugh J. McLarty, Guy Tiphane, David Wegmuller
  • Patent number: 7876327
    Abstract: Display data and video data are stored within a graphics processing unit to reduce power consumed by the computing device during video playback. Storing display data and video data within the GPU reduces power consumption, because bus transaction activity is reduced and the need to read data from a larger, common main memory is avoided.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: January 25, 2011
    Assignee: NVIDIA Corporation
    Inventors: Krishnan Sreenivas, Koen Bennebroek, Sanford S. Lum, Karthik Bhat, Stefano A. Pescador, David G. Reed, Brad W. Simeral, Edward M. Veeser
  • Patent number: 7877565
    Abstract: Systems and methods for using multiple versions of programmable constants within a multi-threaded processor allow a programmable constant to be changed before a program using the constants has completed execution. Processing performance may be improved since programs using different values for a programmable constant may execute simultaneously. The programmable constants are stored in a constant buffer and an entry of a constant buffer table is bound to the constant buffer. When a programmable constant is changed it is copied to an entry in a page pool and address translation for the page pool is updated to correspond to the old version (copy) of the programmable constant. An advantage is that the constant buffer stores the newest version of the programmable constant.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: January 25, 2011
    Assignee: NVIDIA Corporation
    Inventors: Roger L. Allen, Cass W. Everitt, Henry Packard Moreton, Thomas H. Kong, Simon S. Moy
  • Patent number: 7868897
    Abstract: A method and apparatus for creating, updating, and using guest physical address (GPA) to host physical address (HPA) shadow translation tables for translating GPAs of graphics data direct memory access (DMA) requests of a computing environment implementing a virtual machine monitor to support virtual machines. The requests may be sent through a render or display path of the computing environment from one or more virtual machines, transparently with respect to the virtual machine monitor. The creating, updating, and using may be performed by a memory controller detecting entries sent to existing global and page directory tables, forking off shadow table entries from the detected entries, and translating GPAs to HPAs for the shadow table entries.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: January 11, 2011
    Assignee: Intel Corporation
    Inventors: Balaji Vembu, Aditya Navale, Wishwesh A. Gandhi
  • Patent number: 7864184
    Abstract: Provided is an image processing device for outputting a graphic image drawn into a frame memory after saving the image in a display memory. The image processing device is provided with a save processing section for saving frame data representing a predetermined image from a graphic memory in which the frame data is stored to a display memory, and an output interface for outputting the frame data saved in the display memory by transforming the frame data into a video output signal. The save processing section saves the frame data from the graphic memory to the display memory in equally divided units (partial data units). The partial data units of the frame data are outputted from the display memory.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: January 4, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 7847801
    Abstract: A computer implemented method, apparatus, and computer usable program code are provided for managing dual active controllers in a high availability storage configuration. Redundant dual active controllers in high availability storage configurations are made to appear as individual storage target devices to a host system. Each controller owns certain volumes of data storage. When a host system sends a request to identify available data volumes, the controller that owns certain volumes provides preferred paths to those owned volumes. The host system may also send an inquiry to a controller that asks the controller about data volumes not owned by the controller. For such inquiries, no paths to the non-owned data volumes are returned to the host system.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: December 7, 2010
    Assignee: LSI Corporation
    Inventor: Yanling Qi
  • Patent number: 7830391
    Abstract: Methods and apparatus for storing and retrieving data using two-dimensional arrays. In one implementation, a checkerboard buffer page system includes: a data source, providing data elements in a first order; a data destination, receiving data elements in a second order; memory devices having memory pages, data elements stored and retrieved in parallel to and from the memory devices; each buffer page having entries along a first dimension corresponding to the first order and along a second dimension corresponding to the second order, data elements stored in the first order and retrieved in the second order, at least one memory page stores data elements in multiple locations according to the first and second orders, at least two data elements consecutive in the first order are stored in parallel to the memory devices, and where at least two data elements consecutive in the second order are retrieved in parallel from the memories.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 9, 2010
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Mark Champion, Brian Dockter
  • Patent number: 7817157
    Abstract: A remote management controller may include a capture engine and a processor. The capture engine may be configured to obtain a slice of video data output from a video graphics controller, store the slice of video data, and calculate at least one value correlative to the slice of video data. The processor may be configured to retrieve the slice of video data stored by the capture engine and process any changed portion of the slice of video data for transmission to a remote system.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: October 19, 2010
    Assignee: Hewlett-Packard Company, L.P.
    Inventors: Theodore F. Emerson, Robert L. Noonan, David F. Heinrich, Don Dykes
  • Patent number: 7809904
    Abstract: Circuits, methods, and apparatus that pre-load data that may be needed by a graphics processor to render upcoming scenes. One example determines one or more possible upcoming scenes or views. To save computing resources, the possible upcoming scenes are not fully rendered, but the addresses, and corresponding pages, of data that would be needed to render the scenes are determined. Page usage information is also gathered. Pages that would be needed to render the upcoming scenes, but which are not resident in memory, are read in from a disk drive and stored in memory before they are needed. Pages that are infrequently used are removed from physical memory. In this way, when the scene changes, a large number of page faults do not occur in one frame, rather, they are distributed among several frames.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: October 5, 2010
    Assignee: NVIDIA Corporation
    Inventor: Nicholas P. Wilt
  • Patent number: 7791609
    Abstract: An apparatus and a method providing an automatic display control in a multimedia system. The apparatus includes a memory that stores predetermined display information; a controller that includes a communication module to perform data communication with an external device, set to be in a master mode to write the display information to the memory in an initialize mode and set to be in a slave mode to analyze display control data for a predetermined automatic display control function which is transmitted by the external device, in other modes, and generates a display control signal used to perform a function that corresponds to the result of analyzing the display control data; and a video signal processor that receives video signals from the external device, converts the format of the video signals to another format suitable for the display characteristics of a display means, and processes the converted video signals according to the control signal.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-jai Lee
  • Patent number: 7786997
    Abstract: In each odd-numbered frame, a game image generated by a three-dimensional image processing unit 31 is supplied to a first LCD 11, and then a game image identical to the generated game image is stored in a first VRAM 21a. Also, a two-dimensional image processing unit 37 supplies the game image stored in the immediately-preceding even-numbered frame in a second VRAM 21b to a second LCD 12. On the other hand, in each even-numbered frame, a game image generated by the three-dimensional image processing unit 31 is supplied to the first LCD 12, and then a game image identical to the generated game image is stored in the second VRAM 21b. Also, the two-dimensional image processing unit 37 supplies the game image stored in the immediately-preceding odd-numbered frame in the first VRAM 21a to the first LCD 11.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: August 31, 2010
    Assignee: Nintendo Co., Ltd.
    Inventors: Hiroshi Yoshino, Keizo Ohta, Yoshitaka Yasumoto, Kenji Nishida
  • Publication number: 20100201699
    Abstract: A display apparatus, including: a nonvolatile display device that retains display of information even after the power is cut, a data receiving device that receives data to be displayed on the nonvolatile display device, a volatile storage device that stores the data received by the data receiving device, a nonvolatile storage device that retains the storage of the data even after the power is cut, a display control device that causes the nonvolatile display device to display the data stored in the volatile storage device, a storage determining device that determines whether to store the data stored in the volatile storage device into the nonvolatile storage device, and a storage control device that causes the nonvolatile storage device to store the data stored in the volatile storage device when the storage determining device determines to store the data into the nonvolatile storage device.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 12, 2010
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Takuya Nagai, Yoshihisa Kusumoto, Yu Matsubara
  • Patent number: 7768519
    Abstract: A high-performance crossbar for a pipeline is disclosed. In particular, one embodiment of the crossbar receives multimedia data at a first throughput from a source operating in a first pipeline stage. The received data are stored in at least one input buffer corresponding to the source in the crossbar. The crossbar also causes the multimedia data from the input buffer to be routed to at least one output buffer at a second throughput. The output buffer corresponds to a destination operating in a second pipeline stage. Then the crossbar causes the multimedia data from the output buffer to be routed to the destination at the first throughput.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: August 3, 2010
    Assignee: NVIDIA Corporation
    Inventors: David L. Anderson, Mark J. French
  • Patent number: 7768521
    Abstract: Disclosed herein is an image processing apparatus, including: first storage means for storing data in a unit of a word; second storage means for storing data in a unit of a word, address information for managing writing and reading out of the data of a unit of a word and a correction flag which indicates, in a unit of a word, whether or not it is necessary to correct the data, in an associated relationship with each other; and supplying means for reading out and supplying the data of a unit of a word, corresponding address information and a corresponding correction flag stored in the second storage means to the first storage means; the first storage means referring to the address information to correct the data of a unit of a word corresponding to the correction flag to the data of a unit of a word.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: August 3, 2010
    Assignee: Sony Corporation
    Inventor: Takaaki Fuchie
  • Patent number: 7764289
    Abstract: Methods and apparatuses to create and manage volatile graphics objects in a video memory are disclosed. An object is created and marked as volatile. The volatile object is stored in a video memory of a graphics subsystem. A volatile marking indicates that data for an object is not to be paged out from the video memory to make room for other data. The video memory space occupied by the volatile object is indicated as a volatile storage, in a data structure. Another object is written into at least a portion of the video memory space, which is occupied by the volatile object, without paging out data for the volatile object. In one embodiment, at least a portion of the volatile object is referenced or used while another object is formed. The volatile object may be discarded after being referenced or used to form another object.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: July 27, 2010
    Assignee: Apple Inc.
    Inventors: John Stauffer, Michael K. Larson, Charlie Lao
  • Patent number: 7764290
    Abstract: An external memory system for use with an imaging system, and methods for archiving digital content are provided. The external memory system has a communications link adapted to exchange data with the imaging system; an archival memory device interface adapted to store data using an archival memory; and an external memory system processor adapted to automatically obtain content data files from the imaging system that have not yet been stored by the external memory system, to prepare the obtained content data files for archival storage and to cause the archival memory device interface to store the prepared content data files without guidance from an ancillary device; wherein said external memory system processor maintains a record of each content data file that has been stored using the external memory system and wherein the external memory system processor uses the record to identify content data files that have not yet been stored.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: July 27, 2010
    Assignee: Eastman Kodak Company
    Inventors: John R. Fredlund, Joseph A. Manico
  • Patent number: 7755633
    Abstract: A system includes internal memory and external memory. A display controller reads a frame from the external memory. At least one of a processor and a graphics chip copies the frame from the external memory to the internal memory while the frame is read from the external memory by the display controller. After the frame is copied to the internal memory, the frame is stored in both the internal memory and the external memory.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: July 13, 2010
    Assignee: Marvell International Ltd.
    Inventor: Lawrence A. Booth, Jr.
  • Patent number: 7750922
    Abstract: A new transparency group may be rendered and blended with other, previously rendered, transparency groups, by using the Porter-Duff algebra available on the GPU even though the transparency groups include pre-multiplied color and alpha information. Additionally, the number of copies of the back buffer (the image information for the previously rendered transparency groups) required to properly render, blend and combine the new transparency group into the image information of previously rendered transparency groups may be minimized.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: July 6, 2010
    Assignee: Adobe Systems Incorporated
    Inventors: Alexandre S. Parenteau, John Charles Nash
  • Patent number: 7746346
    Abstract: A three-dimensional graphics data rendering method. The method divides initially inputted first graphics data into a static object and a dynamic object, performs a rendering process with respect to the static object, and updates a predetermined buffer with the rendering result. Then the method performs a transformation process, a portion of the rendering process with respect to the dynamic object, determines an updating area, and stores a rendering result of the buffer corresponding to the updating area in a predetermined storage unit; performs a remaining rendering process with respect to the dynamic object, updates the buffer and outputs a first image whose rendering is completed. Finally, the method restores a rendering result of the updating area to the buffer by referring to the storage unit and utilizes a rendering result of the restored buffer as a rendering result of subsequently inputted second graphics data.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: June 29, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang Oak Woo
  • Patent number: 7728842
    Abstract: An image formation processing simulation apparatus includes: a receiving unit that receives image data to which image formation processing is applied in an image formation processing device; a performing unit that performs simulation of image formation processing applied to the image data in the image formation processing device using the image data; a memory management unit that allocates a memory area for the image formation processing before the simulation, monitors the memory size required for the image formation processing in the simulation, and compares between the required memory size and the size of the allocated memory area; and an output unit that outputs information concerning the comparison result.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: June 1, 2010
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Tetsuya Honmi
  • Patent number: 7724249
    Abstract: Terminal equipment for electronically making patent and utility patent applications. The terminal equipment converts various formats of text data generated by an external device into the internal format of the terminal equipment, retrieves the converted text data, merges the text data with a procedure, and transmits the procedure. The merging operation in which image data is merged with text data is simplified whereby the operator can make applications with a simple operation without special skill and knowledge when an application document is transmitted and received on line.
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: May 25, 2010
    Assignee: Fujitsu Limited
    Inventors: Akira Horikawa, Masanori Kawaguchi, Hirotoshi Umemura, Tetsuo Aoki, Atsurou Noguchi, Kouichi Masaki, Akihiko Shigeta, Kiyoshi Ohi, Kiyoshi Inoue, Yasuhiro Tameie, Naruhito Yamamoto, Hiroshi Aihara, Masahiko Senda
  • Patent number: 7710424
    Abstract: A method and system for accessing texture data is disclosed. The method includes the step of storing a low resolution version of a block of texture data in a low latency memory and storing a high resolution version of the block of texture data in high latency memory. Upon a request for the high resolution version of the block of texture data, the high resolution version is fetched from the high latency memory to the low latency memory. The low resolution version is subsequently accessed from the low latency memory until the high resolution version is fetched into the low latency memory.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: May 4, 2010
    Assignee: Nvidia Corporation
    Inventors: Edward A. Hutchins, James T. Battle, Bruce K. Holmer
  • Patent number: 7682028
    Abstract: An image transmission system enabling a user to recognize a communication status between a PC and a projector, and including a PC (300) as an image generating apparatus and a projector (400) as an image projecting apparatus. The projector (400) monitors a status of communication with the PC (300), and includes a status monitoring unit (402) generating information related to the communication status being monitored, and also a projector communication unit transmitting the generated information related to the communication status to the PC (300). The PC (300) includes a PC communication unit (301) receiving information related to the communication status from the projector (400), a beacon analyzing unit (302) analyzing the received information and a display output unit (303) displaying a result of the analysis by the beacon analyzing unit (302).
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: March 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Tsuyoshi Maeda, Takashi Watanabe, Yasuaki Sakanishi
  • Patent number: 7675527
    Abstract: Embodiments consistent with the subject matter of this disclosure may transparently project text fragments from one or more buffers into one or more projection buffers by reference, instead of by copying. Clients or applications, such as, for example, compilers, language services, an editor's rendering system, or other client or application, may transparently process the projected text fragments projected into the projection buffers as if processing simple text files. In some embodiments, text of a first language, embedded in a document having text of one or more other languages, may be projected to a projection buffer and provided to an application, which may process text of the first language. In other embodiments, text may be elided from a document by projecting to a projection buffer only text not to be elided from the document.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: March 9, 2010
    Assignee: Microsoft Corp.
    Inventor: John Sells Tilford
  • Patent number: 7675523
    Abstract: To provide an image processing technique compatible with both a CCD and a CIS, which controls storage of image data read by each device in a memory and the read of the stored data for each rectangular area to obtain a high memory efficiency, an image processing apparatus includes a memory area control section which sets, for image data bitmapped on a first memory, a rectangular area divided in a main scanning direction and sub-scanning direction, an address generation section which generates address information to read out image data corresponding to the rectangular area in correspondence with the set rectangular area, a memory control section which reads out the image data corresponding to the rectangular area and DMA-transfers the image data to a second memory in accordance with the generated address information, and an image processing section which executes image processing for each rectangular area of the DMA-transferred data by using the second memory.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: March 9, 2010
    Assignee: Canon Kabushiki Kiasha
    Inventors: Katsutoshi Ushida, Yuichi Naoi, Yoshiaki Katahira, Yasuyuki Nakamura, Koichi Morishita, Makoto Fukuo
  • Patent number: 7675808
    Abstract: An object is to realize high-capacity of a memory while reducing power consumption and making the power consumption even throughout the memory. A memory includes a plurality of memory block arranged to be symmetrically to each other. Also, a specific combination of signals among address signals supplied to the memory, a memory block including a memory cell to be read from or written to is specified. Further, signals supplied to other memory blocks than the above memory block is maintained at a constant value. Consequently, a wiring length of a bit line in a memory array can be shortened, and current consumption can be made to be even among data reading or writing from/to memory cells of a variety of addresses within the memory, at the same time as reducing load capacitance.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: March 9, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 7671864
    Abstract: Methods and machines which increase image processing performance by efficiently copying image data from input memory to main memory before performing CPU intensive operations, such as image enhancement, compression, or encryption, and by efficiently copying image data from main memory to output memory after performing CPU intensive operations, such as decryption, decompression, image enhancement, or reformatting.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: March 2, 2010
    Inventor: Kendyl A. Román
  • Publication number: 20100045687
    Abstract: A method, system, and apparatus of overlap in successive transfers of video data to minimize memory traffic are disclosed. In one embodiment, a method includes identifying a reusable portion of a preexisting video data in an on-chip memory that corresponds to an overlapping video data in an off-chip memory, preserving the reusable portion of the preexisting video data in the on-chip memory in a reserved part of the on-chip memory, determining a non-overlapping video data in the off-chip memory, wherein the non-overlapping video data excludes the overlapping video data in the off-chip memory, defining a subsection of the non-overlapping video data, accessing the subsection of the non-overlapping video data, and selectively storing the subsection in the on-chip memory, such that the reusable portion of the preexisting video data of the on-chip memory is preserved in the reserved part of the on-chip memory.
    Type: Application
    Filed: August 25, 2008
    Publication date: February 25, 2010
    Inventors: Ajit Deepak Gupte, Prasenjit Basu
  • Patent number: 7667686
    Abstract: The use of motion sensing to perform sophisticated command control and data input into a portable device is disclosed. A motion sensor is embedded or fixedly attached to a portable device to measure movement, motion or tilt of the device in one-, two- or three-dimensions when the portable device is used to air-write or make gestures. The use of full motion information such as rate of change of motion or tilt angle to perform functions and commands is also disclosed. In addition, the use of air-writing to input search criteria and filter schemes for portable devices to manage, search, and sort through various data, files, and information is disclosed.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: February 23, 2010
    Assignee: MEMSIC, Inc.
    Inventor: Hyuk-Jeen Suh
  • Patent number: 7659902
    Abstract: A three-dimensional API for communicating with hardware implementations of vertex shaders and pixel shaders having local registers. With respect to vertex shaders, API communications are provided that may make use of an on-chip register index and API communications are also provided for a specialized function, implemented on-chip at a register level, that outputs the fractional portion(s) of input(s). With respect to pixel shaders, API communications are provided for a specialized function, implemented on-chip at a register level, that performs a linear interpolation function and API communications are provided for specialized modifiers, also implemented on-chip at a register level, that perform modification functions including negating, complementing, remapping, stick biasing, scaling and saturating.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: February 9, 2010
    Assignee: Microsoft Corporation
    Inventors: Charles N. Boyd, Michael A. Toelle
  • Patent number: 7660512
    Abstract: Systems and methods for managing frame rates during multimedia playback are described herein. The ideal playback timing associated with video data is determined. If an actual playback timing of the video data lags the ideal playback timing, a frame rate associated with the video data is varied using a smoothing function to recover toward the ideal playback timing. An iterative frame-dropping algorithm is applied to vary the frame rate in accordance with the smoothing function. The smoothing function incorporates as a variable an average delay associated with playback of frames in the video data.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: February 9, 2010
    Assignee: Microsoft Corporation
    Inventors: Charles R. Kellner, Jr., William R. Sanders, Darren R. Davis
  • Patent number: 7646388
    Abstract: A method and system for controlling the algorithmic elements in 3D graphics systems via an improved 3D graphics API is provided. In one aspect, in a 3D graphics system having privatized formats with privatized drivers used to increase the efficiency of display, existing problems are eliminated that are associated with multiple redundant copies of the publicly formatted graphics data made in host system memory pursuant to various graphics operations e.g., lock and unlock operations. The ability to make a system copy of publicly formatted data is exposed to the developer, eliminating the creation of unnecessary, and redundant copies. Efficient switching between the privatized and public format remains hidden from the developers so that applications execute efficiently while removing consideration thereof from the developers. Thus, developers are free to consider other tasks.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: January 12, 2010
    Assignee: Microsoft Corporation
    Inventor: Jeff M. J. Noyle
  • Patent number: 7636090
    Abstract: A hierarchical movie is provided. A hierarchical movie is a movie that contains one or more embedded movies. Embedded movies may themselves contain embedded movies. Each movie contains zero or more media sequences. Within a hierarchical movie, media sequences that should be edited together may be grouped together using embedded movies. The media sequences of a hierarchical movie may be sequenced during playback based on a different time coordinate system than the time coordinate system that governs any embedded movies. This allows a movie to contain both time-based and time-independent media sequences. Also, the relative timing of events in the movie may vary from performance to performance. The hierarchical movie structure allows movies to be used as user interface controls, and even as field-sensitive databases.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: December 22, 2009
    Assignee: Apple Inc.
    Inventors: Peter Hoddie, James D. Batson, Sean Michael Callahan
  • Patent number: 7633508
    Abstract: A reference-data storing unit stores reference data for determining whether to display image data by overwriting display data. A data converting unit converts the image data into display image data. A transparency determining unit determines whether a first pixel value of the display image data obtained through a color conversion by the data converting unit coincides with a second pixel value of the reference data stored in the reference-data storing unit. A data transfer unit that transfers, when it is determined that the first pixel value coincides with the second pixel value, the display image data to a display address space.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: December 15, 2009
    Assignee: Ricoh Company, Limited
    Inventors: Eiji Enami, Keita Maejima, Hironobu Kurihara, Yuichi Yomogida
  • Patent number: 7623134
    Abstract: One embodiment of the present invention sets forth a technique for processing address page requests in a GPU system that is implementing a virtual memory model. A hardware-based page fault manager included in the GPU system intercepts page faults otherwise processed by a software-based page fault manager executing on a host CPU. The hardware-based page fault manager in the GPU includes a DMA engine capable of reading and writing pages between system memory and frame buffer memory without involving the CPU or operating system. A net improvement in system performance is achieved by processing a significant portion of page faults within the GPU, reducing the overall load on the host CPU.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: November 24, 2009
    Assignee: NVIDIA Corporation
    Inventor: Radoslav Danilak
  • Patent number: 7620532
    Abstract: A computer-implemented method is provided for generating data representing an object involved in a computer-implemented simulation of a physical experiment. Data describing geometric dimensions and material for the object is received as input. The data may be broken down into data representing distinct components of the object. Data is generated that describes a base parent volume region that extends at least beyond extents of the geometric dimensions of a portion of the object. Next, data is generated that describes child volume regions produced by subdividing the base parent volume region into the child volume regions each having dimensions that are a fraction of the dimensions of the base parent volume region. The data describing each child volume region is examined to determine whether vertices of each of the child volume regions are in the interior or exterior of the portion.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: November 17, 2009
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Steven T. Tillman, Andrew J. Witzig
  • Patent number: 7612780
    Abstract: Embodiments of the present invention relate to accessing a first pair of adjacent data blocks using a first channel of a dual channel memory device; and simultaneously accessing a second pair of adjacent data blocks using a second channel of the memory device, the second pair being spaced apart from the first pair by a predetermined interval.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: November 3, 2009
    Assignee: Intel Corporation
    Inventors: David E Freker, Aditya Sreenivas, Zohar Bogin, Anoop Mukker, Tuong Trieu
  • Patent number: 7610184
    Abstract: Methods for computer-implemented simulation for the interaction of two or more objects are provided. Data describing particles that represent each of the objects is generated from geometric data for objects. The data for each particle describes a mass density, velocity and energy at a position of the corresponding object. The particles are grouped into sectors to define a computational mesh comprising a plurality of sectors, wherein each sector is a volume region at a position in space in which particles associated with the objects may reside. For each of a plurality of select particles, so called neighboring particles are determined that are within a region of influence with respect to a select particle. Computations are performed based on laws of conservation of mass, energy and momentum to produce updated values for mass, velocity, energy, pressure, stress and position for the particles at each of a plurality of time steps.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: October 27, 2009
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Steven T. Tillman, Andrew J. Witzig
  • Publication number: 20090262121
    Abstract: A method for streaming a vector image to a client computer, including: accessing a pre-processed vector image that was generated from a vector image, the pre-processed vector image including a plurality of local rectangular regions and a plurality of local vector objects, each local vector object being associated with one of the local rectangular regions; receiving a request from a user of a client computer for a desired portion of the vector image, for display at a desired pixel display resolution; identifying at least one local rectangular region from among the plurality of local rectangular regions of the pre-processed vector image, which is appropriate for generating the desired portion of the vector image at the desired display resolution; and transmitting the local vector objects associated with the at least one local rectangular region to the client computer.
    Type: Application
    Filed: April 28, 2009
    Publication date: October 22, 2009
    Inventors: Andrew Opala, Rudy Ziegler
  • Patent number: 7605819
    Abstract: An image processing device has an image processing module and a buffer module. The image processing module has an image processing engine that carries out an image processing on image data. The buffer module has a buffer that stores the image data and a buffer control section that controls the amount of the image data to input into a following image processing module.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 20, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Yukio Kumazawa, Takashi Nagao, Noriaki Seki, Yasuhiko Kaneko, Junichi Kaneko
  • Patent number: 7605818
    Abstract: An image processing device including an image processing section having one or more image processing modules and buffer modules having a buffer is provided. The buffer module, recognizes a number of image processing modules which are connected at the following stage of its own module; stores, for each of the following image processing modules, a head position of un-read image data among image data which is stored in the buffer; and each time image data is requested from an following image processing module, causes the image processing module to read, in a read data amount which is set in advance for its own module at each of the individual following image processing modules or which is designated each time of the request, image data which is stored in the buffer, from the head position corresponding to the image processing module.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 20, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Takashi Nagao, Noriaki Seki, Yukio Kumazawa, Youichi Isaka, Yasuhiko Kaneko, Junichi Kaneko
  • Publication number: 20090256844
    Abstract: A three-dimensional computer graphics rendering system allows a tile-based rendering system to operate with a reduced amount of storage required for tiled screen space geometry by using an untransformed display list to represent the screen's geometry.
    Type: Application
    Filed: March 19, 2009
    Publication date: October 15, 2009
    Inventor: John W. Howson
  • Patent number: 7602392
    Abstract: An image processing device including an image processing section and a memory managing section. The image processing section having: (A) one or more image processing modules, each having: an image processing engine and a control section; and (B) one or more buffer modules. The memory managing section (a) can execute, by a plurality of types of managing methods, memory managing processing in which, in accordance with requests from individual modules, the memory managing section reserves memories which are to be allotted to the individual modules from a memory provided at the image processing device, and allots the reserved memories to the individual modules, and, at a time of deleting the individual modules, releases the memories allotted to the individual modules, and (b) carries out the memory managing processing by a managing method which is instructed from the exterior among the plurality of types of managing methods.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 13, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Takashi Nagao, Noriaki Seki, Yukio Kumazawa, Yasuhiko Kaneko, Junichi Kaneko
  • Patent number: 7602394
    Abstract: An image processing device has an image processing section and a processing managing section. The image processing section has one or more image processing modules and one or more buffer modules. Each image processing module has an image processing engine and a control section. The image processing engine carries out a predetermined image processing on image data in units of a unit processing data amount. The control section inputs image data which is acquired from a preceding stage of its own module, in data amount units needed in order for the image processing engine to carry out processing in units of the unit processing data amount. Also, the control section outputs, to a following stage of its own module, image data, which has undergone a predetermined image processing by the image processing engine, or a processing result of the predetermined image processing.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 13, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Noriaki Seki, Takashi Nagao, Yukio Kumazawa, Yasuhiko Kaneko, Junichi Kaneko
  • Patent number: 7602393
    Abstract: An image processing section of an image processing device is constructed by plural image processing modules being connected in a pipeline form, such that a buffer module is connected at at least one of preceding and following stages of each module. A buffer control section of the buffer module: when image data is outputted from the preceding image processing module, causes the module to write, immediately or after completion of reading, based on weather the following image processing module is reading data from the buffer; and when image data is requested from the following image processing module, causes the module to read, immediately or after completion of writing, based on weather the preceding image processing module is writing data to the buffer.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 13, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Yukio Kumazawa, Takashi Nagao, Youichi Isaka, Noriaki Seki, Yasuhiko Kaneko, Junichi Kaneko
  • Patent number: 7602391
    Abstract: An image processing device has one or more image processing modules and one or more buffer modules. The image processing module reads image data from a preceding module in units of a reading data amount, performs a image processing on the image data, and outputs the image data to a following module in units of a writing data amount. The buffer modules stores the image data outputted from the preceding image processing module and outputs the image data in units of a outputting data amount. The image processing module is connected to at least one of a preceding or following stage of the buffer module.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 13, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Takashi Nagao, Yukio Kumazawa, Noriaki Seki, Yasuhiko Kaneko, Junichi Kaneko
  • Patent number: 7598957
    Abstract: An image processing device has an image processing section. The image processing section has one or more image processing modules and one or more buffer modules. Each image processing module has an image processing engine and a control section. The image processing engine carries out an image processing on image data in units of a unit processing data amount. The control section inputs the image data to the image processing engine. The one or more image processing modules is selected from a plurality of the image processing modules for carrying out the image processing by the image processing engine, and the buffer module is connected to at least one of an image processing module which is selected.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 6, 2009
    Assignees: Fuji Xerox Co., Ltd., Fuji Photo Film Co., Ltd.
    Inventors: Youichi Isaka, Takashi Nagao, Yukio Kumazawa, Noriaki Seki, Yasuhiko Kaneko, Junichi Kaneko
  • Patent number: 7595804
    Abstract: A display of CPU utilization in a multiprocessor system is provided. This feature illustrates processor utilization and application group assignments to CPUs and clusters of CPUs. Various graphic indicator are described that can be used to display processor utilization and indicate processors that have no application group assignments. For example, bar graphs as well as gauge displays can be used to visually convey processor utilization. As a result, a user can visually determine the processor utilization and application group assignments across a multiprocessor system. Additionally, various colors and shadings can be used to visually convey application group assignments.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: September 29, 2009
    Assignee: Unisys Corporation
    Inventor: Clifford Shiroku Shimizu