Frame Buffer Patents (Class 345/545)
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Patent number: 12136152Abstract: A computer implemented method for rendering a page that includes one or more dynamic design elements into an output video is described. The method comprises processing the page to generate one or more layers, each layer being either a static layer associated with one or more static design elements of the page or a dynamic layer associated with a single dynamic design element of the page. Output frames are then generated using the layers and then encoded into the output video.Type: GrantFiled: February 6, 2020Date of Patent: November 5, 2024Assignee: CANVA PTY LTDInventors: Karolina Pawlikowska, Andrew Charles Bennett, Max Scheffler
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Patent number: 12117933Abstract: A technique for accessing accelerated processing device (“APD”) memory is provided. The technique includes identifying whether to activate one or both of a first direct mapping unit and a second direct mapping unit, wherein the first direct mapping unit is associated with a small address size and the second direct mapping unit is associated with a large address size; activating the identified one or both of the first direct mapping unit and the second direct mapping unit; and accessing memory of the accelerated processing device using the one or both of the first direct mapping unit and the second direct mapping unit.Type: GrantFiled: December 9, 2020Date of Patent: October 15, 2024Assignee: Advanced Micro Devices, Inc.Inventor: Paul Blinzer
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Patent number: 12112410Abstract: Conservative rasterization hardware comprises hardware logic arranged to perform an edge test calculation for each edge of a primitive and for two corners of each pixel in a microtile. The two corners that are used are selected based on the gradient of the edge and the edge test result for one corner is the inner coverage result and the edge test result for the other corner is the outer coverage result for the pixel. An overall outer coverage result for the pixel and the primitive is calculated by combining the outer coverage results for the pixel and each of the edges of the primitive in an AND gate. The overall inner coverage result for the pixel is calculated in a similar manner.Type: GrantFiled: May 24, 2022Date of Patent: October 8, 2024Assignee: Imagination Technologies LimitedInventor: Casper Van Benthem
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Patent number: 12112400Abstract: Embodiments of this application provide a page drawing control method, apparatus, and device. The method includes: obtaining a drawing instruction for a first page, where the drawing instruction is used to instruct to draw the first page, the first page includes a first control, and the first control includes at least one child control; and if it is determined that an image corresponding to the first control exists and the first control and the child control in the first control are not updated, drawing the first control based on the image corresponding to the first control, or if it is determined that an image corresponding to the first control does not exist or the first control or the child control in the first control is updated, generating the image corresponding to the first control and drawing the first control. In this way, page drawing efficiency is improved.Type: GrantFiled: June 24, 2020Date of Patent: October 8, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Wei Tan, Tanqi Yu, Qucheng Zhi, Yu Li
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Patent number: 12112469Abstract: The present invention relates to an automatic display pixel inspection system and method and, particularly, to an automatic inspection system and method for inspecting defects occurring in the process of assembling semiconductor light emitting devices in a fluid.Type: GrantFiled: July 9, 2019Date of Patent: October 8, 2024Assignee: LG ELECTRONICS INC.Inventors: Seunghwan Seok, Hyohyung Lee, Inbum Yang, Bongwoon Choi
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Patent number: 12087199Abstract: An electronic device is provided. The electronic device includes a display including an output area divided into a plurality of blocks, a display driving integrated (DDI) circuit configured to drive the display. and a processor electrically connected to the DDI circuit, wherein the processor is configured to obtain information about a content area of the output area, the content area displaying the at least one piece of content, based on the obtained information, classify the plurality of blocks into first group blocks, second group blocks, and third group blocks, and in order to display the at least one piece of content on the display, control the DDI circuit.Type: GrantFiled: July 21, 2023Date of Patent: September 10, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Minwoo Lee, Kwangtai Kim, Seungryeol Kim, Donghyun Yeom, Seoyoung Lee, Juseok Lee
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Patent number: 12046653Abstract: An integrated circuit includes: a memory cell block including a plurality of bitcells; and an input and output (I/O) block including a plurality of gate-all-around (GAA) transistors connected to the bitcells, wherein the I/O block includes a plurality of active regions disposed separately from one another in a first direction, each of which extends in a second direction that is vertical to the first direction, and in which the GAA transistors are formed, a plurality of power rails disposed separately from one another in the first direction, and configured to provide power to the GAA transistors, and a plurality of signal lines disposed between the power rails, and configured to provide signals to the GAA transistors, a first number of bitcells among the bitcells are connected to the GAA transistors formed in a second number of active regions among the active regions, and the second number is twice the first number.Type: GrantFiled: October 14, 2021Date of Patent: July 23, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Bonyeop Kim, Taehyung Kim, Sangshin Han, Sangyeop Baeck
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Patent number: 12039626Abstract: An image generation apparatus includes at least a first configuration register that includes first configuration data for configuring parameters of an image processor, at least a second configuration register that includes second configuration data for configuring the parameters of a same image processing pipeline in the image processor, multiplexing logic coupled to the first configuration register and to the second configuration register, control logic that controls the multiplexing logic to in a non-demonstration mode select one of the first or second configuration registers to produce a first image frame and operative in a demonstration mode to provide both the first and second configuration data for the same image processing pipeline of the image processor to use for generating different regions of an image frame.Type: GrantFiled: December 20, 2021Date of Patent: July 16, 2024Assignee: ATI TECHNOLOGIES ULCInventor: David I. J. Glen
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Patent number: 12027137Abstract: A display apparatus is provided, which includes a display panel and a display controller. The display controller calculates an image average brightness of each image in a video signal from a host. When an absolute difference between a first image average brightness of a current image and a second image average brightness of a previous image is smaller than a predetermined value, the display controller activates a timer to obtain a timer value. When the timer value reaches a first duration, the display controller reduces brightness of each pixel in the current image by a first ratio. When the timer value reaches a second duration, the display controller reduces the brightness of each pixel in the current image by a second ratio. The second duration is longer than the first duration, and the second ratio is higher than the first ratio.Type: GrantFiled: May 25, 2022Date of Patent: July 2, 2024Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.Inventors: Cheng-Lung Lin, Chih-Cheng Huang, Tzu-Yi Tsao
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Patent number: 12003865Abstract: To enable HDR video signals of a plurality of signal interfaces to be satisfactorily handled. [Solution] A processing unit processes a linear high dynamic range video signal and obtains a high dynamic range video signal that has undergone a grayscale compression process. The processing unit is able to perform grayscale compression processes of a plurality of signal interfaces. For example, when a grayscale compression process of another signal interface other than a reference signal interface is performed, the processing unit further performs a process of adding characteristics of system gamma of the reference signal interface and a process of cancelling out characteristics of system gamma of the other signal interface.Type: GrantFiled: December 1, 2021Date of Patent: June 4, 2024Assignee: SONY GROUP CORPORATIONInventors: Koji Kamiya, Hiroaki Kikuchi, Jun Onuki, Tomoyuki Endo, Masaki Hirose
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Patent number: 11922906Abstract: A frame rate adjustment method, apparatus and device, a computer-readable storage medium and a computer program product. The method includes: acquiring running data of a client during running in a foreground when the client in the terminal device supports dynamic frame rate switching; determining a running scenario of the client based on the running data; determining a target running frame rate of the client based on the running scenario; and performing, by the client, image outputting according to the target running frame rate, and triggering an operating system of the terminal device to adjust a refresh rate of a screen according to the target running frame rate.Type: GrantFiled: September 28, 2022Date of Patent: March 5, 2024Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITEDInventors: Shili Xu, Kai Hong, Haiyang Wu, Qitian Zhang, Zhuan Liu, Jingjing Chen
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Patent number: 11889606Abstract: A LED controller for an LED pixel array includes a serial interface to an external data bus, along with an address generator connected to the serial interface and the LED pixel array. An image frame buffer is connected to the interface to receive image data and further connected to the address generator to receive an image frame buffer address. A command and control module is connected to the serial interface and configured to modify image frame buffer output signals. A calibration data storage module is connected to the command and control module to store calibration data related to pixel voltage response in the LED pixel array and enable modification of voltage provided by the dynamic power supply at least in part based on the image presented by the LED pixel array.Type: GrantFiled: August 3, 2022Date of Patent: January 30, 2024Assignee: Lumileds LLCInventors: Ronald Johannes Bonne, Zhi Hua Song
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Patent number: 11869457Abstract: The present disclosure provides a synchronous display method of a spliced screen, a display system, an electronic device and a computer readable medium. The spliced screen includes display screens spliced together, and the display method is based on wireless communication and includes: sending control information to the spliced screen for N times at intervals so as to control the display screens to display simultaneously, where N is not less than 2 and is an integer, the control information sent for previous N?1 times includes first information and second information, the control information sent for an Nth time at least includes the second information, the first information is configured for controlling the display screen receiving the control information to turn off a receiving component of the display screen, the second information is configured for controlling the display screen receiving the control information to display after a preset time duration.Type: GrantFiled: November 3, 2020Date of Patent: January 9, 2024Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Genyu Liu, Tao Li, Xingqun Jiang, Chao Yu, Quanzhong Wang
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Patent number: 11829190Abstract: Data routing for efficient decompressor use is described. In accordance with the described techniques, a cache controller receives requests from multiple requestors for elements of data stored in a compressed format in a cache. The requests include at least a first request from a first requestor and a second request from a second requestor. A decompression routing system identifies a redundant element of data requested by both the first requestor and the second requestor and causes decompressors to decompress the requested elements of data. The decompression includes performing a single decompression of the redundant element. After the decompression, the decompression routing system routes the decompressed elements to the plurality of requestors, which includes routing the decompressed redundant element to both the first requestor and the second requestor.Type: GrantFiled: December 21, 2021Date of Patent: November 28, 2023Assignee: Advanced Micro Devices, Inc.Inventor: Jeffrey Christopher Allan
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Patent number: 11819359Abstract: Methods and apparatus for treating a patient. The method includes acquiring a plurality of radio frequency (RF) signals with an ultrasound transducer, each RF signal representing one or more return echoes from a scan line of a pulse-mode echo ultrasound scan. A position of the ultrasound transducer corresponding to each of the acquired RF signals is determined, and a plurality of contour lines generated from the plurality of RF signals. The method estimates a 3-D shape and position of an anatomical feature, such as a joint of patient based on the generated contour lines and corresponding ultrasound transducer positions. An apparatus, or computer includes a processor and a memory with instructions that, when executed by the processor, perform the aforementioned method.Type: GrantFiled: August 23, 2021Date of Patent: November 21, 2023Assignee: JointVue, LLCInventors: Mohamed R. Mahfouz, Ray C. Wasielewski
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Patent number: 11810884Abstract: Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads.Type: GrantFiled: January 6, 2022Date of Patent: November 7, 2023Assignee: Intel CorporationInventors: Weng Hong Teh, Chia-Pin Chiu
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Patent number: 11810528Abstract: A display assembly, a display device and a driving method for the display assembly are provided. The display assembly includes: a dimming array (10) and a pixel array (20) stacked together; wherein the dimming array (10) includes a plurality of dimming units (101) arranged in an array; the pixel array (20) includes a plurality of pixel units (201) arranged in an array; each dimming unit (101) corresponds to at least one pixel unit (201), and different dimming units (101) correspond to different pixel units (201), respectively. The display assembly further includes: a first driver chip (102) configured to drive the dimming array (10). The number of output channels of the first driver chip (102) is equal to the number of columns of dimming units (101) in the dimming array (10), and each output channel of the first driver chip (102) is connected to one column of dimming units (101).Type: GrantFiled: June 16, 2021Date of Patent: November 7, 2023Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yaoyao Wang, Rui Han, Jie Yu, Xiaoxia Wang, Meng Li, Shulin Qin, Tielei Zhao, Chunhua Wang, Pengtao Li, Tingfeng Huang, Xiaoqiao Dong
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Patent number: 11798518Abstract: An image processing device and method for displaying multi-screen are provided. The image processing device includes an image processing circuit, a transmission arrangement circuit, and an image merge circuit. The image processing circuit receives and processes a first image information with a first bandwidth and a second image information with a second bandwidth to generate a first image information package and a second image information package which are transmitted to the transmission arrangement circuit. The image merge circuit receives and restores the first image information package and the second image information package from the transmission arrangement circuit with a third bandwidth, and outputs the first image information package and the second image information package to a display together. When the first image information and the second image information are in a full-screen mode, the third bandwidth is less than a sum of the first bandwidth and the second bandwidth.Type: GrantFiled: July 23, 2021Date of Patent: October 24, 2023Assignee: Aten International Co., Ltd.Inventor: Yi-Jen Chen
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Patent number: 11775620Abstract: Methods, systems, and apparatus for blocking screenshots and screen recordings of content are disclosed. A first media content frame is received from a first computer device. It is determined that one or more user interface elements are present in the first media content frame. The user interface elements are extracted from the first media content frame. The user interface elements are converted to video. The video is encrypted to prevent screenshot capture of the one or more user interface elements present in the first media content frame by a second computer device lacking a decryption key when the video is played on a digital screen of the second computer device. A second media content frame is generated including the first media content frame overlaid by the video. The second media content frame is transmitted to the second computer device for the second media content frame to be played.Type: GrantFiled: December 10, 2021Date of Patent: October 3, 2023Assignee: SunroomInventors: Nikolas Sean Ryan, Lucy Mort
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Patent number: 11770513Abstract: Systems and methods for reducing a number of focal planes used to display a three-dimensional object are disclosed herein. In an embodiment, data defining a three-dimensional image according to a first plurality of focal planes are received. Pixel luminance values from the first plurality of focal planes are mapped to a second plurality of focal planes comprising fewer focal planes than the first plurality of focal planes. Data is stored identifying initial focal distances of the mapped pixel luminance values in the first plurality of focal planes. The second plurality of focal planes are then displayed on a near eye device which uses the data identifying initial focal distances of the mapped pixel luminance values to adjust a wavelength of light produced by the second plurality of images to cause the pixels to appear at their original focal distances.Type: GrantFiled: July 13, 2022Date of Patent: September 26, 2023Assignee: ROVI GUIDES, INC.Inventors: Seppo Valli, Pekka Siltanen
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Patent number: 11755224Abstract: A technique manages data in slices of difference sizes within different storage tiers. The technique involves, based on access activity for first data currently residing within a first slice having a first size, selecting a target set of storage devices within which to store the first data from among multiple sets of storage devices. The technique further involves moving the first data from the first slice having the first size to a second slice having a second size that is different from the first size. The technique further involves, after the first data is moved from the first slice to the second slice, storing the second slice in the target set of storage devices.Type: GrantFiled: July 27, 2017Date of Patent: September 12, 2023Assignee: EMC IP Holding Company LLCInventor: Nickolay Alexandrovich Dalmatov
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Patent number: 11748941Abstract: A graphics processing system has a rendering space which is divided into tiles. Primitives within the tiles are processed to perform hidden surface removal and to apply texturing to the primitives. The graphics processing system includes a plurality of depth buffers, thereby allowing a processing module to process primitives of one tile by accessing one of the depth buffers while primitive identifiers of another, partially processed tile are stored in another one of the depth buffers. This allows the graphics processing system to have “multiple tiles in flight”, which can increase the efficiency of the graphics processing system.Type: GrantFiled: November 22, 2022Date of Patent: September 5, 2023Assignee: Imagination Technologies LimitedInventor: Jonathan Redshaw
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Patent number: 11716226Abstract: A plurality of driver slice circuits arranged in parallel having a plurality of driver slice outputs, each driver slice circuit having a digital driver input and a driver slice output, each driver slice circuit configured to generate a signal level determined by the digital driver input, and a common output node connected to the plurality of driver slice outputs and a wire of a multi-wire bus, the multi-wire bus having a characteristic transmission impedance matched to an output impedance of the plurality of driver slice circuits arranged in parallel, each driver slice circuit of the plurality of driver slice circuits having an individual output impedance that is greater than the characteristic transmission impedance of the wire of the multi-wire bus.Type: GrantFiled: March 21, 2022Date of Patent: August 1, 2023Assignee: KANDOU LABS, S.A.Inventor: Roger Ulrich
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Patent number: 11677895Abstract: Provided is an imaging element including a reception interface that receives an imaging synchronization signal related to a timing of imaging and at least one output synchronization signal related to a timing of output of image data obtained by imaging from an outside of the imaging element, a memory that is incorporated in the imaging element and stores the image data obtained by imaging at a first frame rate in accordance with the imaging synchronization signal received by the reception interface, and an output circuit that is incorporated in the imaging element and outputs the image data stored in the memory at a second frame rate in accordance with the output synchronization signal received by the reception interface, in which the first frame rate is greater than or equal to the second frame rate.Type: GrantFiled: August 10, 2021Date of Patent: June 13, 2023Assignee: FUJIFILM CORPORATIONInventors: Tomoyuki Kawai, Hitoshi Sakurabu, Ryo Hasegawa, Makoto Kobayashi, Kazufumi Sugawara
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Patent number: 11659224Abstract: Network content delivery apparatus and methods based on content compiled from various sources and particularly selected for a given user. In one embodiment, the network comprises a cable television network, and the content sources include DVR, broadcast, nPVR, and VOD. The user-targeted content is assembled into a playlist, and displayed as a continuous stream on a virtual channel particular to that user. User interfaces accessible through the virtual channel present various functional options, including the selection or exploration of content having similarity or prescribed relationships to other content, and the ability to order purchasable content. An improved electronic program guide is also disclosed which allows a user to start over, record, view, receive information on, “catch up”, and rate content. Apparatus for remote access and configuration of the playlist and virtual channel functions, as well as a business rules “engine” implementing operational or business goals, are also disclosed.Type: GrantFiled: August 23, 2018Date of Patent: May 23, 2023Assignee: TIME WARNER CABLE ENTERPRISES LLCInventors: Patrick J. Donoghue, Jay Thomas
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Patent number: 11610358Abstract: Methods and tiling engines for tiling primitives in a tile based graphics processing system in which a rendering space is divided into a plurality of tiles. The method includes generating a multi-level hierarchy of tile groups, each level of the multi-level hierarchy comprising one or more tile groups comprising one or more of the plurality of tiles; receiving a plurality of primitive blocks, each primitive block comprising geometry data for one or more primitives; associating each of the plurality of primitive blocks with one or more of the tile groups up to a maximum number of tile groups such that if at least one primitive of a primitive block falls, at least partially, within the bounds of a tile, the primitive block is associated with at least one tile group that includes that tile; and generating a control stream for each tile group based on the associations, wherein each control stream comprises a primitive block entry for each primitive block associated with the corresponding tile group.Type: GrantFiled: February 6, 2021Date of Patent: March 21, 2023Assignee: Imagination Technologies LimitedInventors: Diego Jesus, John W. Howson, Panagiotis Velentzas, Robert Brigg, Xile Yang
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Patent number: 11601588Abstract: A take-off capture method includes: acquiring, in response to obtaining an image capturing operation triggered by a user prior to taking off, image frames within a designated duration, upon entering a take-off capture mode; filtering at least one designated image frame based on the acquired image frames, the designated image frame being an image frame where the user is at a take-off high point within the designated duration; and performing an image capturing operation and outputting a take-off capture image based on the designated image frame, when an acquiring time period does not reach the designated duration but the designated image frame is filtered based on the acquired image frames, or when an acquiring time period reaches the designated duration. The user can therefore easily and quickly obtain the take-off capture image with the best take-off posture captured by the user in the take-off process.Type: GrantFiled: March 25, 2021Date of Patent: March 7, 2023Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.Inventors: Guosheng Li, Fei Ran
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Patent number: 11574571Abstract: A display panel includes a second display region and a first display region arranged side by side in a direction in which data signal lines extend, and a source driver provided in a picture-frame region close to the second display region. The display panel further includes a switching signal line disposed between the second display region and the first display region, and a plurality of switches provided at intersecting portions of the data signal lines and the switching signal line. Each of the plurality of switches is connected at a control terminal thereof to the switching signal line, connected at a first conductive terminal thereof to a data signal line disposed in the first display region, and connected at a second conductive terminal thereof to a data signal line disposed in the second display region.Type: GrantFiled: March 26, 2019Date of Patent: February 7, 2023Assignee: SHARP KABUSHIKI KAISHAInventors: Masaaki Nishio, Noriyuki Tanaka, Kazuo Nakamura, Hongbing Weng
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Patent number: 11573758Abstract: A display device includes: a video playback unit configured to play video media including multiple frames; a first memory unit configured to store a video signal of the video media that is being played; an acquisition unit configured to acquire a readout control signal representing a readout timing for playing each frame in the video media in a first display device different from an own display device in a multi-display system formed from multiple display devices; a readout control unit configured to cause frames of the video signal corresponding to the readout controls signal to be sequentially read out from the first memory unit in accordance with the acquired readout control signal; and a display control circuit configured to display, on a display unit, the frames of the video signal that have been read out.Type: GrantFiled: March 14, 2019Date of Patent: February 7, 2023Assignee: SHARP NEC DISPLAY SOLUTIONS, LTD.Inventor: Tomohiro Mihara
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Patent number: 11553138Abstract: To enable HDR video signals of a plurality of signal interfaces to be satisfactorily handled. [Solution] A processing unit processes a linear high dynamic range video signal and obtains a high dynamic range video signal that has undergone a grayscale compression process. The processing unit is able to perform grayscale compression processes of a plurality of signal interfaces. For example, when a grayscale compression process of another signal interface other than a reference signal interface is performed, the processing unit further performs a process of adding characteristics of system gamma of the reference signal interface and a process of cancelling out characteristics of system gamma of the other signal interface.Type: GrantFiled: December 14, 2021Date of Patent: January 10, 2023Assignee: SONY CORPORATIONInventors: Koji Kamiya, Hiroaki Kikuchi, Jun Onuki, Tomoyuki Endo, Masaki Hirose
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Patent number: 11545109Abstract: Disclosed is a display backlight control method for adapting a display backlight source to multiple refresh rates. The method includes: ascertaining a relation between a refresh rate and a threshold; if the relation indicates that the refresh rate changes from being higher than the threshold to lower than the threshold, transmitting a first mode backlight control signal to make the display backlight source provide a first transitional backlight in a first transition period and then provide a constant backlight; and if the relation indicates that the refresh rate changes from being lower than the threshold to higher than the threshold, transmitting a second mode backlight control signal to make the display backlight source provide a second transitional backlight in a second transition period and then provide a non-transitional strobe backlight. The first (second) transitional backlight includes a first (second) transitional strobe backlight and a first (second) transitional constant backlight.Type: GrantFiled: July 23, 2021Date of Patent: January 3, 2023Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventor: Li-Ang Chen
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Patent number: 11538215Abstract: A graphics processing system has a rendering space which is divided into tiles. Primitives within the tiles are processed to perform hidden surface removal and to apply texturing to the primitives. The graphics processing system includes a plurality of depth buffers, thereby allowing a processing module to process primitives of one tile by accessing one of the depth buffers while primitive identifiers of another, partially processed tile are stored in another one of the depth buffers. This allows the graphics processing system to have “multiple tiles in flight”, which can increase the efficiency of the graphics processing system.Type: GrantFiled: October 1, 2021Date of Patent: December 27, 2022Assignee: Imagination Technologies LimitedInventor: Jonathan Redshaw
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Patent number: 11528795Abstract: A computer-implemented method of lighting control is disclosed. The method includes identifying a group of people according to a relationship between or among the people that indicates the people are likely to regularly reside in a common location, determining a goal for the group of people for aligning circadian cycles of people in the group of people, determining a time and manner for altering ambient light at the common location in a manner to achieve the determined goal; and generating control signals to cause ambient lighting appliances at the common location to alter their performance according to the determined time and manner to achieve the determined goal.Type: GrantFiled: May 13, 2019Date of Patent: December 13, 2022Assignee: F.lux Software LLCInventors: Michael Herf, Lorna Herf
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Patent number: 11528156Abstract: The present disclosure provides a secondary-stream data transmission method for use in a conference. An electronic device is communicatively connected to a peripheral device, and a virtual display apparatus and a virtual UAC device are virtualized on the electronic device. The virtual UAC device is configured to establish an audio data channel between the electronic device and the peripheral device, to obtain audio data. Image data is obtained from an output interface of a graphics card of the electronic device. If the image data needs to be transmitted to the virtual display apparatus, the image data, or the image data and the audio data are transmitted to the peripheral device, and are transmitted to the outside by the peripheral device. The present disclosure can not only implement compatibility of cross-platform operating systems, but also support different display modes such as duplication and extension.Type: GrantFiled: January 9, 2020Date of Patent: December 13, 2022Assignee: YEALINK (XIAMEN) NETWORK TECHNOLOGY CO., LTD.Inventor: Yun Liao
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Patent number: 11525968Abstract: Some embodiments may include a method of generating assessment data in a system including a galvanometric scanning system (GSS) having a laser device to generate a laser beam and an X-Y scan head module to position the laser beam on a work piece. The method may include selecting a dimension based on a desired accuracy for validation (and/or a characteristic of an imaging system in embodiments that utilize an imaging system). The method may include commanding the GSS to draw a mark based on a polygon or ellipse of the selected dimension around a predetermined target point associated with the work piece to generate assessment data, and following operation of the GSS based on said commanding, validating a calibration of the GSS using the assessment data (or an image thereof in embodiments that utilize an imaging system). Other embodiments may be disclosed and/or claimed.Type: GrantFiled: March 12, 2020Date of Patent: December 13, 2022Assignee: NLIGHT, INC.Inventors: Jay Small, Ken Gross
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Patent number: 11494986Abstract: An electronic mobile device having a physical display, at least one processor, a volatile memory, and non-volatile memory. Stored in the volatile memory are first instructions for generating a 2D user interface and second instructions for generating a 3D VR environment, and system instructions. In a first operation, the first instructions are executed to generate the 2D user interface and provide the 2D user interface to the physical display. In a second operation, the first instructions are executed to generate the 2D user interface and provide the 2D user interface to a virtual display in the volatile memory. Also, in the second operation, the second instructions are executed to generate the 3D VR environment so as to obtain the 2D user interface from the virtual display and render a 3D image using at least part of the 2D user interface, and provide the 3D image to the physical display.Type: GrantFiled: February 14, 2018Date of Patent: November 8, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Philippe Harscoet, Kihwan Choi, Yoonjeong Heo, Ku In Seog, Joungsoo Lee
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Patent number: 11475841Abstract: A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.Type: GrantFiled: August 21, 2020Date of Patent: October 18, 2022Assignee: Apple Inc.Inventors: Shingo Hatanaka, Derek Keith Shaeffer, Kenichi Ueno, Masaki Kinoshita, Nobutaka Shimamura
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Patent number: 11475533Abstract: This disclosure provides systems, devices, apparatus and methods, including computer programs encoded on storage media, for GPR optimization in a GPU based on a GPR release mechanism. More specifically, a GPU may determine at least one unutilized branch within an executable shader based on constants defined for the executable shader. Based on the at least one unutilized branch, the GPU may further determine a number of GPRs that can be deallocated from previously allocated GPRs. The GPU may deallocate, for a subsequent thread within a draw call, the number of GPRs from the previously allocated GPRs during execution of the executable shader based on the determined number of GPRs to be deallocated.Type: GrantFiled: May 18, 2020Date of Patent: October 18, 2022Assignee: QUALCOMM IncorporatedInventors: Andrew Evan Gruber, Yun Du
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Patent number: 11450265Abstract: A display device includes a display panel and a display driving circuit having improved degradation uniformity. The display panel includes sub-pixels, each of which includes a light emitting element and a driving transistor. The display driving circuit drives the display panel to display a degradation uniformity restoration image in an afterimage occurrence predicted area detected in the display panel during an image quality control period. The afterimage occurrence predicted area includes first and second sub-pixels of the sub-pixels. Before the image quality control period, the amount of accumulated current having flowed through the first sub-pixel is greater than the amount of accumulated current having flowed through the second sub-pixel. During the image quality control period, the amount of current flowing through the second sub-pixel is greater than the amount of current flowing through the first sub-pixel.Type: GrantFiled: October 28, 2021Date of Patent: September 20, 2022Assignee: LG Display Co., Ltd.Inventors: Minjae Yoo, JaeYoon Kim, GyuJin Bae
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Patent number: 11431879Abstract: Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can obtain an indication of a new frame and, in response to the indication of the new frame not including an indication of a flip completion event: (i) fill the display buffer with the new frame; (ii) scan out the new frame from the display buffer to a display port; and (iii) apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame.Type: GrantFiled: March 15, 2021Date of Patent: August 30, 2022Assignee: Intel CorporationInventors: Jason Tanner, Paul Diefenbaugh, Vishal Sinha, Arthur Runyan, Gary K. Smith, Kathy Bui, Yifan Li, Shirley Huang Meterelliyoz
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Patent number: 11380273Abstract: Buttons and other interactive functionality for touchscreen displays of e-book and other electronic media content can be automatically optimized for viewing on client devices, in particular those employing an electrophoretic display. A hardware display driver pushes e-ink material through various predetermined voltage waveforms to consistently accomplish interface effects such as color inversion for a button which is touched on the interface screen. Machine learning schema can assist in determining the appropriate waveforms for interactive elements in the content.Type: GrantFiled: November 6, 2020Date of Patent: July 5, 2022Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Elie Saliba, Hao Hu
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Patent number: 11290641Abstract: An electronic device is provided. The electronic device includes a communication module, a memory, a display, and a processor, wherein the processor may confirm a user input related to selection of an image corrected by using a first image processing scheme, transmit attribute information related to the first image processing scheme to an external electronic device through the communication module, based on the user input, receive, from the external electronic device through the communication module, the image corrected by using a second image processing scheme selected based on the attribute information in the external electronic device, and display, through the display, the image corrected by using the second image processing scheme.Type: GrantFiled: February 14, 2019Date of Patent: March 29, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Changsu Han, Hyunhee Park, Sungjun Lim, Youngjo Kim, Jaegon Kim, Hongseok Yang, Kihuk Lee
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Patent number: 11272988Abstract: Disclosed herein are systems, methods, and software for providing a virtual environment with enhanced visual textures and haptic detail. In some embodiments, a texture atlas and UV mapping is used to render virtual objects having multiple textures that can be manipulated in real time. In some cases, UV coordinates are used to provide enhanced haptic detail.Type: GrantFiled: February 26, 2021Date of Patent: March 15, 2022Assignee: FVRVS LIMITEDInventors: Ian Hew Crowther, Victoria Jane Smalley
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Patent number: 11263064Abstract: The present disclosure relates to methods and apparatus for machine learning processing. For example, disclosed techniques facilitate improving execution of machine learning primitives. Aspects of the present disclosure may store a command stream generated by an application in a buffer, the command stream including a plurality of machine learning primitives for execution by a graphics processor. Further, aspects of the present disclosure identify, after receiving a request from the application to finalize the buffer, two or more machine learning primitives of the buffer that may be replaced with a fused shader kernel. Additionally, aspects of the present disclosure may store the fused shader kernel in the buffer to generate a fused command buffer.Type: GrantFiled: December 30, 2019Date of Patent: March 1, 2022Assignee: QUALCOMM IncorporatedInventors: Hitendra Gangani, Balaji Calidas, Jeremy Williams
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Patent number: 11223778Abstract: To enable HDR video signals of a plurality of signal interfaces to be satisfactorily handled. A processing unit processes a linear high dynamic range video signal and obtains a high dynamic range video signal that has undergone a grayscale compression process. The processing unit is able to perform grayscale compression processes of a plurality of signal interfaces. For example, when a grayscale compression process of another signal interface other than a reference signal interface is performed, the processing unit further performs a process of adding characteristics of system gamma of the reference signal interface and a process of cancelling out characteristics of system gamma of the other signal interface.Type: GrantFiled: June 26, 2017Date of Patent: January 11, 2022Assignee: SONY CORPORATIONInventors: Koji Kamiya, Hiroaki Kikuchi, Jun Onuki, Tomoyuki Endo, Masaki Hirose
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Patent number: 11211036Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.Type: GrantFiled: July 2, 2020Date of Patent: December 28, 2021Assignee: Apple Inc.Inventors: Brijesh Tripathi, Arthur L. Spence, Joshua P. de Cesare, Ilie Garbacea, Guy Cote, Mahesh B. Chappalli, Malcolm D. Gray, Christopher P. Tann
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Patent number: 11195486Abstract: A driving device and a driving method thereof. The driving device comprises a system-on-chip and a timing control board. The system-on-chip is set to receive and process image data signals of frames to be transmitted, and output a first image data signal and a difference signal between image data signals of the current frame and the previous frame. The timing control board is set to process the first image data signal, then output a second image data signal, and to perform the output according to the difference signal and the second image data signals of the current frame and the previous frame.Type: GrantFiled: December 26, 2018Date of Patent: December 7, 2021Assignee: HKC Corporation LimitedInventor: Mingliang Wang
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Patent number: 11170675Abstract: A method for performing hybrid over-current protection (OCP) detection in a display module and associated timing controller are provided. The method includes: during initialization of the display module, after a set of driving voltages have been established, performing first OCP detection in a built-in self-test (BIST) mode to generate a first OCP detection result; writing the first OCP detection result into a register bank, for being accessed by a host device, wherein the display module is applicable to displaying information for the host device; performing second OCP detection in a normal mode to generate a second OCP detection result; and writing the second OCP detection result into the register bank, for being accessed by the host device.Type: GrantFiled: March 19, 2020Date of Patent: November 9, 2021Assignee: HIMAX TECHNOLOGIES LIMITEDInventor: Ching-Lun Chen
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Patent number: 11164365Abstract: A graphics processing system has a rendering space which is divided into tiles. Primitives within the tiles are processed to perform hidden surface removal and to apply texturing to the primitives. The graphics processing system includes a plurality of depth buffers, thereby allowing a processing module to process primitives of one tile by accessing one of the depth buffers while primitive identifiers of another, partially processed tile are stored in another one of the depth buffers. This allows the graphics processing system to have “multiple tiles in flight”, which can increase the efficiency of the graphics processing system.Type: GrantFiled: November 12, 2020Date of Patent: November 2, 2021Assignee: Imagination Technologies LimitedInventor: Jonathan Redshaw
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Patent number: 11132766Abstract: An image processing method and device are disclosed. The method is applicable to an image processing device having an operating system, and the method includes: receiving, by an image processing module of the operating system, an instruction of a first application program to call the image processing module of the operating system, where the instruction carries a to-be-displayed image and a resolution of the to-be-displayed image; and when the resolution of the to-be-displayed image is less than a first threshold, performing, by the image processing module, super-resolution processing on the to-be-displayed image, and displaying an image obtained after the super-resolution processing, to resolve a problem of a low image definition in a conventional display method.Type: GrantFiled: October 13, 2017Date of Patent: September 28, 2021Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Kuang Ting Chuang, Xin Jin, Huihai Shen, Yuchao Lin, Junxiong Sun, Xiaodong Liu