Abstract: Many embodiments of the invention include systems and methods for evaluating motion from a video, the method includes identifying a target individual in a set of one or more frames in a video, analyzing the set of frames to determine a set of pose parameters, generating a 3D body mesh based on the pose parameters, identifying joint positions for the target individual in the set of frames based on the generated 3D body mesh, predicting a motion evaluation score based on the identified join positions, providing an output based on the motion evaluation score.

Abstract: A system for a spectator to view a virtual reality of a performer includes a head mounted display worn by the performer which produces the virtual reality for the performer to see while wearing the head mounted display. The system includes an audience portion having an audience display for an audience member which receives input signals from a network corresponding to the virtual reality being viewed by the performer on the head mounted display and displays these input signals on the audience display for the spectator to view. A method for a spectator to view a virtual reality of a performer.

Abstract: Embodiments are provided for managing the operation of sensors in an electronic device. According to certain aspects, the electronic device may detect a change in motion from an initial set of sensor data generated by a sensor(s). A memory cache may store the initial set of sensor data or additional sensor data generated by the sensor(s). The electronic device may initiate a supplemental algorithm that analyzes the cached data. Based on the analysis of the cached data and whether the change in motion is confirmed or whether additional motion is detected, the electronic device may manage the operation of the supplemental algorithm.

Abstract: A system may be used to redact an image to be displayed by a display device. By intercepting a signal before an image of the signal is displayed on a display device, the display of confidential, sensitive and inappropriate information may be suppressed. More specifically, the image of the signal is analyzed using a content recognition algorithm to identify items of content, which may be redacted by modifying the signal. Using this concept, the image may be redacted by the display device, or by a port or adapter between a signal generator and the display device, without relying on redaction software local to the signal generation system.

Abstract: Disclosed herein are an image encoding/decoding method and apparatus. An image decoding method performed by an image encoding apparatus may include acquiring size information indicating a size of a current slice corresponding to at least a portion of a current picture from a bitstream and determining the size of the current slice based on the size information.

Abstract: A client device receives, from a server, first content directed to a first buffer in the client device and second content directed to a second buffer in the client device. The client device buffers the first content in the first buffer and buffers the second content in the second buffer. At least a portion of the second content is buffered in the second buffer substantially simultaneously with buffering the first content in the first buffer. The client device receives a command from a virtual set-top application, running on the server, that corresponds to the client device. The client device runs a virtual set-top local client that receives the command from the virtual set-top application and selects the first buffer as a content source. The selecting is performed in accordance with the command. The client device provides the selected content for display.

Abstract: Technologies for managing paravirtual network device queue and memory of a network computing device that includes multi-core processor, a multi-layer cache, a host, and a plurality of virtual machine instances. The host is assigned a processor core of the processor and may be configured to copy a received network packet to a last level cache of the multi-layer cache and determine one or more virtual machine instances configured to process the received network packet. Each virtual machine instance has been assigned a processor core of the processor and has been allocated a first level cache of the multi-level cache memory associated with the respective processor core. The host is additionally configured to inject an interrupt into each processor core of the determined virtual machine (s) which indicates to the virtual machine instance (s) that the received network packet is available to be processed.

Abstract: Techniques to enable virtual reality content to be delivered using a video codec that operates according to a scalable video encoding standard. Base layer frames for the different views of the virtual reality content are downloaded by a client device. The views are prioritized using a prediction model that assigns priorities based on the likelihood that a corresponding view will be selected within a particular period of time. Enhancement layer frames are then selected and downloaded based on the priorities.

Abstract: Provided is an image sensor that is connected to a data bus to which another image sensor is connected and image data is transmitted, and a collision detection line to which the another image sensor is connected and which is pulled up to a voltage at a first level through a register. The image sensor determines, on a basis of a state of the collision detection line, whether a collision of pieces of the image data is to occur on the data bus when the image data is output, and then outputs the image data to the data bus.

Abstract: A moving image processing device includes: a storage unit storing, by dividing an image into pixel blocks and performing image processing for the individual pixel blocks, an execution state of image processing for each pixel block in encoding or decoding processing for the image; a determination unit determining whether image processing for a first pixel block is executable, based on an execution state of image processing for a second pixel block for which image processing for the first pixel block has a dependence regarding a processing order; and an execution unit performing, in parallel or pseudo-parallel, image processing for the first pixel blocks for which image processing is determined to be executable by the determination unit, and updating an execution state of image processing for the first pixel block, whereby encoding or decoding processing for a moving image is accelerated.

Abstract: Methods and devices for performing one step compositing may include receiving at least a first surface from a first image source and a second surface from a second image source. The methods and devices may include generating a composite image with a combined first surface and second surface by contemporaneously applying position corrections to the first surface and the second surface and lens distortion corrections to the first surface and the second surface and blending the first surface and the second surface into respective positions in the composite image. The methods and devices may include transmitting the composite image representing a virtual environment for presentation to a downstream consumer.

Abstract: A multifunction peripheral that is capable of performing, in parallel, a plurality of processes including a scanning process on an original using a scanner section. A RAM holds image data generated by the scanner section. A scanner transfer section transfers data from the scanner section to the RAM. A transfer rate of data from the scanner section to the RAM is set by switching at least between a first transfer rate and a second transfer rate lower than the first transfer rate. In a case where a plurality of processes including the scanning process are executed in parallel, a data transfer rate is switched by switching the data transfer rate based on a user's operation performed on a console section.

Abstract: A network device includes a transmit buffer from which data is transmitted to a network, and a packet buffer from which data chunks are transmitted to the transmit buffer in response to read requests. The packet buffer has a maximum read latency from receipt of a read request to transmission of a responsive data chunk, and receives read requests including a read request for a first data chunk of a network packet and a plurality of additional read requests for additional data chunks of the network packet. A latency timer monitors elapsed time from receipt of the first read request, and outputs a latency signal when the elapsed time reaches the first maximum read latency. Transmission logic waits until the elapsed time equals the first maximum read latency, and then transmits the first data chunk from the transmit buffer, without regard to a fill level of the transmit buffer.

Abstract: In one example, a timing controller is described, which may include a receiver to receive input data having an input signal from a source unit. The timing controller may include a data control unit to enable panel self-refresh (PSR) mode when the input signal is within a first voltage range and disable the PSR mode when the input signal is within a second voltage range. The first voltage range being different from the second voltage range. The timing controller may include a transmitter to transmit the input data to a display based on an output of the data control unit.

Abstract: Methods, systems, and devices for gesture detection are described. A device may identify a set of configured gestures and determine a set of minimum frame rates, where each minimum frame rate may correspond to at least one configured gesture in the set of configured gestures. The device may set an initial frame rate for a sensor based at least in part on the set of minimum frame rates. For example, the device may identify a maximum frame rate of the set of minimum frame rates and set the initial frame rate to be equal to or greater than the maximum frame rate. The device may capture a set of images using an initial frame rate and detect a configured gesture of the set of configured gestures based on the set of images.

Abstract: Wager-based video slot reel games are described where prizes are awarded based upon the appearance of scatter symbols. The games can allow a player to select the number of scatter symbols needed to win prizes. Also, the game logic can be configured to select the number of scatter symbols needed to win prizes. In one embodiment, a bonus game including free spins and scatter symbols is generated. Prior to beginning the bonus game, a player can select a combination of free spins and scatter symbols needed to win prizes, such as progressive prizes. Although the scatter symbols and/or free spins needed to win prizes can be varied within a video slot reel game, the probability of winning the prizes can be maintained approximately the same for each variation.

Abstract: According to one embodiment, a drive circuit for a display device includes a plurality of pixels. Each of the pixels includes a memory, and a display element driven based on output data of the memory. The drive circuit includes a storage control circuit for storing, in the memory, the data from a signal line, and a display control circuit which provides the display element with a display signal or a non-display signal based on the data stored in the memory. The drive circuit changes a display area from a first display state to a second display state. When the drive circuit sets the display area to the second display state, the drive circuit supplies a signal which does not depend on the image data to the display element.

Abstract: The present invention relates to a method for encoding digital video data corresponding to a sequence of digital source images using a cache memory, each of the digital source images having an equal source image width corresponding to a first number of blocks, the cache memory having a cache width corresponding to a second number of blocks, wherein the second number of blocks is smaller than the first number of blocks.

Abstract: A display method and a display device are disclosed. The method includes: detecting whether a displayed content in a display screen changes; controlling the display screen to update alternately display data respectively corresponding to a first part and a second part of a display unit in each column of display unit, in response to detecting that the displayed content does not change. The number of updated pixels of the display screen each time may be reduced, while the original refresh frequency is maintained, so the problem that the splash screen phenomena is caused in the display screen by reducing the refresh frequency of the display screen may be solved, thus achieving effects of avoiding the splash screen phenomena of the display screen and of reducing the power consumption of the display screen while maintaining the original refresh frequency of the display screen.

Abstract: The present invention relates to a method for encoding digital video data corresponding to a sequence of digital source images using a cache memory, each of the digital source images having an equal source image width corresponding to a first number of blocks, the cache memory having a cache width corresponding to a second number of blocks, wherein the second number of blocks is smaller than the first number of blocks.

Abstract: A router fabric for switching real time broadcast video signals in a media processing network includes a logic device configured to route multiple channels of packetized video signals to another network device, a crossbar switch configured to be coupled to a plurality of input/output components and to switch video data of the multiple channels between the logic device and the plurality of input/output components in response to a control instruction, and a controller configured to map routing addresses for each video signal relative to the system clock, and to send the control instruction with the mapping to the crossbar switch and the logic device.

Abstract: In response to a processor receiving data associated with a shared memory location, a contention blocking buffer stores a memory address of the shared memory location. In response to a probe seeking to take ownership of the shared memory location, the contention blocking buffer determines if the memory address indicated by the probe is stored at the contention blocking buffer. If so, the contention blocking buffer blocks the probe, thereby preventing another processor from taking ownership of the shared memory location.

Abstract: A method for rotating macro-blocks of a frame of a video stream. A degree of rotation for the video stream is accessed. A macro-block of the video stream is accessed. The macro-block is rotated according to the degree of rotation. The macro-block is repositioned to a new position within the frame, wherein the new position is based on the degree of rotation.

Abstract: For a decoding apparatus based on H.265/HEVC with single-core or single-threaded hardware not parallelized, which executes decoding a plurality of tiles and filtering around a tile boundary, the disclosed invention is intended to reduce the frequency of access to decoded data around the boundaries between tiles stored in a frame memory for filtering such data or reduce the circuit size of a buffer that retains decoded data around the boundaries between tiles. The image decoding apparatus disclosed herein executes decoding and filtering in raster scan order across a screen independently of the sizes and positional relations of tiles. At a tile boundary, decoding proceeds to a right adjacent tile on the same row, rather than decoding coding blocks on one row down in the same tile, and filtering is also executed using decoded data of row-wise adjacent coding blocks.

Abstract: In a reproduction method, a first video stream has a first dynamic range where a maximum value of a luminance dynamic range is more than 100 nits, and a display apparatus displays video in a second dynamic range narrower than the first dynamic range. The method includes: determining whether the first video stream is quantized based on a hybrid OETF; (i) when it is determined that the first video stream is quantized based on the hybrid OETF, reproducing the first video stream; and (ii) when it is determined that the first video stream is not quantized based on the hybrid OETF, converting a luminance dynamic range of the first video stream from the first dynamic range to the second dynamic range to obtain a second video stream, and reproducing the second video stream.

Abstract: A processor may support a two-dimensional (2-D) gather instruction and a 2-D cache. The processor may perform the 2-D gather instruction to access one or more sub-blocks of data from a 2-D image stored in a memory coupled to the processor. The 2-D cache may store the sub-blocks of data in a multiple cache lines. Further, the 2-D cache may support access of more than one cache lines while preserving a 2-D structure of the 2-D image.

Abstract: Methods for preprocessing pixel data using a Direct Memory Access (DMA) engine during a data transfer of the pixel data from a first memory (e.g., a DRAM) to a second memory (e.g., a local cache) are described. The pixel data may derive from an image capturing device (e.g., a color camera or a depth camera) in which individual pixel values are not a multiple of eight bits. In some embodiments, the DMA engine may perform a variety of image processing operations on the pixel data prior to the pixel data being written into the second memory. In one example, the DMA engine may be configured to identify and label one or more pixels as being within a particular range of pixel values and/or the DMA engine may be configured to label pixels as belonging to one or more pixel groups based on their pixel values.

Abstract: A liver region extraction unit and a structural element extraction unit extracts the liver region and structural elements, such as the hepatic artery and the hepatic vein, from a three-dimensional image, and a surface data generation unit generates surface data of the liver region and surface data of the structural elements. A pattern adding unit adds a textured pattern to at least one of the surfaces of the liver region and the structural elements, and a data generation unit generate three-dimensional model data by combining the surface data of the liver region and the surface data of the structural elements after the addition of the textured pattern. A three-dimensional model making device makes a three-dimensional model of the liver based on the three-dimensional model data.

Abstract: An authentication system includes a device; and an information processing apparatus connected to the device. The device includes a state management unit that manages an authentication state in the device and causes the device to enter a log-out state; and a first communication unit that transmits an authentication scheme available in the device to the information processing apparatus when the device enters the log-out state. The information processing apparatus includes a second communication unit that receives the authentication scheme; a generation unit that generates a log-in screen based on screen setting information corresponding to the received authentication scheme; and a display controller that controls to display the log-in screen on a display unit.

Abstract: A convolution image processor includes a load and store unit, a shift register unit, and a mapping unit. The load and store unit is configured to load and store image pixel data and allow for unaligned access of the image pixel data. The shift register is configured to load and store at least a portion of the image pixel data from the load and store unit and concurrently provide access to each image pixel value in the portion of the image pixel data. The mapping unit is configured to generate a number of shifted versions of image pixel data and corresponding stencil data from the portion of the image pixel data, and concurrently perform one or more operations on each image pixel value in the shifted versions of the portion of the image pixel data and a corresponding stencil value in the corresponding stencil data.

Abstract: For frame buffer power management, a frame buffer includes a write circuit and a read circuit, and drives a display. A power management module terminates power to the frame buffer in response to a power reduction policy being satisfied.

Abstract: A medical information recording apparatus includes: an input portion that includes a plurality of input terminals and into which a medical image can be inputted from a plurality of image pickup apparatuses, and that detects whether the medical image is inputted through any input terminal among the plurality of input terminals and outputs a detection result; a screen synthesis portion that performs synthesis processing according to one synthesis pattern among a predefined plurality of synthesis patterns for one or more of the medical images inputted through the plurality of input terminals, determines a medical scene or changing of the medical scene based on a detection result of the input portion, switches the synthesis pattern based on a determination result, and outputs a synthesized image based on the one or more medical images that are inputted; and a recording processing portion that records the synthesized image as a single image file.

Abstract: Provided are systems and methods for providing enhanced motion detection. One system providing enhanced motion detection includes a smart display, an interface subsystem including a human interface device (HID), and a console having a processor configured to form communication links with the smart display and the interface subsystem and to provide motion detection feedback, using the smart display, to a user of the HID, where the HID is configured to sense motion of the HID and utilize a predictive model to characterize the motion of the HID. One interface subsystem includes a camera to sense motion of a user of the HID. One processor is configured to negotiate a reduced response latency with the smart display.

Abstract: A display system comprises a processing device connected to a plurality of display devices, the processing device comprising a processor connected to a system memory and to a graphics processing unit, the graphics processing unit comprising a graphics processor connected to a video memory. A method of operating the system comprises the steps of maintaining a system frame buffer in system memory, creating a shared primary surface in video memory for an additional display device not controlled by the graphics processing unit, rendering the contents of the system frame buffer onto the shared primary surface, rendering any and all directly rendered applications onto the shared primary surface, maintaining a second frame buffer in system memory, copying at least some of the content of the shared primary surface to the second frame buffer, and outputting at least some of the content of the second frame buffer to the additional display device.

Abstract: A hybrid display frame buffer for a display subsystem. An embodiment of an apparatus a first logic to split a video image into a first data portion and a second data portion; a display frame buffer including a first memory component having a first type of memory and a second memory component having a second type of memory, the first logic to write the first data portion to the first memory component and the second data portion to the second memory component; and a second logic to read the first data portion from the first memory component and the second data component from the second memory component, and to combine the first data portion and the second data portion to generate a combined video image.

Abstract: A method for color grading input video data for display on a target display comprises obtaining target display metadata indicative of a capability of the target display, obtaining input video data metadata indicative of image characteristics of the input video data, automatically determining initial values for parameters of a parameterized sigmoidal transfer function, at least one of the initial values based at least in part on at least one of the target display metadata and the input video data metadata and mapping the input video data to color-graded video data according to the parameterized transfer function specified using the initial values.

Abstract: A method can include buffering video data to a buffer that includes a buffer capacity that corresponds to a video time interval; sampling video data at a sampling rate of at least once per video time interval; processing the sampled video data for gesture evidence; and, responsive to gesture evidence in the sampled video data, processing the buffered video data for additional gesture evidence. Various other apparatuses, systems, methods, etc., are also disclosed.

Abstract: A method and apparatus are described for processing video data. In one embodiment, a processor is provided with a video compression engine (VCE) that has a memory having a plurality of rows and a plurality of columns of addresses. Video data, (luma data or chroma data), is written in row (i.e., raster) order into the addresses of the memory, and then the data is read out of the addresses in column order. Data is written into the addresses of the columns of the memory as they are read out, which is subsequently read out in row order. This process of switching back and forth between reading and writing data in row and column order continues as the data is read and processed by an encoder to generate a compressed video stream.

Abstract: A display device includes an uncompressed graphical frame buffer that buffers uncompressed graphical frame data. The display device reads the uncompressed graphical frame data from the uncompressed graphical frame buffer for display in conjunction with a first frame of the plurality of video frames. A compression/decompression engine writes the uncompressed graphical frame data to a compressed graphical frame buffer. The video display device reads the compressed graphical frame data from the compressed graphical frame buffer via the compression/decompression engine for display in conjunction with a second frame of the plurality of video frames.

Abstract: Blocks of pixels from a video frame may be encoded in a block processing pipeline using wavefront ordering, e.g. according to knight's order. Each of the encoded blocks may be written to a particular one of multiple buffers such that the blocks written to each of the buffers represent consecutive blocks of the frame in scan order. Stitching information may be written to the buffers at the end of each row. A stitcher may read the rows from the buffers in order and generate a scan order output stream for the frame. The stitcher component may read the stitching information at the end of each row and apply the stitching information to one or more blocks at the beginning of a next row to stitch the next row to the previous row. Stitching may involve modifying pixel(s) of the blocks and/or modifying metadata for the blocks.

Abstract: An image processing device that converts original image data to target image data is provided. The image processing device includes: a static random access memory (SRAM); an image scaling circuit that generates scaled image data according to the original image data and stores the scaled image data to the SRAM; and a video encoding circuit that accesses the scaled image data from the SRAM and encodes the accessed scaled image data to generate the target image data. The target image data corresponds to an image frame. A part of the target image data is intra frame data encoded by an intra frame compression method, and the other part of the target image data is predicted frame data encoded by a predicted frame compression method.

Abstract: A method for read pointer maintenance of a buffering apparatus, which is arranged to buffer data of a multi-tile encoded picture having a plurality of tiles included therein, includes the following steps: judging if decoding of a first tile of the multi-tile encoded picture encounters a tile boundary of the first tile; and when it is judged that the tile boundary of the first tile is encountered, storing a currently used read pointer into a pointer buffer, and loading a selected read pointer from the pointer buffer to act as the currently used read pointer.

Abstract: This invention provides an image processing apparatus and an image processing method. By calculation of the pixel difference that is the difference of each corresponding pixels between the current image and the previous image with its neighbor pixel difference, this invention can determine the blending value.

Abstract: An image display apparatus that displays an image on the basis of input image signals corresponding to sub-pixels forming one pixel includes a shift-amount storing unit that stores shift amounts of display positions of the sub-pixels relative to given reference positions in a display image, an image-signal correcting unit that corrects the input image signals according to the shift amounts, and an image display unit that displays an image on the basis of the image signals corrected by the image-signal correcting unit.

Abstract: A dynamically reconfigurable heterogeneous systolic array is configured to process a first image frame, and to generate image processing primatives from the image frame, and to store the primatives and the corresponding image frame in a memory store. A characteristic of the image frame is determined. Based on the characteristic, the array is reconfigured to process a following image frame.

Abstract: A display device may reduce the latency of the display of a digital signal by reducing the latency that the display device adds to the digital signal. After a digital signal is received by an input module, the signal is stored in a frame buffer as a plurality of pixels. A controller determines the input frame rate of the digital signal and a pixel delay. The controller monitors the frame buffer to determine when the frame buffer has stored a number of pixels greater than or equal to the pixel delay. After the frame buffer contains enough pixels, the controller initiates transmission of the pixels from the frame buffer to a display module. In certain embodiments, the controller initiates transmission of the pixels to the display module before the frame buffer has stored all pixels corresponding to the frame.

Abstract: A scoreboard for a video processor may keep track of only dispatched threads which have not yet completed execution. A first thread may itself snoop for execution of a second thread that must be executed before the first thread's execution. Thread execution may be freely reordered, subject only to the rule that a second thread, whose execution is dependent on execution of a first thread, can only be executed after the first thread.

Abstract: Sequential write operations to a unit of compressed memory, known as a compression tile, are examined to see if the same compression tile is being written. If the same compression tile is being written, the sequential write operations are coalesced into a single write operation and the entire compression tile is overwritten with the new data. Coalescing multiple write operations into a single write operation improves performance, because it avoids the read-modify-write operations that would otherwise be needed.

Abstract: A display system and a data transmission method thereof are provided. When a first frame stored in a frame buffer and a plurality of second frames to be outputted by an audio and video (AV) source are the same, the AV source set a AV control signal corresponding to a self-refresh mode, and a timing controller controlled by the AV control signal accesses the first frame to output a display data. When the first frame and the second frames are different from each other, the AV source sets the AV control signal corresponding to a normal mode, and sets a AV data signal according to the second frames, and the timing controller controlled by the AV control signal outputs the display data corresponding to the received second frame or accesses the frame buffer to output the display data according to timings of the AV data signal and the display data.

Abstract: A non-buffered video line memory eliminates the need for double buffering video data during processing. While most double buffering systems double the amount of memory necessary to store video data, a non-buffered approach reduces the hardware memory costs substantially. A set of write and read pointers coupled with write and read incrementors allows data to be stored in raster order and removed in block order from a non-buffered memory device. The incrementors, in conjunction with a set of write and read pointers generate a base address for data to be written to and read from the non-buffered memory at substantially the same time. Encoding systems benefit substantially by being able to read and write information into a common memory rather than continuously switching between two different memories, by reducing complexity and cost.