Abstract: This disclosure describes techniques for reducing memory access bandwidth in a graphics processing system based on destination alpha values. The techniques may include retrieving a destination alpha value from a bin buffer, the destination alpha value being generated in response to processing a first pixel associated with a first primitive. The techniques may further include determining, based on the destination alpha value, whether to perform an action that causes one or more texture values for a second pixel to not be retrieved from a texture buffer. In some examples, the action may include discarding the second pixel from a pixel processing pipeline prior to the second pixel arriving at a texture mapping stage of the pixel processing pipeline. The second pixel may be associated with a second primitive different than the first primitive.

Abstract: Embodiments of partial update for a wireless display device include providing an update information message identifying a location of the partial update and the changed image data. A display source identifies changes in image data stored in a frame buffer, generates an update information message to identify the location of the changed image data and to provide the changed image data. A display sink receives the update information message and merges the changed image data with image data stored in a local frame buffer.

Abstract: A display controller system with a memory controller and buffers is described. The system enables transferring data from the main memory of the CPU to the image memory without interfering the image updating. As a result, the present invention may allow continuously updating the display image and continuously writing new image data from CPU to the image memory which improves overall system performance.

Abstract: A method and system for frame insertion in a digital display system is provided. The method is adapted for use with a liquid crystal display (LCD) type display and is effective to substantially reduce motion blur. The LCD display receives a sequence of digitized input frames at a first frequency. The method generates a sequence of output frames that include the digitized input frames interspersed with a plurality of modified frames. Each of the modified frames is substantially similar to a preceding digitized input frame, but has a reduced luminance. The modified frames may be generated by multiplying a preceding digitized input frame by a reduced luminance factor. The reduced luminance factor may be determined as a fixed value or as a function of an average pixel level of a preceding frame.

Abstract: The display of a Windows Desktop is modified using one or more processors (e.g. CPUs and/or GPUs) that re-direct drawing of the Desktop to mirrored swap chain buffers; modify the contents of the a front buffer of the mirrored swap chain buffers; and draw the Desktop using the modified contents of the front buffer of the mirrored swap chain buffers. To modify the displayed Desktop, Windows needs to draw into these mirrored swap chains instead of its own. To accomplish this, all Direct3D functions that use a swap chain are hooked so that they return the mirrored swap chain, and any function that uses the contents of the swap chain are hooked. Basically any function that takes a Direct3D surface or texture is hooked and the respective item from the mirrored swap chains is returned if it is in the mirrored swap chain data structures.

Abstract: A method for accessing a buffer of a display is provided, wherein the buffer is capable of storing frame data of at least one frame and the frame has a plurality of lines. A read line position that indicates a line currently being read in the buffer is obtained, wherein the line currently being read is to be shown on a screen of the display. A first time period is delayed to update the buffer when the read line position is smaller than a reference line position.

Abstract: Embodiments of the electronic device include a display driver with the ability to receive image data in a streaming display mode or a frame-buffered display mode. In some embodiments, the electronic device may switch seamlessly between the two display modes based on which display mode will provide reduced power usage given the type and/or variability of the image data being received.

Abstract: Systems, methods, and computer readable media for dynamically setting an executing application's display buffer size are described. To ameliorate display device overscan operations, the size of an executing application's display buffer may be set based on the display device's extent and a display mode. In addition, contents of the executing application's display buffer may be operated on as they are moved to a frame buffer based on the display mode. In one mode, for example, display buffer contents may be scaled before being placed into the frame buffer. In another mode, a black border may be placed around display buffer contents as it is placed into the frame buffer. In yet another mode, display buffer contents may be copied into the frame buffer without further processing.

Abstract: Systems, methods, and computer readable media for implementing reentrant compositing window manager applications are described. In general, techniques are disclosed for using a second application to composite portions of hierarchically structured objects and the window manager to composite certain other portions of the same object. More particularly, a window manager application may be used to composite objects of a first type (e.g., application backing store bitmaps) and then call or invoke a second application to composite objects of a second type (e.g., hierarchically structured objects). The second type of object includes information (e.g., a reference) of the composite window manager's output buffer at the time the second application was invoked.

Abstract: The techniques are generally related to management of buffers with a management unit that resides within an integrated circuit that includes a graphics processing unit (GPU). The management unit may ensure proper access to the buffers by the programmable compute units of the GPU to allow the GPU to execute kernels on the programmable compute units in a pipeline fashion.

Abstract: A method of rendering a scene with a plurality of objects includes rendering an object in a scene, wherein a portion of the object spans at least two of a plurality of non-overlapping tiles that subdivide the scene, and wherein the portion of the object is rendered only once in rendering the scene. The process further includes storing the rendered output of the object into a deep-framebuffer. While rendering the object and storing the rendered output of the object, in response to the size of the deep-framebuffer reaching a predetermined threshold, the steps that are performed include dividing the deep-framebuffer's contents based on the plurality of non-overlapping tiles, storing the divided contents of the deep-framebuffer in a plurality of tile files, and clearing the contents of the deep-framebuffer.

Abstract: A system, method, and computer program product are provided for applying an offer scheme to usage data using a user interface. In operation, usage data associated with a user is received from a server. Additionally, one or more offer schemes are displayed to the user using a user interface. Furthermore, the user is allowed to apply the one or more offer schemes to the usage data, utilizing the user interface. Still yet, the user is allowed to select one of the one or more offer schemes based on a result of the application, utilizing the user interface.

Abstract: An image display system includes: a frame buffer having a plurality of lines, each of which stores image data and repetition information of the image data; a memory controller in signal communication with the frame buffer for reading the image data and the repetition information from the frame buffer; a display controller in signal communication with the memory controller for regenerating the image data, which is provided from the memory controller, in accordance with the repetition information provided from the memory controller; and a display device in signal communication with the display controller for displaying the regenerated image data, which is provided from the display controller, under regulation by the display controller.

Abstract: A device and method for controlling frame input and output are applied to the reception of image data from a source device and output of the image data to a destination device, the device includes a buffer, a buffer control circuit, and a frame write controller. The input pixel clock is not equal to the output pixel clock. The frame write controller generates a write permission signal according to the Input DE and the Output DE. The buffer control circuit generates a write control signal according to the Input DE and the write permission signal, and generates a read control signal according to the Output DE. The buffer receives the image data from the source device according to the write control signal and the input pixel clock, and outputs the image data to the destination device according to the read control signal and the output pixel clock.

Abstract: A method for updating values of a depth buffer comprising values for display blocks of a display, and a device for implementing the method. The display is partitioned into a plurality of display regions, including a plurality of display blocks and having a minimum region depth value and a maximum region depth value. Each display region includes a plurality of display subregions. A minimum subregion depth value and a maximum subregion depth value are determined relative to at least one of the minimum region depth value and the maximum region depth value.

Abstract: An imaging and display apparatus for passive displays evaluates the illumination of an input scene and incorporates data representative of such input scene within a transfer media. The transfer media may be a broadcast or transmission of image data, illumination data and gamma information that can be received by a display system, which includes a passive display illuminated by incident light, to display images while adjusting the incident light and/or gamma based on the received data to reduce energy requirements, to increase contrast or shades of gray in the displayed image, and to optimize light source operation for color fidelity. The data may be provided as a video signal, modulated video signal, s-video signal, digital signal, or other signal that can be used by a passive display system to display images.

Abstract: The invention is related to a device for presenting, an image frame by help of a set of displaying commands wherein a displaying command comprises a displaying area and a displaying content. The device comprises means for adapting a first and/or a second displaying command set such that an adapted displaying command sets comprises displaying areas which do not intersect with any displaying area of the same set. Furthermore, the displaying areas of an adapted set cover a display area the image frames are displayed on. The device further determines displaying commands of the adapted second set not comprised in the adapted first set. Then, the determined displaying commands are executed. Adaptation makes comparison of displaying commands suitable for excluding areas from displaying/blitting/clearing.

Abstract: A system and a method are disclosed for updating a bi-stable display includes a framebuffer for storing waveforms for each pixel individually. The system includes determining a current state of a pixel of the bi-stable display; determining a desired state of the pixel of the bi-stable display; and updating the pixel by applying a determined control signal to the pixel to drive the pixel from the current state to the final state. Updating each pixel occurs independently of the other pixels of the bi-stable display.

Abstract: A circuit for serializing bits including a clock circuit and a serializer. The clock circuit may be configured to generate a plurality of clock signals from a received master clock signal. A plurality of bits may be transmitted to the serializer in response to a transition of a first clock signal. The serializer may comprise a system of latches and a rotary circuit. The system of latches may be configured to receive a first half of the plurality of bits in response to a first transition of a second clock signal and to receive a second half of the plurality of bits in response to a transition of a third clock signal. The rotary circuit may be configured to receive the plurality of bits from the system of latches and to output each bit at a particular time based on a plurality of rotary clock signals.

Abstract: A display device includes a display panel having gate lines and data lines, a signal controller driving the display panel, a graphic processing unit transmitting input image data to the signal controller, a gate driver driving the gate lines, and a data driver driving the data lines. The display panel is driven at a first frequency when displaying a moving image and driven at a lower frequency when displaying a still image. The signal controller includes a frame memory storing the input image data, a calculator calculating a representative value of image data stored in the frame memory, a line memory storing the representative value, and a kick-back corrector generating auxiliary image data by correcting the representative value according to a kick-back voltage. The data driver applies an auxiliary voltage corresponding to the auxiliary image data to the data lines in a vertical blank period when displaying the still image.

Abstract: Drive signals for a display device may be generated using Separable Nonnegative Matrix Series Representation (SNMSR) of source image data and applying a non-negative matrix factorization (NNMF) process to source image data to generate approximation image data (Ii), partial sum image data (Pi) and residue image data (Ji). Iteratively, NNMF may be applied to Ji such that subsequent Ii and Ji may be generated, where each Ii can be associated with a corresponding sub-frame image. At each iteration, the Ii may be sent to the display buffer for selective activation of multiple row and column drivers during a single sub-frame interval. At each iteration, a determination may be made if a predetermined criterion is satisfied. The iterations may be terminated and the series truncated when the predetermined criterion is satisfied. Integration of the sub-frame images displayed over a complete frame interval by human eye effectively corresponds to the source image.

Abstract: A method includes fetching first synthesized pixels from an update buffer of a memory and fetching data pixels from an image buffer of the memory during the first drive frame period. Respective data pixels are fetched synchronously with the fetching of corresponding first synthesized pixels. Respective data pixels fetched from the image buffer are synthesized with corresponding first synthesized pixels to generate second synthesized pixels. The second synthesized pixels are stored in the update buffer during the first drive frame period. The storing of second synthesized pixels may be paused based on a prediction that the fetching of first synthesized pixels will not complete within the first drive frame period. The fetching of data pixels from the image buffer of the memory may also be paused based on the prediction that the fetching of first synthesized pixels will not complete within the first drive frame period.

Abstract: Embodiments of the present invention provide for improved timing control in 2-D image processing to maintain a constant rate of memory fetches and pixel outputs even when the processing operations transition to a new line or frame of pixels. A one-to-one relationship between incoming pixel rate and outgoing pixel rate is maintained without additional clock cycles or memory bandwidth as an improved timing control according to the present invention takes advantage of idle memory bandwidth by pre-fetching a new column of pixel data in a first pixel block of a next line or frame while a new column of an edge pixel block on a current line is duplicated or zeroed out. As the edge pixel block(s) on the current line are processed, the data in the first pixel block of the next line or frame become ready for computation without extra clock cycles or extra memory bandwidth.

Abstract: Embodiments of the present invention set forth systems and methods for compressing thread group data written to frame buffer memory to increase overall memory performance. A compression/decompression engine within the frame buffer memory interface includes logic configured to identify situations where the threads of a thread group are writing similar scalar values to memory. Upon recognizing such a situation, the engine is configured to compress the scalar data into a form that allows all of the scalar data to be written to or read from the frame buffer memory in fewer clock cycles than would be required to transmit the data in uncompressed form to or from memory. Consequently, the disclosed systems and methods are able to effectively increase memory performance when executing thread group STORE and LOAD operations.

Abstract: A PDL data processing device may obtain PDL data including plural sets of drawing part data and a set of deletion part data. The set of the deletion part data may include timing information and data information indicating a target set of the drawing part data of a deletion target. The PDL data processing device may store the PDL data in a memory, create drawing data by utilizing the plural sets of the drawing part data, and delete from the memory the target set of the drawing part data indicated by the data information included in the set of the deletion part data, regardless of the timing indicated by the timing information included in the set of the deletion part data, at a specific timing which is subsequent to the timing indicated by the timing information.

Abstract: Remote desktop servers include a display encoder that maintains a secondary framebuffer that contains display data to be encoded and transmitted to a remote client display. The display encoder submits requests to update the display data in the secondary framebuffer to a video adapter driver that has access to a primary framebuffer whose display data is updated according to drawing commands received from applications running on the remote desktop servers. The video adapter driver utilizes a spatial data structure to track changes made to the display data located in regions of the primary framebuffer and copies the display data in those regions of the primary framebuffer to corresponding regions in the secondary framebuffer.

Abstract: A display apparatus, an integrated circuit and method thereof are disclosed. The display apparatus includes a frame buffer, a controller circuit, and a display driver circuit. The frame buffer is configured to retain a plurality of image frames to be displayed. The controller circuit, coupled to the frame buffer, is configured to determine whether a change in the image frames has occurred and whether a refresh time is expired. The display driver circuit, operatively coupled to the frame buffer and adapted to couple to an active display device, is configured to receive the image frames to be displayed from the frame buffer and dynamically refreshing the active display device when the change is determined or when a refresh time is expired.

Abstract: A display controller is provided that includes a processing unit configured to process input data, a memory unit configured to store some of the processed input data before a transition signal is enabled, a memory management unit configured to map consecutive virtual addresses of an image displayed on a display panel to physical addresses of data stored in the memory unit, and a control unit configured to control the processing unit and the memory management unit in response to a control signal and configured to provide a range of virtual addresses designated by the transition signal in response to enablement of the transition signal such that the image is displayed on the display panel.

Abstract: Various embodiments related to a host computing device for rendering and sending image data to a peripheral device for display at the peripheral device. For example, one embodiment comprises a host computing device, the host computing device comprising a data storage subsystem and a logic subsystem. The host computing device further comprises instructions stored in the data storage subsystem and executable by the logic subsystem to output to the peripheral device a frame of image data representing a difference between a currently rendered image and an (N?1)-th previously rendered image, N being an integer and having a value of 3 or more.

Abstract: An apparatus including a controller; a display; a frame memory configured to load a frame of data to the display and configured to be filled by a frame of data from the controller, wherein the controller is configured to control the insertion of blank fields between frames of data displayed on the display in dependence upon a detected context.

Abstract: Technologies are provided herein for redirecting video data from a host computer to a remote client using a service processor. The service processor exposes a virtual display adapter to the host computer so that the host computer can send video data to the service processor. The service processor includes a processor, a random access memory, and a device endpoint configured to communicate with the host computer. The service processor also includes a non-volatile memory that stores a firmware that executes on the processor to expose a virtual display adapter to the host computer by way of the device endpoint. Upon exposing the virtual display adapter to the host computer, the service processor receives video data directed to the virtual display adapter from the host computer and sends the video data to a remote client.

Abstract: Methods and systems for spatially aware sub-pixel rendering are described herein. Embodiments allow graphics rendering systems to convey additional spatial information in displayed graphics by utilizing sub-pixels of displays. An embodiment includes sampling pixels into a buffer, re-sampling the pixels, at sub-pixel level, at different offset positions from their positions in the buffer and displaying the re-sampled pixels. For example, individual red, green and blue sub-pixels can be re-sampled at offset positions from their original positions within pixels. Since embodiments of the invention can control respective positions of each red, green and blue sub-pixel, embodiments can produce sharp graphics with low aliasing. Furthermore, sub-pixels are effectively used for communicating additional spatial information in rendered graphics.

Abstract: A display control device for controlling a display panel includes a contents frame rate detector detecting a contents frame rate of an input image data and outputting a repetitive frame number dependent from a display frame rate of the display panel and the detected contents frame rate; a frame memory for storing a level data of a previous frame; and an emulated level generator in communication with the contents frame rate detector and the frame memory. An output level data to the display panel is generated according to the repetitive frame number from the contents frame rate detector, the previous level data from the frame memory and an input level data of the input image data.

Abstract: A display device includes a data request unit in a frame rate controller, and requires and transmits necessary data for the frame data buffer receiving and storing the image data of an entire pixel area and the rest of the frame rate controllers. In a case of a motion picture that is moved among a plurality of display areas, the image data corresponding to a plurality of regions is transmitted from the frame data buffer or a plurality of frame rate controllers, and in a case of the motion picture that is moved between neighboring pixel areas, the image data of the neighboring pixel area is transmitted from the frame data buffer or the neighboring frame rate controller for processing. Accordingly, a fast-moving motion picture may be realized without the need for an additional memory.

Abstract: A display driving device is disclosed. The display driving device includes an image data transmission interface, a frame buffer, and an over-driving processor. The image data transmission interface transmits image data, which is then received by and stored in the frame buffer. The over-driving processor is coupled to the image data transmission interface to receive current image data provided by the image data transmission interface, and also coupled to the frame buffer to receive previous image data saved in the frame buffer. In a dynamic display mode, the over-driving processor generates a display driving signal according to the previous image data and the current image data.

Abstract: A stream based memory access system for a video processor for executing video processing operations. The video processor includes a scalar execution unit configured to execute scalar video processing operations and a vector execution unit configured to execute vector video processing operations. A frame buffer memory is included for storing data for the scalar execution unit and the vector execution unit. A memory interface is included for establishing communication between the scalar execution unit and the vector execution unit and the frame buffer memory. The frame buffer memory comprises a plurality of tiles. The memory interface implements a first sequential access of tiles and implements a second stream comprising a second sequential access of tiles for the vector execution unit or the scalar execution unit.

Abstract: An LCD device and an LCD driving method select one among a plurality of threshold values provided along gray level regions of the pixel data as a threshold value for pixel data in a current frame interval. Accordingly, the number of times over-driving occurs due to noise when a still image is displayed can be minimized.

Abstract: A hook processing module hooks and preempts to a specific drawing command issued by an application program, and draws an image in an image data storage area within the RAM according to the acquired drawing command. VNC server acquires the image from the image data storage area, and transfers the acquired image to a projector via a network.

Abstract: When a processor, which transits from a first mode that causes a guest operating system to operate to a second mode that causes a virtual machine monitor managing the guest operating system to operate, when previously set transition condition is satisfied, transits to the second mode, a determining unit determines a cause or the transition. When it is determined that an execution of a process related to a completion of writing the image information in an image storage unit on the guest operating system is the cause, a detecting unit detects an updated portion representing an unmatched portion of the image information between before and after writing.

Abstract: A display unit includes: a display section; a memory temporarily holding less than one frame of image information; a drive section driving the display section based on the image information which is stored in the memory; and a processing section performing a predetermined process in conjunction with the drive section.

Abstract: One embodiment of the invention sets forth a CROP configured to perform both color raster operations and atomic transactions. Upon receiving an atomic transaction, the distribution unit within the CROP transmits a read request to the L2 cache for retrieving the destination operand. The distribution unit also transmits the source operands and the operation code to the latency buffer for storage until the destination operand is retrieved from the L2 cache. The processing pipeline transmits the operation code, the source and destination operands and an atomic flag to the blend unit for processing. The blend unit performs the atomic transaction on the source and destination operands based on the operation code and returns the result of the atomic transaction to the processing pipeline for storage in the internal cache. The processing pipeline writes the result of the atomic transaction to the L2 cache for storage at the memory location associated with the atomic transaction.

Abstract: A graphics animation and compositing operations framework has a layer tree for interfacing with the application and a render tree for interfacing with a render engine. Layers in the layer tree can be content, windows, views, video, images, text, media, or other types of objects for an application's user interface. The application commits state changes to the layers of the layer tree. The application does not need to include explicit code for animating the changes to the layers. Instead, an animation is determined for animating the change in state by the framework which can define a set of predetermined animations based on motion, visibility, and transition. The determined animation is explicitly applied to the affected layers in the render tree. A render engine renders from the render tree into a frame buffer. Portions of the render tree changing relative to prior versions can be tracked to improve resource management.

Abstract: A multithreaded rendering software pipeline architecture utilizes a rolling texture context data structure to store multiple texture contexts that are associated with different textures that are being processed in the software pipeline. Each texture context stores state data for a particular texture, and facilitates the access to texture data by multiple, parallel stages in a software pipeline. In addition, texture contexts are capable of being “rolled”, or copied to enable different stages of a rendering pipeline that require different state data for a particular texture to separately access the texture data independently from one another, and without the necessity for stalling the pipeline to ensure synchronization of shared texture data among the stages of the pipeline.

Abstract: The present invention discloses a frame buffer pixel circuit for a LCoS display device, wherein said circuit consists of a first transistor (M1), a second transistor (M2), a third transistor (M3), a fourth transistor (M4), a fifth transistor (M5), a sixth transistor (M6), a storage capacitor (C1) and a pixel capacitor (C2), wherein, the first transistor (M1) forms a pre-charge circuit, the second transistor (M2) and the third transistor (M3) form a threshold voltage generating circuit, the storage capacitor (C1) forms a sample and hold circuit, the fourth transistor (M4), the fifth transistor (M5) and the pixel capacitor (C2) form an input data voltage read-in circuit, and the sixth transistor (M6) forms a discharge circuit.

Abstract: A display apparatus comprises: a display screen including pixels, each displaying a natural image and a pattern of a predetermined character, a sign, a graphic or a combination thereof; a pattern memory unit 102 for storing a shape, a display position, a size and a gradation of the pattern, and for storing an accumulated display time of the pattern; a characteristic memory unit 103 for storing a characteristic of luminance lowering of a light emitting element; an accumulated quantity calculating unit 104 for calculating an accumulated quantity of luminance lowering of the pixels constituting the pattern; a correction quantity calculating unit 105 for calculating a correction quantity for each of the pixels constituting the pattern, based on the accumulated quantity of luminance lowering; and an image generating unit 106 for correcting an input image based on the correction quantity, to display a corrected image on the display screen.

Abstract: A scanning type image display apparatus including a light source, a frame buffer, a scanning mirror, a drive controller which outputs a drive signal to the scanning mirror, and a display controller which reads out pixel data from the frame buffer, generates display data for modulating an intensity of a laser beam using the readout pixel data, and causes the light source to emit an intensity-modulated laser beam based on the display data. The display controller calculates a scanning position of the laser beam on the display screen by the scanning mirror based on information relating to the drive signal inputted from the drive controller, reads out pixel data corresponding to the calculated scanning position on the display screen by executing a burst access to the frame buffer, and implements interpolation to generate the display data corresponding to the scanning position of the laser beam on the display screen.

Abstract: An information processing apparatus for encoding image data, includes a filter unit for performing a filtering operation on the image data in a layer fashion to generate a plurality of subbands including coefficient data segmented on a per frequency band basis, an intermediate data storage unit for storing intermediate data generated in the middle of the filtering operation of the filter unit, a coefficient storage unit for storing the coefficient data generated in the filtering operation of the filter unit, and a coefficient rearranging unit for performing a rearranging operation to rearrange the coefficient data stored on the coefficient storage unit so that the coefficient data is output in a predetermined order. The intermediate data storage unit writes and reads data thereon at a speed higher than the coefficient storage unit and being smaller in storage capacity than the coefficient storage unit.

Abstract: A computer-program product may have instructions that, when executed, cause a processor to perform operations including managing execution of application functions that access data in a shared buffer; determining if a first instruction that is stored at a first memory location causes, upon execution, data to be read from or written to the shared buffer; and when it is determined that the first instruction causes data to be read from or written to the shared buffer, 1) identify one or more replacement instructions to execute in place of the first instruction; 2) store the one or more replacement instructions; and 3) replace the first instruction at the first memory location with a second instruction that, when executed, causes the stored one or more replacement instructions to be executed.

Abstract: A system control unit 110 supplies frame data in a raster scan form. The system control unit 110 also supplies a data enable signal indicating effectiveness/ineffectiveness of each pixel data in the frame data at the same time. A line buffer 120 successively holds pixel data contained in the frame data. An effective data detection unit 130 detects an effective data section of the frame data based on the data enable signal. A comparison unit 140 compares the effective data section detected by the effective data detection unit 130 with a pre-specified display size. A pixel data acquisition unit 150 acquires pixel data from the line buffer 120 based on a comparison result obtained by the comparison unit 140.

Abstract: The subject matter of this specification can be embodied in, among other things, a method that includes computer-implemented graphics frame buffer process that establishes on a computing device a graphics frame buffer accessible to be written by an application process and to be read by a graphics server process. The method further comprises generating a token whose value or values control access to the frame buffer by the application process and the graphics server process and reading frames from the frame buffer using the value or values in the token.