Abstract: A panel adjustment method is executed on a host to adjust settings of a panel connected to the host through a serial bus. The method determines whether the panel is supported by the host. When the panel is supported by the host, the settings of the panel is read from a database of the host to accordingly set the panel. It is further determined whether the panel is correctly set or not. When the panel is correctly set, it is further determined whether the panel is of a frame buffer mode or not. When the panel is of a frame buffer mode, it is determined whether a header file generation is required or not. When the header file generation is required, the settings and a panel name are included in an include file. The include file is compiled to thereby generate a binary file which is loaded into the panel.

Abstract: Disclosed embodiments utilize MIP techniques to determine optimum bit sequences that minimize PWM artifacts. The problem would first be restructured and redefined into a form suitable for MIP. An objective function designed to minimize PWM artifacts would allow for evaluation of resulting bit sequences in order to determine optimality. Constraints (that relate the inputs and variables) are developed. These constraints would determine whether a particular bit sequence can be used on a given system, and whether a particular bit sequence would satisfy any user defined rules. Once these are determined, an MIP solver would generate an optimized bit sequence(s). Only bit sequences that satisfy the constraints would be evaluated using the objective function, allowing for a quicker determination of a solution. This MIP solution may be generated quickly, allowing for a shorter production period while still optimizing the bit sequences to minimize PWM artifacts.

Abstract: A liquid crystal display device in which a frame of the image signal to be displayed is written into a liquid crystal display panel while a backlight is activated intermittently within one frame period so as to prevent blur injury arising when displaying motion pictures includes: sections and for variably controlling the illumination duration of the backlight based on the detected type of the image content to be displayed. This configuration makes it possible to appropriately control the image quality degradation caused by blur injury, stroboscopic effect and flickering, hence realize total image quality improvement.

Abstract: An overdrive topology structure for transmission of a RGB signal includes a signal sending terminal, a signal receiving terminal, and a transmission line to transmit the RGB signal from the signal sending terminal to the signal receiving terminal. The transmission line is divided into a number of section transmission lines. A node is formed between every two section transmission lines. An impedance of a first section transmission line approaching to the signal sending terminal is less than an impedance of a second section transmission line approaching to the first section transmission line to overdrive the RGB signal at a first node between the first and second section transmission lines. At least one node except the first node is grounded via a resistor. An equivalent resistance of the resistor is equal to a resistance of the first resistor.

Abstract: A display device and modulation scheme for applying image data to an imager. The display may use a modulation scheme wherein spacing of row write actions on the rows creates gray scale modulation, wherein one row spacing between sequential row write actions is at a first distance while another row spacing between sequential row write actions is at a distance greater than said first distance. The modulation scheme may create a series of write pointers that create a corresponding series of write planes. In some embodiments, modulation efficiency is increased allowing the use of lower frequency imaging circuits to achieve the same display image.

Abstract: The present invention provides a liquid crystal display apparatus realizing an improved view angle characteristic of luminance and higher response speed. A sub-pixel group is provided with a plurality of sub-pixels. At the time of display driving on liquid crystal elements of each pixel, space-divisional-driving which allows each of the first and the second sub-pixels to be driven separately is performed. By the space-divisional-driving, fluctuations in the gamma characteristic in the case of seeing a display screen from an oblique direction are effectively dispersed, and the view angle characteristic of luminance improves. Area of the first sub-pixel is set to be smaller than whole area of the sub-pixel group. As a result, the drive voltage to be applied to the first sub-pixel at the time of lower gray level becomes high, and response speed improves.

Abstract: A method and a device for processing touch information and a flat panel display using the method and the device are disclosed. The touch information processing arrangement includes: generating sensor output data from a touch sensor array; computing the sensor output data corresponding to each of adjacent frames to generate difference data; first binarizing the difference data based on a predetermined first threshold value; filtering the first binarized difference data; and second binarizing the filtered difference data based on a predetermined second threshold value.

Abstract: The plasma display device has a display panel having first and second display electrodes and address electrodes, an electrode drive circuit, and a drive control circuit for controlling the electrode drive circuit. The drive control circuit performs a reset drive control, address drive control and sustain drive control in each subfield. The drive control circuit performs an all cell reset drive control which resets all cells in a first subfield out of the plurality of subfields, and an ON cell reset drive control which resets ON cells in a second subfield. At a first temperature T1, an ultimate potential of an slope pulse of the first display electrode is controlled to be a first potential in the ON cell reset drive control, and at a second temperature T2>T1, the ultimate potential is controlled to be a second potential higher than the first potential.

Abstract: One field is divided into p (p is an integer of 2 or more) groups and each of the divided groups is divided into two subfields. The p groups have the same time period. The sub-fields forming one field have time periods that are different from each other. A plurality of scanning lines are divided into at least first and second groups. A field start timing of pixels corresponding to the scanning lines of the first group is set to be different from a field start timing of pixels corresponding to scanning lines of the second group by at least the time period of the groups.

Abstract: Embodiments of the present invention provide a hybrid analog to digital converter that may include a DAC coupled to a hybrid analog to digital converter input; an integrator having an input coupled to the hybrid analog to digital converter input and the DAC, and generating an integrator output; a comparator coupled to the integrator output and having a comparator output; a successive approximation register coupled to the comparator output; and a counter coupled to the comparator output to generate an hybrid analog to digital converter output. The hybrid analog to digital converter may be operable as a successive approximation register converter and a continuous time sigma delta converter.

Abstract: A system and method for reducing pulse width modulation contouring artifacts. Each input intensity value is translated to at least one non-binary bit pattern for display. Many of the input intensity values are translated to at least two alternate non-binary bit patterns. The alternate codes are used to smooth the transition between intensity codes as major bits are turned on. The smoothing occurs by the gradual transition from codes that do not use the major bit to codes that do use the major bit. Typically the alternate codes are selected based on the location of the pixel in a spatial pattern (100) and the alternate codes are spatially alternated from one pixel (102) to the next (104). Other embodiments temporally alternate the codes from one period—typically a frame period—to the next. Still other embodiments alternate the codes both spatially and temporally.

Abstract: A method for writing data to a display includes the steps of receiving a plurality of data bits, where each bit is associated with a different pixel of the display, reading the value of each data bit, determining whether each data bits has an off-state value, and generating a disable signal if each data bit has an off-state value. Responsive to a disable signal, the method further includes suspending the transfer of data to the pixels of the display, turning off a light source (e.g., an LED, laser, etc.) for a time period dependent on the significance of at least one of the data bits, and/or forcing each pixel of the display into an off state for a time period dependent on the significance of at least one of the data bits. A display driver circuit for performing the methods of the present invention is also disclosed.

Abstract: A method for writing data to a display includes the steps of receiving a plurality of data bits, where each bit is associated with a different pixel of the display, reading the value of each data bit, determining whether each data bits has an off-state value, and generating a disable signal if each data bit has an off-state value. Responsive to a disable signal, the method further includes suspending the transfer of data to the pixels of the display, turning off a light source (e.g., an LED, laser, etc.) for a time period dependent on the significance of at least one of the data bits, and/or forcing each pixel of the display into an off state for a time period dependent on the significance of at least one of the data bits. A display driver circuit for performing the methods of the present invention is also disclosed.

Abstract: The invention describes a method for improving the spatial and off-axis conformance of display systems with respect to an enforced greyscale or color display standard. In the display systems, the native transfer curve is obtained for each pixel or zone of pixels, i.e. as a function of position on the display and as a function of viewing-angle. Once that information is available, an optimal conversion scheme from P-value to DDL can be created for each position on the display and this for all possible viewing-angles. In use, the conversion scheme is used to obtain an improved DICOM behavior. This optimization is also done with respect to the viewing-angle, based on a pre-set, selectable or measured viewing angle.

Abstract: The present approach increases bandwidth by performing at least two functions at the pre-processing level. Specifically, under the present approach, program code is structured so that the segmentation and binarization functions/modules (and optionally a blob analysis function/module) are merged into a single module to reduce memory bandwidth. In addition, each image frame is segmented into a plurality of partitions (e.g., vertical strips) to enhance the reusability of the image data in LS already fetched from main memory. Each partition is then processed by a separate one of a plurality of processing engines, thereby increasing the utilization of all processing engines and allowing the processing engines to maintain good bandwidth.

Abstract: A method and a device for encoding the video level of a pixel of a picture into a subfield code word in a display device using a PWM (Pulse Width Modulation) technology and subfields for displaying video picture. The bits of the subfield code word are computed recursively one after the other from the bit having the most significant weight to the bit having the least significant weight. In determining the state of a bit of the subfield code word, a first threshold and a second threshold is associated with the bit, the second threshold being greater than the first threshold, and the video level to be encoded by this bit and its following bits in the subfield code word are compared to the first and second thresholds. A state is allocated to the bit based on the comparison.

Abstract: A liquid crystal display device and a method for improving a color reproducibility thereof, detects a gray scale value in applied image information that reduces a color reproducibility of a liquid crystal display device by measuring a gray scale level of a color displayed on a liquid crystal display panel while increasing the gray scale value of the color, and storing a maximum value of the gray scale level is displayable prior to reducing the color reproducibility. The applied image information is compensated to prevent reduction in the color reproducibility.

Abstract: A system and method for reducing pulse width modulation contouring artifacts. Each input intensity value is translated to at least one non-binary bit pattern for display. Many of the input intensity values are translated to at least two alternate non-binary bit patterns. The alternate codes are used to smooth the transition between intensity codes as major bits are turned on. The smoothing occurs by the gradual transition from codes that do not use the major bit to codes that do use the major bit. Typically the alternate codes are selected based on the location of the pixel in a spatial pattern (100) and the alternate codes are spatially alternated from one pixel (102) to the next (104). Other embodiments temporally alternate the codes from one period—typically a frame period—to the next. Still other embodiments alternate the codes both spatially and temporally.

Abstract: A display uses x illuminator systems to produce x primary colors and y overlap colors, which are combinations of primary colors, to illuminate a spatial light modulator in a display system. A first set of n duty cycles for the x primary colors over a frame is provided, wherein the display system can select any one of the duty cycles to produce a desired white point. A second set of n duty cycles of x+y colors over a frame corresponding to the first set of duty cycles is determined, where the second set of duty cycles are generated responsive to a specified desired allocation of the frame to the y overlap colors, such that each of the overlap colors can be displayed from a dark shade to a bright shade while maintaining a constant color point.

Abstract: An image display apparatus includes an image displaying unit that includes a light source unit and a light modulation device, a histogram generating unit, a light source luminance calculator, a function storing unit, a first evaluation value calculator, a second evaluation value calculator, a third evaluation value calculator, a function acquiring unit and a control unit. The function acquiring unit acquires a plurality of the third evaluation values by repeating processing by the first to third evaluation value calculators with modification to a level conversion function and acquires a level conversion function that has a smallest third evaluation. The control unit supplies a signal of a converted video resulting from conversion of the image with the acquired level conversion function to the light modulation device.

Abstract: A display method of a plasma display device and plasma display device are provided. The display method includes nonlinearly converting first image data corresponding to an input image signal to second image data having a gradation value smaller than a gradation value of first image data and expressing the second image data by a real part and an error part. The display method includes error diffusing of, when the error part of the second image data is not zero, spatially or temporally diffusing the error part. The display method includes subfield pattern converting of selecting a lighting pattern of the subfields based on the error-diffused second image data.

Abstract: A method and system for converting color image data (data outputting from element 202) from a, for example, three-dimensional color space format to a format usable by an n-primary display (206), wherein n is greater than or equal to 3. The system (converter 204) may define a two-dimensional sub-space having a plurality of two-dimensional positions, each position representing a set of n primary color values and a third, scaleable coordinate value for generating an n-primary display input signal (signal inputting toi display 206). Furthermore, the system may receive a three-dimensional color space input signal including out-of range pixel data not reproducible by a three-primary additive display, and may convert the data to side gamut color image pixel data suitable for driving the wide gamut color display.

Abstract: A m-bit DAC outputs a voltage that is the result of interpolation from two reference voltages. The two reference voltages are selected, inclusive of redundant selection of the same reference voltage (inclusive also of reference voltages other than adjacent voltages) out of a plurality of reference voltages. The plurality of reference voltages are grouped into first to (3S+1)th groups (where S is a power of 2). An ith group includes [3S(j?1)+i]th reference voltages (where j=1, 2, . . . h, and h is a prescribed integer). The decoder includes (3S+1)th subdecoders, each selecting one voltage responsive to a first MSB group; and a (3S+1)-input and 2-output subdecoder for selecting two voltages, inclusive of redundant selection of the same reference voltage, out of (3S+1) voltages selected by the respective first to (3S+1)th subdecoders, responsive to a LSB group and outputs them to an interpolation amplifier (ratio 1:1).

Abstract: Disclosed is an impulsive type liquid crystal driving device which inserts black data during a vertical blanking interval and then realizes motion picture, comprising: a liquid crystal panel for including a plurality of gate bus lines, which are arranged in one-direction, and a plurality of data bus lines which are arranged in a direction perpendicular to the plurality of gate bus lines; a gate driver section for sequentially scanning the plurality of gate bus lines during an active address interval in response to a second vertical starting signal, a vertical clock signal and an output enable signal, and scanning the plurality of gate bus lines during a vertical blanking interval in a unit of a predetermined number of lines; and a current boosting section for increasing current amount supplied to the gate bus lines during the vertical blanking interval in response to a pulse width modulation signal.

Abstract: A gray scale voltage generator and a method of generating a gray scale voltage in a transmissive and reflective type liquid crystal display device are disclosed. A transmissive mode gray scale data are transformed into real reflective mode gray scale data. An integer part is extracted from the real reflective mode gray scale data as a first reflective mode gray scale data. The first reflective mode gray scale data and temporary reflective mode gray scale data are mixed in a predetermined ratio by N-frame period. The temporary reflective mode gray scale data has a sum of one and the first reflective mode gray scale data. Pseudo gray scale data are inserted into the second reflective mode gray scale data. Therefore, superior display quality is provided in both transmissive and reflective mode.

Abstract: A flat panel display device including: a display region including pixels connected to scan lines and data lines; a dummy display region including dummy pixels connected to at least two dummy scan lines and the data lines; a scan driver for providing scan signals and dummy scan signals to the scan lines and the dummy scan lines; a data driver for generating gray scale voltages corresponding to input digital data and providing them to corresponding pixels through the data lines; and a timing controller for controlling the scan driver and the data driver, wherein the data driver uses parasitic capacitance components existing in at least two data lines and capacitance components in the pixels and the dummy pixels connected to the at least two data lines, as a sampling capacitor and a holding capacitor to generate the gray scale voltages through charge sharing between the at least two data lines.

Abstract: The present invention provides a controller for controlling strings of LEDs in a liquid crystal display. The hybrid controller uses both analog and digital circuit components. Error amplifiers are used to compare analog feedback signals received from the LED strings with reference signals. The results of those comparisons are converted to digital data and processed by a digital signal processor (DSP). The DSP calculates the drive voltages for the LED strings based on the deviation between the actual current flows (represented by feedback signals) and the desired current flows (represented by reference signals) through the LED strings. Analog drivers provide the drive voltages to the LED strings.

Abstract: An object of the present invention is to provide a display method capable of displaying all gray levels of an input image signal with reduced flicker, and a display apparatus using this method. The present invention provides a display method that allows a display apparatus to display gray levels represented by a first number of bits of an image signal inputted to a driver circuit that drives the display apparatus, when the first number of bits is larger than a second number of bits of gray-level data outputted from the driver circuit.

Abstract: Methods and devices for generating grayscale using digital pulse width modulation between optical states. Grayscale may be generated for each component color using multiple algorithm cycles per display field. Subsets of binary weighted bit values for data values of each component color may be split across algorithm cycles to reduce the number of data comparisons per color per display field. The total number of data comparisons per color per display field may be reduced by half or more.

Abstract: A driving circuit of an electro-optical device wherein one field is divided into p (p is an integer that is equal to or more than two) groups and each group is divided into two sub-fields. The p groups each are set to have the length of a time period that is equal to one another. The 2p sub-fields that constitute the one field are set to different lengths of time periods in such a manner that a boundary between two sub-fields of each group is shifted by a predetermined interval compared to the boundary between the two sub-fields of the preceding group. The different gray scale values are expressed by turning on a single sub-field or n (n is an integral number that is equal to two or more and that is equal to or less than 2p) sub-fields that are adjacent to each other.

Abstract: A gray-scale representation method for a plasma display panel, which method includes arranging, in time sequence, a plurality of subfields each having a brightness weight and achieving gray-scale representation by a combination of the subfields, each subfield including an address period and a sustain period. In the gray-scale representation method, the number of sustain pulses for each subfield is determined so that a light generated from the difference of the number of sustain pulses between two adjacent gray scales can be greater than a light discharged in the address period, when the number of subfields for the higher one of the two adjacent gray scales is less than that for the lower one. The reversion of gray scales that occurs when the address light is increased as high as the sustain light can be eliminated to achieve correct gray-scale representation.

Abstract: The present invention provides an image signal processor, comprising: (a) an input circuit for receiving and/or holding an image signal of N-bit binary data word, where N is a positive integer; (b) a data converter converting at least M-bit data of binary data into non-binary data having multiple bits, where M is a positive integer and N?M?2, wherein (c) all bits of the non-binary data have a weight which is equal to, or less than, that of the least significant bit of the M-bit data of binary data; and (d) the data converter outputting the each bit of the non-binary data in sequence starting from an equal data value.

Abstract: A digital-analog converter (DAC) including: a gray scale generator for generating gray scale voltages corresponding to digital data input through charge sharing between a plurality of data lines and a plurality of dummy data lines; a switching signal generator for providing operation control signals for a plurality of switches of the gray scale generator; and a reference voltage generator for generating reference voltages and for providing the reference voltages to the gray scale generator. According to the present invention, the digital-analog converter uses capacitance components existing in the respective data lines and the dummy data lines as a sampling capacitor and a holding capacitor to generate desired gray scale voltages through charge sharing between the data lines and the dummy data lines, thereby reducing area and power consumption over an existing R-string type of DAC.

Abstract: An active matrix display panel comprises a substrate, an array of pixel circuits being arranged in a matrix of at least one column and a plurality of rows on the substrate, each pixel circuit comprising a light-emitting element, capable of emitting light of an intensity determined by the value of a current passed through it, and at least one column line, each column line arranged to conduct a reference current, provided by a current driving circuit, when connected to the panel. The pixel circuits in a column are divided into a plurality of groups of at least one pixel circuit. The active matrix display panel comprises at least one current mirror circuit associated with a first group, comprising a first current mirror, arranged to mirror a reference current flowing through a column line to a first current mirror output.

Abstract: A display device, includes: a display panel comprising a plurality of pixels; a signal controller which receives an n+k bit first image signal to divide one frame into 2k number of sub frames and generates a non-image signal according to an upper k most significant bits of the binary code and a second image signal with a lower n bit, of the first image signal in one frame with a predetermined rate; and a data driver which supplies a data voltage selected on the basis of the non-image signal and the second image signal, to the pixels.

Abstract: The invention relates to a method for processing video pictures, the video pictures consisting of pixels digitally coded, the digital code word determining the length of the time period during which the corresponding pixel of a display is activated, wherein to each bit of a digital code word a certain activation duration called sub-field is assigned, the sum of the duration of the sub-fields according to a given code word determining the length of the time period during which the corresponding pixel is activated, said method comprising the following steps: detecting the video pictures source mode and the parity between pictures, if the source is in film mode, distributing the total number of sub-fields used for two frame raster in three groups of sub-fields and assigning to a value of a pixel a code word that corresponds to the distribution of the active sub-fields period over the three sub-fields groups, and if the source is in camera mode, distributing the total number of sub-fields used for each frame r

Abstract: A method of enhancing the gray scale resolution of a PWM system. The method includes defining an N-bit PWM sequence with a length of 2N?1 units. The N-bit PWM sequence includes a least significant bit (LSB) segment characterized by a temporal length of one unit. In some embodiments, the temporal length of one unit is referred to as a time t0. The method also includes defining a fractional PWM sequence. The fractional PWM sequence includes the N-bit PWM sequence and a fractional bit segment of temporal length F. The temporal length of the fractional PWM sequence is 2N?1+F units. In a particular embodiment, F=1 and the temporal length of the fractional PWM sequence is 2N.

Abstract: A method of driving a plasma display panel that is adaptive for improving a picture quality. In the method, first and second sustain pulses having a different width during the sustain period are alternately applied to the first and second row electrodes.

Abstract: The invention relates to a method and a device for encoding the luminance value of a pixel of a picture into a subfield code word in a display device. It can be applied to every display device using a PWM (Pulse Width Modulation) technology and subfields for displaying video picture. It can be used to compensate for any luminance problem that can be estimated. The general idea of the recursive coding is to encode one sub-field after the other in order to be able to compensate for problems occurring on one sub-field with the other sub-fields. More particularly, the bits of a subfield code word are computed recursively one after the other such that the defects (e.g. line load and/or linearity) in the light emission or luminance generated by a bit of the subfield code word can be compensated by the following bits of the subfield code word.

Abstract: Aspects of the invention can provide a light source control device that controls driving for a light source unit in order to supply light that is modulated in response to an image signal. The light source control device can include an amplitude converting unit that allocates at least one bit of the image signal to conversion of an amplitude of a pulse signal and converts the amplitude of the pulse signal according to an allocated number of bits, and a pulse signal generating unit that generates a pulse signal at the amplitude converted in the amplitude converting unit.

Abstract: One embodiment provides a method that includes displaying Boolean combinations of two or more bit planes.

Abstract: Disclosed is a liquid crystal display device, which is capable of reducing a required response speed and increasing a pixel aperture ratio, as compared with a field sequential driving scheme. A unit pixel of a liquid crystal display panel is made up of a first sub-pixel adapted to allow only any two of red, green and blue lights to pass therethrough, and a second sub-pixel adapted to allow only a remaining one of the red, green and blue lights to pass therethrough, wherein one frame of image is time-divided into n pieces (wherein n is an integer of two or more), and respective image information about the two lights are applied to the first sub-pixel during every duration of the 1/n frame, while applying image information about the remaining one light to the second sub-pixel during a duration of the one frame of image.

Abstract: There is provided a plasma display device including: a nonlinear conversion circuit which nonlinearly converts a first image signal to a second image signal and expresses the second image signal by a real part and an error part to avoid use of a specific subfield lighting pattern; an error diffusion circuit which, when the error part of the second image signal is not zero, spatially or temporally diffuses the error part; and a subfield pattern conversion circuit which, when a lighting pattern of subfields is selected based on the error-diffused second image signal, selects another subfield lighting pattern without using the specific subfield lighting pattern.

Abstract: A video signal is processed using dither coefficients. Dither coefficients pattern signals are generated. Each pattern signal carries positive and negative dither coefficients arranged in an (n×m) matrix where “n” and “m” being positive integers larger than zero, the sum total of the coefficients being zero. One of the pattern signal is selected for each predetermined unit of picture carried by the video signal. Or, it is selected according to locations of dither coefficients on pixels arranged on a display panel. Dither coefficients of the selected pattern signal are added to an input video signal, thus outputting a video signal to be supplied to the display panel. Instead of the dither coefficients pattern signals, dither pattern signals can be generated, each carrying positional data indicating locations of dither coefficients on the pixels on the display panel.

Abstract: A method of displaying image data, which can mitigate a double-boundary problem and improve MPRT, includes the steps of: receiving a plurality of frame data of a pixel; correcting subframe data of two of the plurality frame data; and sequentially displaying each of the subframe data of the plurality frame data.

Abstract: There is disclosed a system and method for enhancing gray scale output on a color display. Various gray intensities are mapped based on an image made of various shades of gray so that a viewer perceives a depth of gray levels beyond those available in gray scale from the color display. Pseudo shades of gray are displayed between the levels of true gray that typically are displayed in order to provide a smoother transition between the levels of true gray that are displayed.

Abstract: A driving device for quickly changing the gray level of the liquid crystal display (LCD and its driving method are disclosed. The driving device includes a group of thin film transistors with matrix array, a plurality of gate lines and a plurality of data lines. The object of quickly changing the gray level of the LCD can be accomplished by the different arrangement of the gate lines and the data lines and the different connection of the thin film transistors with the gate lines and the data lines. The driving method includes: two gate lines in the LCD are simultaneously or synchronously turned on according to in the bright, period or in the black, period, the voltage for displaying the present frame interval data or the voltage for displaying black image is given to the thin film transistors connected with the gate lines, and scanning continues in turn.

Abstract: A display device and display method are provided. The display device and the display method can prevent generation of noise in delta array pixels of an FRC method, and able to prevent a lowering of an image quality, that is, a display device of predetermined array pixels displaying a (2n+1) gradation by alternately displaying a 2n gradation and a (2n+2) gradation, comprising a modulation pattern generation circuit for generating a spatial/temporal modulation pattern switching a temporal modulation pattern every frame (F) and changing an order of application of a spatial modulation pattern every NF (N is an even number); a data processing circuit for modulating image data in accordance with the modulation pattern generated by the modulation pattern generation circuit; and a drive circuit for driving the display in accordance with the modulated data of the data processing circuit.

Abstract: When driving a plasma display panel, in a first subfield of a first frame, turn-on cells are selected among cells of a first group of electrodes by performing an address operation for the first group, and a sustain discharge is performed for selected cells, and turn-on cells are selected among cells of a second group of electrodes by performing an address operation for the second group, and a sustain discharge is performed for selected cells. In a first subfield of a second frame, turn-on cells are selected among cells of the second group by performing an address operation for the second group, and a sustain discharge is performed for selected cells, and turn-on cells are selected among cells of the first group by performing an address operation for the first group, and a sustain discharge is performed for selected cells.

Abstract: The present invention relates to a data driving system and method for driving a panel. The data driving system comprises: a gamma voltage supply and a D/A converter. The gamma voltage supply produces a plurality of gamma voltages. The D/A converter receives the gamma voltages, a first pixel value and a second pixel value, and converts the first pixel value and the second pixel value to a corresponding gamma voltage in the gamma voltages. When the D/A converter converts the first pixel value, the gamma voltages have a first polarity offset. When the D/A converter converts the second pixel value, the gamma voltages have a second polarity offset. Because the data driving system of the invention periodically switches the first polarity offset and the second polarity offset of the gamma voltage supply, an offset in the driving voltage is eliminated by the first polarity (positive) offset and the second polarity (negative) offset in space and time. Therefore, there is no band mura in the panel.