Binary Weighted Patents (Class 345/692)
  • Patent number: 6930692
    Abstract: In a method of multi-level spatial light modulation, using a weighted bit plane technique where an n-digit binary number represents the intended grey level of each pixel location in an array of binary pixels, representative binary numbers are altered to closely adjacent values such as to reduce the inequality of 1s and 0s therein. The method may be applied to a single frame so modifying the gray scale somewhat, or a multi-frame method may be used in which at least some binary numbers are altered to different values in different frames for reducing the inequality of 1s and 0s over the set of frames, while maintaining or approximating the gray scale value as a time average. The methods are particularly useful for maintaining or approximating pixel-wise dc balance in liquid crystal spatial array modulators.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: August 16, 2005
    Assignee: QinetiQ Limited
    Inventors: Timothy M Coker, William A Crossland
  • Patent number: 6930693
    Abstract: In a method of signal processing for greyscale imaging in which weighted bitplanes corresponding to a greyscale image are stored as binary strings in sequential locations in a memory, in decreasing order of intended duration (weighting), a number of read passes equal to the number of weighted bitplanes are made from the set of stored bitplanes, each pass commencing with the highest order bitplanes and continuing along the stored bitplanes in sequence, the lengths of the sequences being varied and selected such that at the end of the said number of read passes each bit plane has been read out a plurality of times proportional to or equal to its duration (weighting). The method has utility in driving high speed liquid crystal matrix arrays particularly where each bitplane needs to be refreshed. A small ac potential may be applied to the array between writing steps.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: August 16, 2005
    Assignee: QinetiQ Limited
    Inventors: Timothy M Coker, William A Crossland
  • Publication number: 20040263541
    Abstract: A display apparatus displaying gray scale by using a subfield method has a gain control circuit, a sub gain control circuit, and an error diffusion circuit. The gain control circuit has the number of gray scale levels of an input signal and outputting a first intermediate image signal with a first number of gray scale levels, and the sub gain control circuit receives the first intermediate image signal, compresses the number of gray scale levels of the first intermediate image signal, and outputs a second intermediate image signal with a second number of gray scale levels. The error diffusion circuit receives the second intermediate image signal and increase the number of gray scale levels by simulating additional gray scale levels through error diffusion.
    Type: Application
    Filed: March 24, 2004
    Publication date: December 30, 2004
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Masanori Takeuchi, Masaya Tajima, Yutaka Chiaki, Shunji Ohta, Akira Yamamoto
  • Patent number: 6831618
    Abstract: A method for driving a display panel which enables changing of the refresh rate, without degrading display quality, of a display panel employing the matrix display scheme for carrying out gray-scale drive by using the sub-field method. By the method, the number of sub-fields to be executed within a unit display period is changed in response to the vertical synchronization frequency of an input video signal.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: December 14, 2004
    Assignee: Pioneer Corporation
    Inventors: Masahiro Suzuki, Nobuhiko Saegusa
  • Publication number: 20040246279
    Abstract: Dot inversion schemes are disclosed on novel display panel layouts with extra drivers.
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventors: Thomas Lloyd Credelle, Matthew Osborne Schlegel
  • Publication number: 20040246278
    Abstract: A system and method are disclosed for compensating for visual effects upon panels having non-standard dot inversion schemes. A display comprises a panel comprising a plurality of subpixels. The panel has at least two regions of subpixels having different electro-optical properties. The display also comprises separate quantizers for each of the at least two regions of subpixels that can correct for fixed pattern noise.
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventor: Candice Hellen Brown Elliott
  • Publication number: 20040246280
    Abstract: Systems and methods are disclosed to correct for image degraded signals on a liquid crystal display panel are disclosed. Panels that comprise a subpixel repeating group having an even number of subpixels in a first direction may have parasitic capacitance and other signal errors due to imperfect dot inversion schemes thereon. Techniques for signal correction and localizing of errors onto particular subpixels are disclosed.
    Type: Application
    Filed: June 6, 2003
    Publication date: December 9, 2004
    Inventors: Thomas Lloyd Credelle, Roger Green Stewart
  • Patent number: 6819335
    Abstract: A liquid crystal display 200 comprises a 1024-to-1021 gray scale conversion calculator 1 for converting an image data A(1024) of 1024 gray levels (=10 bits) into an image data Y(1021) of 1021 gray levels, an adjusting four-level sample storage 22 and a random number generator circuit 3 for randomly selecting and releasing on the frame-by-frame basis a group of the adjusting four gray levels &Dgr;1p to &Dgr;4p, &Dgr;1q to &Dgr;4q, and &Dgr;1r to &Dgr;4r which is determined by the least two bits Y(1021—d2) of the image data Y(1021) of 1021 gray levels at each of segments (p,q,r) of one pixel, an adder 23 for summing the upper eight bits Y(102113 d8) of the image data Y(1021) of 1021 gray levels and one group of the adjusting four gray levels to have three sets of image data of 256 gray levels D1p to D4p, D1q to D4q, and D1r to D4r which are then released in a sequence, and a 256 gray scale three-segment monochrome liquid crystal display panel 24.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 16, 2004
    Assignee: Totoku Electric Co., Ltd.
    Inventor: Tatumi Naganuma
  • Patent number: 6784898
    Abstract: A method for generating a grayscale representation for a display combines analog and digital techniques to produce images of optimal quality. The grayscale representation is not limited by frame frequency compared to digital techniques and not limited by small voltage differences between pixel electrodes. In the method, a frame is first divided into sub-frames of most significant bits and least significant bits. The sub-frame time can either be weighted or uniform. An analog voltage is then applied to the sub-frames to produce a reduced grayscale. The number of sub-frames and the brightness are two parameters that can be optimized for a best possible display result.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: August 31, 2004
    Assignee: Duke University
    Inventors: Sangrok Lee, Kristina M. Johnson
  • Publication number: 20040160459
    Abstract: The invention relates to a method and a device for noise reduction in a pulse-width controlled image display device. A monitoring of whether the brightness of several sequential image points is brighter than a given brightness threshold value occurs. If not the case, the delayed but otherwise unchanged input signal is supplied to the display. If, on the other hand, the brightness of several sequential image points is less than the given threshold brightness value, a mean value generation for the brightness values of several sequential image points occurs and said mean value is supplied to the display.
    Type: Application
    Filed: January 12, 2004
    Publication date: August 19, 2004
    Inventors: Udo Fischbeck, Johannes Spindler
  • Publication number: 20040155894
    Abstract: The image processing unit (603) for processing pixels of an image to be displayed on a display panel (702) in a plurality of sub-fields is designed to perform motion compensation. The motion compensation is executed in two parts which can be divided in a number of steps. In a pre-compensation part (816) optimal sub-field combinations are determined for the pixels of the image, i.e. which sub-field pixels should be on and which should be off. Motion vectors are used for this. The pre-compensation part is essential to compensate for errors which are inherent with the second part (818): shifting sub-field pixels with a discrete number of pixel positions (322) although the actual translation (308) is unequal to the extent of that discrete number of pixel positions (322).
    Type: Application
    Filed: December 12, 2003
    Publication date: August 12, 2004
    Inventor: Roy Van Dijk
  • Publication number: 20040130560
    Abstract: The invention provides an electro-optical device, a method of driving an electro-optical device, and an electronic apparatus in which flicker can be decreased. When ‘1’, ‘2’, ‘4’, ‘8’, ‘16’, and ‘32’ are assigned to each sub-frame to display half tone of sixty four gray scale levels, a period of one frame is composed of the first to seventh sub-frames SF1 to SF7 designating predetermined light-emitting periods TL1 to TL7, respectively. A sub-frame designating ‘32’ which is the longest light-emitting period, is allocated to the fourth sub-frame SF4 and the seventh sub-frame SF7, and at the same time, the allocated two sub-frames SF4, SF7 are arranged inconsecutively. When the longest ‘32’ is selected based on the gray scale data, both sub-frames SF4, SF7 are selected.
    Type: Application
    Filed: October 28, 2003
    Publication date: July 8, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Yojiro Matsueda, Hayato Nakanishi
  • Patent number: 6759999
    Abstract: The invention provides a novel scanning technique aimed at reducing the phenomenon of contouring. The scanning technique of the invention consists in adding at least one redundant subscan SP0 to SP4. The purpose of the redundant subscans SP0 to SP4 is to place an additional illumination time which is privileged. The redundant subscan SP0 to SP4 thus introduced makes it possible to have a steady illumination time virtually independent of the grey level and therefore to minimize the high-weight switching effects.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: July 6, 2004
    Assignee: Thomson Licensing S.A.
    Inventor: Didier Doyen
  • Publication number: 20040119730
    Abstract: A method for driving a liquid crystal display, includes receiving source data, reducing the number of bits of the source data, thereby generating a reduced-bit source data, comparing the reduced-bit source data of a previous frame with the reduced-bit source data of a current frame to select a preset modulated data in accordance with the result of the comparison, and modulating the source data by using the selected modulated data.
    Type: Application
    Filed: June 27, 2003
    Publication date: June 24, 2004
    Applicant: LG.Philips LCD Co., Ltd.
    Inventors: Yong Sung Ham, Hong Bae Park
  • Patent number: 6690499
    Abstract: A multi-state light modulating system having grayscale based on a series of time intervals includes an arrangement that establishes the duration of each time interval such that the time intervals in the series have progressively varying duration. The arrangement also determines a drive signal for each time interval that causes the light modulator to assume a specific light modulating state. The arrangement also causes the light modulator to produce a desired time-averaged light level over the series of time intervals by in part driving the light modulator using the drive signal that corresponds to a particular time interval for a duration that is longer than the duration of the time interval. The arrangement also or alternatively arranges the series of time intervals such that the light modulator is in the same state immediately prior to the particular time interval as the light modulator is in immediately after the time interval.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: February 10, 2004
    Assignee: Displaytech, Inc.
    Inventors: Per H. Larsen, James M. Dallas, Rainer M. Malzbender, Michael R. Meadows
  • Patent number: 6690388
    Abstract: A display apparatus creates, for each image, a number of subfields Z from a first subfield to a Zth subfield in accordance with a Z bit representation of each pixel, a weighing value for each subfield, and a number of gradation display points. The display apparatus detects a peak image brightness level and an average image brightness level. A weighing multiple including a positive integer part and a fractional part is determined based on the peak image brightness level and the average image brightness level. The weighing multiple is multiplied by the weighing value of each subfield to obtain a product capable of having a positive integer part and a fractional part. An integer value near the product is defined as a number of drive pulses for each subfield. The weighing multiple is increased as the average image brightness level decreases and as the peak image brightness level increases.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: February 10, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhiro Kasahara, Yuichi Ishikawa, Tomoko Morita
  • Patent number: 6653998
    Abstract: A driver circuit for use in driving displays has an input receiving a digital input data having n bits for selecting one of a plurality of voltage levels for driving the circuit. The circuit also has an output, a plurality of digital signal lines coupled to the digital input data, and a plurality of active regions coupled to a first side of the output. Each of the plurality of active regions is coupled to a separate voltage level. The circuit further includes a plurality of pass transistors at a first subset of locations where the plurality of digital signal lines overlap the plurality of active regions, and a plurality of depletion-implanted transistors at a second subset of locations where the plurality of digital signal lines overlap the plurality of active regions. The number of the plurality of digital signal lines on one side of the output can be odd number, such as 2n−1, or can be 2n−2.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: November 25, 2003
    Assignee: Winbond Electronics Corp.
    Inventors: Shi-Tron Lin, Yung-Peng Hwang
  • Publication number: 20030210257
    Abstract: A display device and modulation scheme for applying image data to an imager. The display may use a modulation scheme wherein spacing of row write actions on the rows creates gray scale modulation, wherein one row spacing between sequential row write actions is at a first distance while another row spacing between sequential row write actions is at a distance greater than said first distance. The modulation scheme may create a series of write pointers that create a corresponding series of write planes. In some embodiments, modulation efficiency is increased allowing the use of lower frequency imaging circuits to achieve the same display image.
    Type: Application
    Filed: May 9, 2003
    Publication date: November 13, 2003
    Applicant: eLCOS Microdisplay Technology, Inc.
    Inventors: Edwin Lyle Hudson, David Charles McDonald
  • Patent number: 6646654
    Abstract: A modulation circuit capable of high resolution pulse width modulation while keeping down the bit length and an image display provided with the modulation circuit. By the A/D converter 4, the video signal Sv converted into a binary code having a preset bit length is divided into a plurality of binary codes by the controller 3 from the most significant bit to the least significant bit. Corresponding to the thus obtained plurality of divided binary codes, serial data is generated for producing a pulse current of a pulse width and current value according to the value of the binary code and is output to pulse width modulation circuits 1 cascade connected to the controller 3. The pulse width modulation circuits supply LEDs 3 of the pixels pulse currents of pulse widths and current values corresponding to the serial data.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: November 11, 2003
    Assignee: Sony Corporation
    Inventor: Yuichi Takagi
  • Patent number: 6542135
    Abstract: The display device of the present invention is provided with a means (8) for setting the writing pulse width of the attentional light-emitting sub-field wider than the normal writing pulse width at all the gray scale levels in the case where at least two continuous non-light-emitting sub-fields possibly exist before the attentional light-emitting sub-field at a certain gray scale level among all the gray scale levels specified on the basis of the number Z of sub-fields and the weighting of the sub-fields. According to the display device of the present invention, the discharge for writing can be stably executed without reducing the number of sub-fields in one field.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: April 1, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhiro Kasahara, Yuichi Ishikawa, Tomoko Morita, Makoto Kawachi, Tadayuki Masumori, Takao Wakitani, Toshio Wakahara, Akira Yawata
  • Patent number: 6501450
    Abstract: A system for controlling contrast of a liquid crystal display is provided by means of a parallel network of resistors. A processor controls general operations of the system and is configured to determine a desired contrast setting of the LCD. The processor is operative to assign a binary value corresponding to the desired contrast setting. A binary decoder is operatively coupled to the processor and is configured to receive the binary value of x bits from the processor. A circuit includes N number of resistors (N being an integer greater than x) configured to be coupled in parallel to effect a plurality of cumulative parallel resistance values for the circuit. The circuit is operatively coupled to the binary decoder. The binary decoder selectively combines the resistors to effect a specific cumulative parallel resistance value corresponding to the desired contrast setting.
    Type: Grant
    Filed: August 21, 1999
    Date of Patent: December 31, 2002
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: Mark R. Bjerke
  • Patent number: 6486863
    Abstract: Brightness of input data ranging from 0 to 20% (brightness close to black) is converted to gradation Y0 (black) and brightness ranging from 80 to 100% (brightness close to white) is converted to gradation Y7 (white). Ranges of brightness from 20 to 35%, 35 to 45%, 45 to 50%, 50 to 55%, 55 to 65%, and 65 to 80% are converted to gradations Y1 to Y6, respectively. While brightness of the input data is converted to eight gradations which an LCD can display, intervals of brightness assigned to each of gradations are so specified that they are narrower around medium brightness (around 50%) than around the minimum (0%) or maximum (100%) brightness, i.e., the conversion is performed in a nonlinear manner.
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: November 26, 2002
    Assignee: Sony Corporation
    Inventors: Hiroshi Doihara, Hirotaka Sakaguchi, Hajime Terada
  • Patent number: 6448960
    Abstract: A driving method of a plasma display panel which can perform an image display of a high quality in which a pseudo outline is suppressed while suppressing the number of bits of drive data. A display period of one field is divided into a plurality of subfields, and a light emitting state in a subfield of a relatively long light emitting period is also set by a pixel data bit to set a light emitting state of a subfield of a relatively short light emitting period in the subfields.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: September 10, 2002
    Assignee: Pioneer Electronic Corporation
    Inventor: Tetsuya Shigeta
  • Patent number: 6433763
    Abstract: A plasma display panel drive art capable of restraining a contour noise in a picture displayed on a PDP and reducing a maximum power consumption. The drive art allows one frame to be consisted of a plurality of sub fields each having a different weighting value for brightness so as to display a video signal of gray scale. The plurality of the sub fields are differently arranged along with a distribution of logical values in the video data for one frame, thereby dividing the one frame into a display interval and a non-display interval. Also, the plurality of the sub fields are equal to sub fields without a sub field having a least weighting value for the brightness.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: August 13, 2002
    Assignee: LG Electronics, Inc.
    Inventors: Geun-Soo Lim, Hwan Yu Kim, Jeong Pil Choi, Yeun Ho Yoo, Seong Hak Moon
  • Patent number: 6429874
    Abstract: It is an object to provide an image generating apparatus and method which can perform a high-quality translucence process with reduction of the hardware scale and processing load. The translucence process is performed according to a first translucence information OPt used for performing the translucence control with respect to the respective portions of an object and a second translucence information OPm used for performing the translucence control with respect to the entire object. The translucence control according to OPm is invalidated with respect to a portion of the object that is judged to be opaque according to OPt, that is, to be OPt=1. For example, the translucence control may normally be carried out according to the relational expression of OPp=OPm×OPt. On the other hand, when a switching flag SFL is 0, OPp is fixed at 1 or the translucence process is omitted, with respect to the opaque portion.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: August 6, 2002
    Assignee: Namco Ltd.
    Inventor: Katsuhiro Miura
  • Patent number: 6388661
    Abstract: Methods and apparatus for producing a pulse-width-modulated (PWM) grayscale or color image using a binary spatial light modulator. By staggering and re-quantizing the PWM intervals to a clock of a period based on the frame time divided by number of rows in the display, the system's peak bandwidth requirements are optimized for displays of arbitrary resolution and arbitrary choice of PWM waveform. Additionally, a gating circuit increases the optical efficiency of a spatial light modulator using this PWM method in a field-sequential color system by reducing the duration of the blanking period between color fields.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: May 14, 2002
    Assignee: Reflectivity, Inc.
    Inventor: Peter W. Richards
  • Patent number: 6388678
    Abstract: A display apparatus has an adjusting device, which acquires image brightness data, and adjusts a weighting multiplier N on the basis of brightness data. The weighting multiplier N takes not only a positive integer, but also a decimal fraction numeral. In accordance with this, even if weighting multiplier N changes, an abrupt change in brightness does not occur, and a person watching the screen is not left with a sense of incongruousness.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: May 14, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuhiro Kasahara, Yuichi Ishikawa, Tomoko Morita
  • Patent number: 6362835
    Abstract: A method and system for adjusting the brightness and contrast of a digital pulse-width modulated display without scaling the input image data. Brightness is adjusted by changing the duty cycle of a displayed pixel either by altering the bit display durations, or by turning the pixel on during blanking periods 36. The contrast ratio may be altered by changing the display duration of at least one of the MSBs differently than the display duration of at least one of the LSBs. Contrast may be increased by extending the MSB display periods 50 and shortening the LSB display periods 52. Contrast may be decreased by shortening the MSB display periods 56 and extending the LSB display periods 58. The color tint of the displayed image may be altered by individually changing the brightness of the constituent colors.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: March 26, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Paul M. Urbanus, Robert J. Gove
  • Patent number: 6333766
    Abstract: A tone display method for displaying a tone of an image in a display system which divides a time width of a field of an image signal into a plurality of weighted subfields and controls operation of the subfields.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: December 25, 2001
    Assignees: Hitachi, Ltd.
    Inventors: Akihiko Kougami, Masaji Ishigaki, Shigeo Mikoshiba, Takahiro Yamaguchi, Kohsaku Toda
  • Patent number: 6326980
    Abstract: A system and method for asserting compound data words on a display pixel according to a field sequential driving scheme is disclosed. In a particular embodiment, a display driver circuit includes an output controller for generating control signals to sequentially assert a first portion of a first compound data word on the display pixel, assert a first portion of a second compound data word on the display pixel, assert a second portion of the first compound data on the display pixel, and assert a second portion of the second compound data word on the display pixel. A particular display driver circuit includes a compound data generator which generates the compound data words from data words of a first type. The first portions of the compound data words are generated from the first type data words according to one predefined mapping scheme, and the second portions are generated according to another predefined mapping scheme.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: December 4, 2001
    Assignee: Aurora Systems, Inc.
    Inventor: W. Spencer Worley, III
  • Patent number: 6317112
    Abstract: A system and method for producing spatially modulated monochrome or color light having gray scale during a given period of time includes a spatial light modulator having a light modulating arrangement switchable between different states so as to act on light in different ways. A switching arrangement switches the modulating arrangement between different states in a controlled way during the period. The system also includes an illumination arrangement for selectively and alternately directing light of constant intensity and varying intensity into the modulating arrangement during predetermined subperiods of the period. In a color version of the system, the illumination arrangement directs light of different colors into the modulating arrangement during predetermined subperiods of the period, thereby providing a system for producing modulated colored light having color gray scale during a given period.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: November 13, 2001
    Assignee: Displaytech, Inc.
    Inventors: Mark A. Handschy, Michael R. Meadows, Bryan T. Morrison