Abstract: An image sensor and an image sensing method can obtain image signals with a high S/N ratio in a high-speed image pickup operation. Signal charges are input to input transfer stage 31 of CCD memory 30. Final transfer stage 32 is formed so as to be connected to the input transfer stage 31 and able to transfer signal charges to the input transfer stage 31. In an accumulation mode, read gate 42 and drain gate 40 are not turned on and the next transfer operation of the CCD memory 30 is conducted. The accumulated signal charges are transferred on a stage by stage basis and the signal charges obtained at the first image pickup timing are transferred again straightly to the input transfer stage 31. In this state, the signal charges obtained newly at photoelectric conversion section 20 at the next image pickup timing are injected into the input transfer stage 31 by way of input gate 21.

Abstract: A solid-state image pickup device includes a pixel array having a plurality of photodiodes that are disposed in a matrix, electric charge transfer gates, and a floating diffusion (FD), and further includes a reset transistor and an amplifier transistor each shared by the four adjacent photodiodes. In the solid-state image pickup device, the photodiodes include first to fourth photodiodes. In a state where the amplifier transistor is activated, electric charge transfer gates connected respectively to the first to fourth photodiodes are sequentially turned ON and electric charges accumulated in the photodiodes are sequentially read out through the FD. Accordingly, a readout blanking period can be minimized to and signal charges can be read out at high speed. Moreover, readout signal lines need only to be provided for every two columns of the photodiodes, so that openings of the photodiodes can be increased in size.

Abstract: Each of a plurality of unit pixels includes first and second photoelectric conversion units, and a pixel output unit shared between the first and second photoelectric conversion units. A monitoring unit configured to control the charge-accumulation operation of the first photoelectric conversion unit by monitoring a signal generated based on the second photoelectric conversion unit is provided.

Abstract: A method, of selectively reading less than all information from an image sensor for which member-pixels of a subset of the entire set of pixels are individually addressable, may include: sampling information from a targeted member-pixel of the subset without having to read information from the entire set of pixels; and adaptively reading information from another one or more but fewer than all member pixels of the entire set based upon the sampling information without having to read all pixels on the image sensor. A related digital camera may include features similar to elements of the method.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: An imaging apparatus includes a composite low frequency cutoff filter. The composite low frequency cutoff filter includes a first low frequency cutoff filter, a second low frequency cutoff filter, and an adder-subtractor. The second low frequency cutoff filter receives an output of the first low frequency cutoff filter. The adder-subtractor subtracts an output of the second low frequency cutoff filter from an input to the composite low frequency cutoff filter, and outputs a result of the subtraction to the first low frequency cutoff filter. An output of the first low frequency cutoff filter is outputted as an output of the composite low frequency cutoff filter.

Abstract: Disclosed herein is a solid-state image pickup device, including a pixel, the pixel including: a light receiving section; a charge transfer path; a transfer electrode; a readout gate section; and a readout electrode.

Abstract: A composite focal plane assembly with an expandable architecture has a multi-layer, double-sided aluminum nitride (AlN) substrate and vertical architecture to achieve the dual function of focal plane and electronics backplane. Imaging dice and other electrical components are mounted and wire bonded to one surface and then direct backplane connectivity is provided on the opposing surface through a matrix of electrical contacts. In one embodiment, a flexible connector is sandwiched between the AlN focal plane and a FR-4 backplane is used to compensate for differences in coefficient of thermal expansion (CTE) between the AlN and commercially available high density circuit card connectors that are commonly manufactured from materials with CTE properties more closely approximating FR-4. In an alternate embodiment, the FR-4 and flexible connectors are eliminated by using high density circuit card connectors that are fabricated out of materials more closely matching the CTE of AlN.

Abstract: According to one embodiment, a solid-state imaging device includes a pixel region which is configured such that a photoelectric conversion unit and a signal scanning circuit unit are included in a semiconductor substrate, and a matrix of unit pixels is disposed, and a driving circuit region which is configured such that a device driving circuit for driving the signal scanning circuit unit is disposed on the semiconductor substrate, wherein the photoelectric conversion unit is provided on a back surface side of the semiconductor substrate, which is opposite to a front surface of the semiconductor substrate where the signal scanning circuit unit is formed, and the unit pixel includes an insulation film which is provided in a manner to surround a boundary part with the unit pixel that neighbors and defines a device isolation region.

Abstract: The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Abstract: A solid-state imaging device includes a photoelectric conversion layer, a MOS transistor circuit. The photoelectric conversion layer is formed over a semiconductor substrate. The MOS transistor circuit reads out a signal corresponding to charges generated in the photoelectric conversion layer and then collected, and that is formed in the semiconductor substrate, the charges having a given polarity. The MOS transistor circuit includes a charge accumulation portion, a reset transistor, and an output transistor. The charge accumulation portion is electrically connected with the photoelectric conversion layer. The reset transistor resets a potential of the charge accumulation portion to a reset potential. The output transistor outputs a signal corresponding to the potential of the charge accumulation portion. The reset transistor and the output transistor have carriers whose polarity is opposite to the given polarity.

Abstract: A method to create a video sequence of a plurality of resultant images is disclosed. The video sequence is produced from images originating from a rolling shutter acquisition sensor.

Abstract: A solid-state image capturing apparatus includes: a pixel array unit including two-dimensionally arranged pixels each including a photoelectric conversion unit, a transfer transistor that transfers charges accumulated in the photoelectric conversion unit, and a charge discharging transistor that selectively discharges the charges accumulated in the photoelectric conversion unit; and a driving unit that performs driving for reading signals from each pixel of the pixel array unit, and drives the charge discharging transistor by using a signal for the driving.

Abstract: Provided is a light-receiving chip whose transparent protection plate has an area equal to or smaller than an area of the light-receiving chip, and which does not require a base portion for mounting. Provision of the light-receiving chip contributes to reduction in size and weight of cameras. In addition, provision of a solid-state imaging apparatus having excellent productivity contributes to reduction in price of cameras. A solid-state imaging apparatus (10) having: a solid-state imaging device (11) (a light-receiving chip) provided with a plurality of light-receiving cells arranged either one dimensionally or two dimensionally on one main surface of a base substrate; and a transparent protection plate (12) provided to cover a light-receiving area (18) (the plurality of light-receiving cells), where an area of the transparent protection plate is equal to or smaller than an area of the light-receiving chip, and a space (20) is formed between the light-receiving cells and the transparent protection plate.

Abstract: The solid image pickup device of the present invention comprises a photoelectric conversion part, a charge-voltage conversion part for converting electric charges from the photoelectric conversion part to voltage signals, a signal amplifier for amplifying the voltage signals generated in the charge-voltage conversion part, charge transfer means for transferring photo-electric charges from the photoelectric conversion part to the charge-voltage conversion part, and means for applying a certain voltage to a charge-voltage conversion part, wherein at least two readout operations for reading out the photo-electric charges accumulated during a period of accumulating photo-electric charges in the photoelectric conversion part via a signal amplifier.

Abstract: An image processing system for interpolating image data is comprised of a shift invariant point determining device, an illumination averager, a second order differentiator, and color data calculator. The shift invariant point determining device ascertains shift invariant points within the mosaic color element array pattern. The illumination averager determines average illumination values of clusters of a plurality of pixels. The second order differentiator determines a second order derivative of the average illumination values of the clusters of the plurality of pixels. The color data calculator determines color data for each of the plurality of pixels from the image data and second order derivative. A second order derivative scaler multiplies the second order derivative by a scaling factor for selectively smoothing and sharpening the second order derivative. A color data averager averages color data values of adjacent pixels to a resolution of the image data.

Abstract: A solid-state imaging device includes: a pixel unit in which pixels, each of which converts light into a pixel signal and accumulates the pixel signal in accordance with a light exposure period, are arranged in a predetermined color layout and first-color pixel horizontal rows containing first-color pixels and second-color pixel horizontal rows containing second-color pixels are alternately arranged in a vertical row direction; readout units that select n (n?2) single-color pixel signals from the first-color or second-color pixels in the first-color or second-color pixel horizontal rows, perform 1/n thinning-out on the selected n pixel signals to reduce the number of pixel signals to 1/n, and read the resultant pixel signal for each of the colors; and column processing units that perform column processing on the pixel signals having undergone the 1/n thinning-out.

Abstract: A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations.

Abstract: A solid-state imaging apparatuses IS1 comprises a package P1, a CCD chip 11, chip resistor arrays 21, etc. In package P1, a mounting portion 2, for mounting CCD chip 11 and chip resistor arrays 21, is disposed so as to protrude into a hollow portion 1. Mounting portion 2 has a first planar portion 3 and second planar portions 4, and first planar portion 3 and second planar portions 4 are formed to be stepped with respect to each other. CCD chip 11 is mounted and fixed on first planar portion 3 via a spacer 13. Chip resistor arrays 21 are mounted and fixed on second planar portions 4. Using the step difference between first planar portion 3 and second planar portions 4, CCD chip 11 and chip resistor arrays 21 are positioned proximally.

Abstract: A solid-state image sensor includes: a semiconductor substrate 22; a plurality of pixels 23 arranged on the semiconductor substrate 22 and respectively including photoelectric conversion regions 24; and an isolation region 25 electrically isolating the pixels 23 from one another. The first pixel 31 includes a first photoelectric conversion region 32 and a first color filter 41 having a peak of its optical transmission in a first wavelength range. The second pixel 34 adjacent to the first pixel 31 includes a second photoelectric conversion region 35 and a second color filter 42 having peaks in its optical transmission in the first wavelength range and a second wavelength range including shorter wavelengths than the first wavelength range. A portion 33 of a deep portion of the first photoelectric conversion region 32 extends across the isolation region 25 to reach a portion under the second photoelectric conversion region 35.

Abstract: A charge detection device includes: a substrate having a first conductive type of predetermined region; a second conductive type of drain region disposed in the predetermined region of the substrate; a second conductive type of source region disposed in the predetermined region of the substrate; a second conductive type of channel region disposed between the drain region and the source region; a gate formed via an insulating film on the channel region; a second conductive type of charge accumulation region disposed in the predetermined region of the substrate and changing a threshold voltage of a transistor having the drain region, the source region, and the gate by accumulating signal charges as a target to be measured; a first conductive type of channel barrier region disposed between the channel region and the charge accumulation region; and a charge sweep region sweeping away the signal charges accumulated in the charge accumulation region.

Abstract: In an imaging apparatus, a first conversion unit multiplexes input signals including control signals for driving an image sensor to generate a multiplex signal having a frequency higher than those of the input signals. A transfer unit transfers the multiplexed signal generated by the first conversion unit according to low-voltage differential signaling. A reception unit receives the multiplexed signal from the transfer unit. A second conversion unit extracts the control signals for driving the image sensor from the multiplexed signal received by the reception unit. A third conversion unit performs at least one of correction processing and development processing on a signal generated by the image sensor. A signal generation unit generates and supplies processing timing control signals to the first conversion unit and the third conversion unit.

Abstract: To provide a semiconductor device and a driving method of the same that is capable of enlarging a signal amplitude value as well as increasing a range in which a linear input/output relationship operates while preventing a signal writing-in time from becoming long. The semiconductor device having an amplifying transistor and a biasing transistor and the driving method thereof, wherein an electric discharging transistor is provided and pre-discharge is performed.

Abstract: An imaging device includes an image sensing device provided on a semiconductor substrate; a transparent member provided on a light-receiving area of the image sensing device; and a circuit element provided on the transparent member, wherein the image sensing device and the circuit element are electrically coupled to each other.

Abstract: A drive mode is switched after readout for one frame is completed, and the reset operation for the following frame is started. In this manner, the reset operation for the following frame will not be performed during the readout period for the preceding frame. Therefore, the accumulation period for the following frame can be made consistent in that frame.

Abstract: A solid-state imaging apparatus of a dynamic range enlarged by reading out a carrier accumulated in a carrier accumulation unit at a plurality of times during a single carrier accumulation time period.

Abstract: A variable rate image sensor outputs pixel data at a variable rate using lookup tables to selectively read out particular rows at particular times. The readout rate is not constant, allowing for a smaller image buffer in the overall system.

Abstract: A solid state imaging device 1 includes a photodetecting section including M×N pixel portions P1,1 to PM,N two-dimensionally arrayed in M rows and N columns, a signal readout section including integrating circuits S1 to SN and holding circuits H1 to HN, and an initialization section including initialization switches SWI,1 to SWI,N. In response to a discharging control signal Reset, discharge switches SW2 in the integrating circuits Sn are temporarily closed and then opened, and thereafter, in response to an m-th row selecting control signal Vsel(m), the readout switches SW1 of the pixel portions Pm,n of the m-th row are closed for a first period. In this first period, in response to a hold control signal Hold, the input switches SW31 of the holding circuits Hn are switched from a closed state to an open state, and thereafter, in response to an initializing control signal Init, the initialization switches SWI,n are closed for a second period.

Abstract: An image enhancement circuit (26, 60, 190, 260) includes an input interface (64, 262), which is operative to accept a stream of input pixel values belonging to pixels (32) of an input image. The input image includes a plurality of different input sub-images including respective subsets of the pixels, such that the input pixel values of the pixels in the different input sub-images are interleaved in the stream. A plurality of filter cells (92, 144, 206, 222, 238, 364) are connected in a two-dimensional array configuration and are arranged to separately filter the input pixel values of each of the input sub-images with respective two-dimensional deconvolution kernels so as produce respective output sub-images that include output pixel values. A multiplexer (88, 332) is coupled to multiplex together the output pixel values of the output sub-images so as to produce a filtered output image.

Abstract: An image sensor driving unit, comprising a signal generator and a controller, is provided. The charge-transfer channel transfers the signal charges at a speed according to the frequency of a transfer signal. The signal generator transmits the first discharge signal and the second discharge signal to the image sensor. The first and second discharge signals are the transfer signals for the charge-transfer channel to carry out rapid discharge. The frequency of the second discharge signal is greater than that of the first discharge signal. The controller orders the signal generator to generate the first discharge signal during an overlap period when a driving period is at least partially overlapped with a discharge period. The controller orders the signal generator to generate the second discharge signal when the driving period is not overlapping with the discharge period.

Abstract: An image signal processing circuit for CMOS image sensor comprises a differential operational amplifier, input stage capacitors, and output stage capacitors. The input stage capacitors comprise a first positive input stage switching capacitor array and a first negative input stage switching capacitor array. The first positive input stage switching capacitor array is configured to input analog image signals, a control end of the first positive input stage switching capacitor array is connected to a color gain control signal end, and an output end of the first positive input stage switching capacitor array is coupled to a positive input end of the differential operational amplifier.

Abstract: Imaging systems and methods for actuating image sensors based on alignment are disclosed. An example method includes determining by a controller an alignment of a plurality of sensors, the sensors adapted to capture an image of an object. The method also includes actuating the sensors with the controller based on the alignment.

Abstract: A focus detection apparatus includes: a photoelectric conversion unit of a charge accumulation type, including a plurality of sensors; an accumulation controller for controlling charge accumulation of the photoelectric conversion unit; an accumulation time measuring unit for measuring accumulation time; a correction computing unit for performing correction computing of a photoelectric conversion signal; and a focus detection computing unit for performing focus detection computing. The accumulation controller detects a signal of accumulation completion in a first sensor of the plurality of sensors, and then forces sensors except the first sensor to terminate the charge accumulation. The correction computing unit performs the correction computing of the photoelectric conversion signal based on first accumulation time that is accumulation time of the first sensor and second accumulation time that is different from the first accumulation time.

Abstract: A solid-state image pickup device comprises for each pixel a photoelectric converter PD, an input terminal FD of a signal amplifier and a transfer switch TX for transferring an optical signal from the photoelectric converter to the input terminal. The device additionally comprises means for resetting the photoelectric converter by opening the transfer switch TX under a condition of holding the voltage of the input terminal FD to a fixed high level before storing the optical signal in the photoelectric converter PD. With this arrangement, any residual electric charge in the photoelectric converter can be eliminated without paying the cost of reducing the manufacturing yield and degrading the chip performance.

Abstract: An image sensing apparatus includes a pixel array, a readout unit and an output unit having an output line group, a plurality of difference circuits, a first dummy line and a second dummy line. The output line group is interposed between the first dummy line and the second dummy line. The readout unit includes a plurality of memory circuits, each including a first holding capacitance and a second holding capacitance. A gain determined by a ratio of a capacitance value of the first holding capacitance and a capacitance value of a first output line is applied to the first signal output to the first output line, and a gain determined by a ratio of a capacitance value of the second holding capacitance and a capacitance value of a second output line is applied to the second signal output to the second output line.

Abstract: Disclosed herein is a solid-state imaging device, including: a pixel array unit configured to be formed by two-dimensionally arranging unit pixels each having a photoelectric converter, a charge-voltage converter, a reset transistor to set the charge-voltage converter to a predetermined potential, and an amplification transistor to read out a signal converted by the charge-voltage converter; a signal processor configured to process a signal output from the unit pixel by using a reference voltage; and a setter configured to set a reset level obtained from a second unit pixel from which a signal level has been already read out as the reference voltage of the signal processor before readout of a signal level based on a signal charge accumulated or retained in the charge-voltage converter from a first unit pixel.

Abstract: An estimated noise shape estimated to be included in the signal to be corrected is calculated based on a calibration signal including a noise correlating with the noise of the signal to be corrected so as to correct a noise of a signal to be corrected. A correction value of a noise shape is generated by attenuating an amplitude of the estimated noise shape, and the noise of the signal to be corrected is corrected by using the correction value of the noise shape thus generated.

Abstract: An image converter tube 2c and a plurality of image sensors CCDs 1 (eight CCDs 1 here) are provided, and the respective CCDs 1 and image positions in the image converter tube 2c are in one-to-one correspondence. By carrying out at least one of a control to make a shift to a different image position after image formation in one and the same image position for a predetermined number of frames, and a control to make a shift to a different image position in an imaging cycle with a predetermined time interval, various image pickup situations can be accommodated without changing the structure of CCDs 1 per se.

Abstract: An objective of the present invention is to provide the solid-state imaging device and the driving method thereof which can control: a poor picture quality, such as blooming, to maximize a dynamic range of the photodiode; and a poor picture quality resulted from an incomplete read-out operation. A solid-state imaging device in the present invention includes: a solid-state imaging element; and a driving pulse controlling unit applying a driving pulse to each of read-out gates of a column CCD. The driving pulse controlling unit transfers in a column direction signal charge within a charge transfer region of the column CCD by applying a column transfer clock having a LOW level voltage and a MIDDLE level voltage, and the LOW level voltage and the MIDDLE level voltage are minus voltages.

Abstract: A solid state imaging device with pixels in a two-dimensional array, a controller which performs window cutting on signals read out of the pixel array in multiple column units on a column-address basis, and a selector which, when the cutting window overlaps with a multiple column unit, holds signals in a present multiple column unit and in a previous column unit, and then outputs selected consecutive signals.

Abstract: A solid-state image sensor includes: a plurality of pixels, each having a photodiode, a floating diffusion, a transfer transistor, a reset transistor, and an amplifying transistor; vertical signal lines 31 for receiving signals from the plurality of pixels; sampling capacitors 62; circuits 78 for comparing a voltage on a corresponding one of the vertical signal lines 31 with a reference voltage to determine whether the voltage on the corresponding vertical signal line 31 is higher or lower than the reference voltage; and clip circuits 79 for outputting a clip voltage Vclip to a corresponding one of the sampling capacitors 62 based on the output of a corresponding one of the circuits 78. A voltage on each vertical signal line in the state where the signal accumulated in a corresponding photodiode has been transferred to a corresponding floating diffusion, can be used as a comparison voltage of each column.

Abstract: Methods and systems for a tiled output mode for image sensors are disclosed and may comprise receiving tiled image data from an image sensor that generates output in a tiled format, and sequentially processing the received tiled image data. The received tiled image data may comprise a plurality of lines. A tile received from the image sensor may overlap at least one neighboring tile. The neighboring tiles may be above, below, to the left and/or to the right of the current tile. The size of the received tiled image data may vary dynamically, and may vary based on, for example, a compression format and/or a desired resolution of the image sensor. The method may also comprise generating the tiled image data from an image sensor, and sequentially processing the generated tiled image data.

Abstract: According to the present invention, as a structure of a pixel section (10), in each of columns from a first to a m-th column, a plurality of pixel signals outputted from a plurality of pixels arranged in a column direction are transmitted, respectively, to a plurality of output signal lines (15l to 15n) different from each other. Then, a read control and are set control are simultaneously executed on the plurality of pixels.

Abstract: Circuitry for reducing fixed pattern noise in an image processing system with a 4-T (4 transistors) pixel and a method thereof is proposed. The image processing system includes two voltage sources, two current sources, a 4-T pixel, a second portion of a linearized source follower, a ping pong memory, a PGA, and auto-zero circuitry. By coupling the auto-zero circuitry to the PGA, an open loop is formed to clamp the output of an op amp of the PGA to a stable reference when resetting the PGA so as to remove DC offsets at the output terminal of the op amp.

Abstract: A CCD Device of the type for providing charge gain by impact ionisation has a multiplication register. Gain provided by a subset of the elements of the multiplication register are independently controllable from other elements in the register. This enables the register to be used in one setting with the same gain applied to all elements and a different setting with a subset of elements arranged to provide a different gain. By comparing the two signals, the gain provided by each element and the register as a whole may be derived.

Abstract: In a solid-state image capturing device including a pixel array arranged in a row direction and a column direction orthogonal thereto, and a vertical register having a plurality of transfer electrodes which serves to read signal charges Qa, Qb, . . . generated by light receipt of each of pixels A, B, . . . and to sequentially transfer the signal charge in the column direction upon receipt of a transfer pulse, an electric potential well for a smear charge is generated and an unnecessary charge q in the vertical register is collected into the electric potential well for a smear charge before the signal charge is read from the pixels A, B, . . . onto the vertical register (a timing t707), an electric potential well for signal charge transfer is then generated and the signal charges Qa, Qb, . . . are read from the pixels A, B, . . .

Abstract: A photometric device includes a storage-type photometric sensor, a first control means that performs accumulation control on the photometric sensor based upon an average value of an output of the photometric sensor, a second control means that performs accumulation control on the photometric sensor based upon a maximum value of the output of the photometric sensor, and an accumulation control means that controls the second control means to perform next accumulation control, if the maximum value of the output of the photometric sensor on which the accumulation control is performed by the first control means exceeds a saturation output level of the photometric sensor, and controls the first control means to perform next accumulation control, if the maximum value of the output of the photometric sensor does not exceed the saturation output level of the photometric sensor.

Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.

Abstract: A solid-state imaging device includes: a plurality of pixels arranged in a matrix, the matrix defining columns of the pixels, and each of the pixels outputting an analog signal by performing photoelectric conversion; an analog-digital converter provided for each of columns which sequentially converts a plurality of analog signals outputted from the pixels in a column into a plurality of digital signals; a memory circuit provided for each column which includes memories and performs, in parallel, a process of storing a one of the digital signals in one of the memories and a process of outputting another of the digital signals previously stored in another of the memories; and data buses connected to the memory in each column.

Abstract: A circuit for processing an analog signal having a time sequence of discrete signal levels, each of which lies in a time interval and represents an information-bearing segment of the interval while the rest of the time interval is a non-information-bearing segment, comprises a transistor in emitter-follower or source-follower configuration, a high emitter or source resistance or, instead, a high-ohm constant current source, and a device for applying a voltage supply, as well as a switch which is connected between the emitter and a reference potential to prevent a current from flowing via the high-ohm resistance or the high-ohm voltage source for charge reversal of an output capacitance of the circuit in one direction, whereas for charge reversal in the other direction the dynamic current boosting effect of the transistor is exploited. This results in a fast emitter-follower or source-follower circuit which is particularly suitable as the output stage for image sensors.