Including Switching Transistor And Photocell At Each Pixel Site (e.g., "mos-type" Image Sensor) Patents (Class 348/308)
  • Patent number: 10708530
    Abstract: A third line that supplies a first potential to a first semiconductor region of a first detection pixel and a fourth line that supplies a second potential to the first semiconductor region of a second detection pixel are provided. An interval between a partial line of the third line and a partial line of the fourth line is longer than an interval between a partial line of a first line and a partial line of a second line which extend along the partial line of the third line and the partial line of the fourth line.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: July 7, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yoichi Wada
  • Patent number: 10708523
    Abstract: Provided is an imaging device configured to sequentially perform AD conversion for A signals of pixels of the first row, A signals of pixels of the second row, A+B signals of the pixels of the first row, and A+B signals of the pixels of the second row.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: July 7, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kei Ochiai, Katsuhito Sakurai, Atsushi Furubayashi
  • Patent number: 10692179
    Abstract: Various embodiments of the present technology provide a method and apparatus for signal distribution in an image sensor. In various embodiments, the apparatus provides a balanced signal distribution circuit having a plurality of driver circuits, wherein each driver circuit is connected to a logic circuit, distributed either directly below the pixel array or interspersed within the pixel array. A clock distribution network is connected to the logic circuit to provide all the logic circuits with a clock signal substantially simultaneously, which, in turn, controls all of the driver circuits substantially simultaneously and all pixels in the pixel array receive a control signal substantially simultaneously.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: June 23, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Manuel H. Innocent, Tomas Geurts
  • Patent number: 10694162
    Abstract: Digital camera systems and methods are described that provide a color digital camera with direct luminance detection. The luminance signals are obtained directly from a broadband image sensor channel without interpolation of RGB data. The chrominance signals are obtained from one or more additional image sensor channels comprising red and/or blue color band detection capability. The red and blue signals are directly combined with the luminance image sensor channel signals. The digital camera generates and outputs an image in YCrCb color space by directly combining outputs of the broadband, red and blue sensors.
    Type: Grant
    Filed: December 1, 2018
    Date of Patent: June 23, 2020
    Assignee: Callahan Cellular L.L.C.
    Inventors: Richard Ian Olsen, James Gates, Darryl L. Sato
  • Patent number: 10694125
    Abstract: The disclosure relates to a solid-state imaging element, a method of operating the solid-state imaging element, an imaging apparatus, and an electronic device. The solid-state imaging element enables appropriate measurement of fluctuation of power supply voltage, and removal of noise caused by the fluctuation of the power supply voltage by using the measured fluctuation of the power supply voltage. In a case where analog/digital conversions of pixel signals are performed at different timings being not overlapped on a line basis, during a period, on the line basis, in which reading and analog/digital conversions are sequentially performed on the line basis, voltage of power supply to be supplied to associated pixels is sampled. The disclosure is applicable to solid-state imaging elements.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: June 23, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yuusuke Nishida
  • Patent number: 10681291
    Abstract: An imaging device includes a photoelectric converter that generates signal charge; a charge storage node that stores the signal charge; a capacitive element connected to the charge storage node; and a first transistor connected to the charge storage node via the capacitive element, wherein switching between on-state and off-state of the first transistor causes an amount of saturated charge in the charge storage node to change.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: June 9, 2020
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Naoki Shimasaki, Masashi Murakami
  • Patent number: 10681294
    Abstract: A solid-state imaging device includes a pixel array with unit pixels each having a photoelectric conversion device arranged in a matrix. Column signal lines are wired with respect to one column in the pixel arrangement and pixels are regularly connected to the column signal lines in accordance with rows in which pixels are positioned. A pixel signal reading unit has a column processing unit that reads pixel signals in units of plural pixels from the pixel array and performs column processing to read signals on a column basis, wherein the pixel signal reading unit includes a column input unit which can connect one or plural column signal lines arranged at a corresponding column to an input of one column processing unit through plural capacitors connected in parallel The column input unit has switches which can change a connection state between capacitors and column signal lines corresponding to the column.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 9, 2020
    Assignee: SONY CORPORATION
    Inventors: Masamichi Ito, Tsuyoshi Hara, Yoshiaki Inada
  • Patent number: 10666914
    Abstract: A solid state imaging device includes a pixel array unit in which color filters of a plurality of colors are arrayed with four pixels of vertical 2 pixels×horizontal 2 pixels as a same color unit that receives light of the same color, shared pixel transistors that are commonly used by a plurality of pixels are intensively arranged in one predetermined pixel in a unit of sharing, and a color of the color filter of a pixel where the shared pixel transistors are intensively arranged is a predetermined color among the plurality of colors. The present technology can be applied, for example, to a solid state imaging device such as a back-surface irradiation type CMOS image sensor.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: May 26, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsushi Masagaki
  • Patent number: 10666883
    Abstract: An electronic circuit includes a unit pixel, a first clamp circuit, and a second clamp circuit. The unit pixel outputs a voltage having an output voltage level at a first output voltage level in a first time interval and at a second output voltage level in a second time interval different from the first time interval. The first clamp circuit is configured to clamp the output voltage level from the unit pixel to a first voltage level responsive to the first output voltage level being not greater than the first voltage level in the first time interval. The second clamp circuit is configured to clamp the output voltage level from the unit pixel to a second voltage level responsive to the second output voltage level being not greater than the second voltage level in the second time interval.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: May 26, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moo Young Kim, KyoungMin Koh, Woong Joo, Mira Lee, Kyung-Min Kim
  • Patent number: 10665628
    Abstract: A photoelectric conversion apparatus that includes a pixel region having photoelectric conversion elements includes a semiconductor layer having first and second surfaces, and the photoelectric conversion elements are disposed between the first and second surfaces. With a virtual plane extending along the second surface between the first and second surfaces being a third plane, the pixel region includes an element isolating portion constituted by an insulator disposed closer to the first surface than the third plane, and first and second isolating portions constituted by grooves provided in the semiconductor layer to pass through the third plane. The first isolating portion overlaps the element isolating portion in a normal direction to the third plane. An end of the second isolating portion on a side on the first surface is closer to the second surface than an end of the first isolating portion on a side on the first surface is.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: May 26, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobutaka Ukigaya, Hideshi Kuwabara
  • Patent number: 10666882
    Abstract: A solid-state imaging device 10 includes a signal processing part 710 which, when combining specific read-out signals among the plurality of read-out signals, selects at least one signal which becomes necessary for a combinational operation in accordance with a result of a comparison between at least one read-out signal among the plurality of read-out signals and a threshold value, applies the selected signal to the combinational processing, and generates a combined signal extended in dynamic range, and wherein the signal processing part, when combining read-out signals from one specific pixel, determines the combinational information concerning the combinational operation of these read-out signals with reference to the combinational information concerning the combinational operation of the surrounding pixels of the one specific pixel. By this configuration, it is possible to smoothly switch a plurality of signals, possible to realize a higher dynamic range and a higher quality of image.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: May 26, 2020
    Assignee: Brillnics Japan Inc.
    Inventor: Yasuo Takane
  • Patent number: 10658404
    Abstract: The present technology relates to a solid state imaging device capable of providing a solid state imaging device that does not cause deterioration of image quality due to an increase in reading speed of a pixel signal, and an imaging apparatus. In a pixel array block in which a plurality of pixels are two-dimensionally arrayed, each of the pixels including: a photoelectric conversion device; a plurality of transistors to be used for reading a signal from the photoelectric conversion device; and wiring for driving the transistors, a plurality of pixel output lines are provided for each one column of the plurality of pixels two-dimensionally arrayed, and the plurality of pixel output lines from the pixels are arranged separately in a plurality of wiring layers. The present technology can be applied to, for example, a CMOS image sensor.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: May 19, 2020
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Nobutaka Shimamura
  • Patent number: 10659716
    Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: May 19, 2020
    Assignee: Sony Corporation
    Inventors: Atsumi Niwa, Yosuke Ueno, Shimon Teshima, Daijiro Anai, Yoshinobu Furusawa, Taishin Yoshida, Takahiro Uchimura, Eiji Hirata
  • Patent number: 10659055
    Abstract: An N bit counter includes a lower counter having a first output having M bits that operates a first counting frequency. An upper counter having a second output having N?M+L bits operates a second counting frequency. The second counting frequency is equal to the first counting frequency divided by 2(M-L). An error correction controller is coupled to receive the first and second outputs and perform operations that include comparing the L least significant bits (LSBs) of the second output and at least one most significant bit (MSB) of the first output, and correcting the N?M MSBs of the second output in response to the comparison. The lower bits of the N bit counter are the M bits of the first output, and the upper bits of the N bit counter are the corrected N?M MSBs of the second output.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: May 19, 2020
    Assignee: OmniVision Technologies, Inc.
    Inventors: Satoshi Sakurai, Hiroaki Ebihara
  • Patent number: 10658417
    Abstract: A solid-state image sensing device includes a pixel array, control lines, signal lines, a pixel control circuit, and a read circuit. The pixel array includes pixel sub-arrays arranged in a main scanning direction and each including pixels arranged to form rows along the main scanning direction and at least one column along a sub-scanning direction. Each of the control lines is connected to at least one pixel in in one of the pixel sub-arrays. Pixels in each of the least one column is connected to different control lines. Each of the signal lines is connected to all pixels in each of the least one column in one of the pixel sub-arrays. The pixel control circuit generates a pixel signal in each pixel and the read circuit reads the pixel signal from each pixel to cause successive phase differences between the pixel sub-arrays.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: May 19, 2020
    Assignee: RICOH COMPANY, LTD.
    Inventor: Atsushi Suzuki
  • Patent number: 10659720
    Abstract: An image sensing system includes a pixel array, an analog-to-digital converter circuit, and a memory. The pixel array includes a first pixel, a second pixel, and a third pixel interposed between the first pixel and the second pixel. During a first sensing time, the analog-to-digital converter circuit converts a first image signal received from the first pixel to first image data and converts a second image signal received from the second pixel to second image data. During a second sensing time, the analog-to-digital converter circuit converts a third image signal received from the third pixel to third image data. The first image data and the second image data are written in the memory during a first write time, and the third image data are written in the memory during a second write time.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: May 19, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byung-Joon Baek
  • Patent number: 10659704
    Abstract: There is provided an imaging device including: a pixel that outputs a pixel signal corresponding to an amount of incident light; an output signal line that is connected to the pixel to allow the pixel signal from the pixel to be output to the output signal line; a first transistor that has a first gate, a first source, and a first drain, one of the first source and the first drain being connected to the output signal line; and a first circuit that is connected to the first gate, the first circuit being configured to generate a third voltage that is a voltage between a first voltage and a second voltage, the first voltage being a voltage for turning on the first transistor, the second voltage being a voltage for turning off the first transistor.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: May 19, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaaki Yanagida, Makoto Shouho
  • Patent number: 10645314
    Abstract: A reading part, in a first reset period PR1, holds reset transistors in all pixels in a conductive state and executes a first conversion gain reset readout processing HCGRRD, stores an AD conversion code with respect to a first readout reset, signal HCGVRST in a memory part, then, in a transfer period PT1, holds the transfer transistors in all pixels in a conductive state to transfer the accumulated charges in photodiodes PD1 to FD1 to thereby execute a global shutter operation accumulating overflowed charges in storage capacitors CS1. The reading part, when reading each row, executes a first conversion gain signal readout processing, a second conversion gain signal readout processing, and a second conversion gain reset readout processing in order. Due to this, it becomes possible to realize digital pixels provided with a global shutter function at a small pixel pitch.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: May 5, 2020
    Assignee: BRILLNICS INC.
    Inventor: Toshinori Otaka
  • Patent number: 10645324
    Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: May 5, 2020
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Makoto Motoyoshi
  • Patent number: 10645312
    Abstract: The present disclosure is related to an imaging device, an imaging system, and a moving body. The imaging device according to an exemplary embodiment includes: a plurality of pixels and a connection transistor. Each of the plurality of pixels includes a photoelectric conversion unit, an amplification transistor that outputs a signal based on an electric charge generated in the photoelectric conversion unit, and a selection transistor that connects a source of the amplification transistor and an output line. The connection transistor includes two nodes, a conducting state between the two nodes being controlled by a signal supplied to a gate of the connection transistor. One of the two nodes is connected to the source of the amplification transistor of a first pixel included in the plurality of pixels. The other is connected to the source of the amplification transistor of a second pixel included in the plurality of pixels.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: May 5, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hideo Kobayashi
  • Patent number: 10645328
    Abstract: This solid-state imaging device has a plurality of pixels formed by circuit elements distributed in a first and a second semiconductor substrates configured in a stacked structure. The solid-state imaging device has the first and the second semiconductor substrates and a plurality of connection electrodes formed between the first semiconductor substrate and the second semiconductor substrate to electrically connect signal lines of a plurality of photoelectric conversion circuits and signal lines of a plurality of signal processing circuits included in the first and second semiconductor substrates respectively. A plurality of pixel sets are defined to have at least one of the plurality of photoelectric conversion circuits, respectively, and the photoelectric conversion circuits included in the plurality of pixel sets adjacent to each other are connected to the corresponding signal processing circuits via the different connection electrodes which are formed at positions not adjacent to each other, respectively.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: May 5, 2020
    Assignee: OLYMPUS CORPORATION
    Inventor: Yuichi Gomi
  • Patent number: 10638058
    Abstract: An imaging device, comprising an image sensor that forms a subject image to acquire an image, an image processing circuit that generates an image for display from images that have been acquired by the image sensor, an image combining circuit that generates a combined image for display that has a deeper depth of field than the image for display, from a plurality of images for combination that have been acquired by the image sensor at respectively different in focus positions, an in focus position setting section that sets in focus position, a shooting information acquisition section that acquires information on shooting conditions, and a display image determination section that determines whether to display either the image for display or the combined image for display as a display image, and a display that displays the display image that has been determined by the display image determination section.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: April 28, 2020
    Assignee: Olympus Corporation
    Inventor: Takuya Matsunaga
  • Patent number: 10629644
    Abstract: An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a microlens disposed over the photodiode, a first transfer transistor, a second transfer transistor and a capacitor. The first transfer transistor and the second transfer transistor are formed on the semiconductor substrate, and a memory node is formed in the semiconductor substrate between the first transfer transistor and the second transfer transistor, wherein the first transfer transistor is coupled to the photodiode. The capacitor is formed between the first transfer transistor and the second transfer transistor, and the capacitor includes a first electrode coupled to the memory node, a second electrode on the first electrode and extending to an edge of the photodiode, and a dielectric layer between the first and the second electrodes.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 21, 2020
    Assignee: Powerchip Technology Corporation
    Inventors: Chih-Ping Chung, Ming-Yu Ho, Wen-Hao Huang, Saysamone Pittikoun
  • Patent number: 10630916
    Abstract: An image sensor capable of switching between a first path configured to output an image signal read from a plurality of pixels to an external after storing the image signal in a memory, and a second path configured to output the image signal to the external without storing the image signal in the memory is configured. In a case of shooting using a supplemental light source, the image sensor is controlled so as to use the first path and to have a speed for reading the image signal from the plurality of pixels be faster than a speed for outputting the image signal from the memory to the external.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: April 21, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hiroshi Kaibara
  • Patent number: 10630912
    Abstract: An image sensor comprising: a pixel portion that outputs a pixel signal; a setting unit that sets a reference voltage in accordance with a shooting condition; a comparator that compares the reference voltage or one of a plurality of comparison voltages having different slopes which change with time and the pixel signal; a selector that selects one of the plurality of comparison voltages according to a result of the comparison between the reference voltage and the pixel signal by the comparator; and a counter that counts a number of clocks until the selected comparison voltage and the pixel signal become equal while the comparator compares the comparison voltage selected by the selector and the pixel signal.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: April 21, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mie Ishii, Seiichirou Sakai
  • Patent number: 10616513
    Abstract: An image sensor includes first pixels and second pixels arranged in alternating order along a first direction, first output lines extending in a second direction that is perpendicular to the first direction and respectively connected to the first pixels, second output lines extending in the second direction and respectively connected to the second pixels, first analog circuit blocks and second analog circuit blocks arranged in alternating order along the first direction, and shielding structures disposed each between adjacent ones of the first and second analog circuit blocks. Each of the first analog circuit blocks includes a plurality of first analog circuits respectively connected to the first output lines. Each of the second analog circuit blocks includes a plurality of second analog circuits respectively connected to the second output lines.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: April 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yunhwan Jung, Sunyool Kang, Kyoungmin Koh, Seungjin Lee
  • Patent number: 10615211
    Abstract: The present invention relates to a semiconductor device, a solid-state image sensor and a camera system capable of reducing the influence of noise at a connection between chips without a special circuit for communication and reducing the cost as a result. The semiconductor device includes: a first chip; and a second chip, wherein the first chip and the second chip are bonded to have a stacked structure, the first chip has a high-voltage transistor circuit mounted thereon, the second chip has mounted thereon a low-voltage transistor circuit having lower breakdown voltage than the high-voltage transistor circuit, and wiring between the first chip and the second chip is connected through a via formed in the first chip.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: April 7, 2020
    Assignee: SONY CORPORATION
    Inventors: Shunichi Sukegawa, Noriyuki Fukushima
  • Patent number: 10609117
    Abstract: A method, system, and media are provided for transmitting messages to a recipient through a communications network. Network condition measurements are obtained and communication gateways that execute temporal shifting agents are identified. A message is received from a first device and a header of the message is parsed to determine that (i) a temporal shifting message is being received and (ii) a second version of content is contained within the temporal shifting message. Upon parsing the temporal shifting message, embodiments update a previously stored first version of content with the second version of content. The second version of content is then transmitted to the recipient based on the obtained measurements for network conditions.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: March 31, 2020
    Assignee: Sprint Communications Company L.P.
    Inventors: Raymond Emilio Reeves, Ryan Alan Wick
  • Patent number: 10609317
    Abstract: A latch unit that starts an operation of capturing a data signal according to a startup instruction signal and holds the data signal and ends the capturing operation at a timing at which an execution instruction signal is input, a first signal path that transfers a latch timing signal as the startup instruction signal, and a second signal path that transfers the latch timing signal as the execution instruction signal are included, and a first logic element that outputs a first output signal switched to a logical value according to a logical value of an input signal at a first predetermined timing, and a signal maintenance logic circuit that continues to output a second output signal with a predetermined logical value according to the logical value of the input signal until initialization of a reset signal is indicated are arranged in the second signal path.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: March 31, 2020
    Assignee: OLYMPUS CORPORATION
    Inventor: Yosuke Kusano
  • Patent number: 10609318
    Abstract: The present technology relates to an imaging device, a driving method, and an electronic apparatus capable of more quickly acquiring a high-quality image. In a pixel of a solid-state imaging device, a photoelectric conversion unit that performs a photoelectric conversion of incident light is disposed. An electric charge/voltage converting unit converts electric charge acquired by the photoelectric conversion unit into a voltage signal. A signal comparator compares a supplied reference signal with the voltage signal acquired by the electric charge/voltage converting unit and outputs a result of the comparison. A storage unit adaptively changes the conversion efficiency of the electric charge/voltage converting unit on the basis of a control signal acquired on the basis of a result of the comparison output from the signal comparator. The present technology can be applied to a solid-state imaging device.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: March 31, 2020
    Assignee: SONY CORPORATION
    Inventors: Masaki Sakakibara, Yorito Sakano
  • Patent number: 10608101
    Abstract: Embodiments relate to a stacked photo sensor assembly where two substrates are stacked vertically. The two substrates are connected via interconnects at a pixel level to provide a signal from a photodiode at a first substrate to circuitry on a second substrate. The circuitry on the second substrate performs operations that were conventionally performed on first substrate. More specifically, charge storage of the first substrate is replaced with capacitors on the second substrate. A voltage signal corresponding to the amount of charge in the first substrate is generated and processed in the second substrate. By stacking the first and second substrates, the photo sensor assembly can be made more compact while increasing or at least retaining the photodiode fill factor of the photo sensor assembly.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: March 31, 2020
    Assignee: FACEBOOK TECHNOLOGIES, LLC
    Inventor: Xinqiao Liu
  • Patent number: 10608038
    Abstract: A solid-state image pickup device is provided which can inhibit degradation of image quality which may occur when a global electronic shutter operation is performed. A gate drive line for a first transistor of gate drive lines for pixel transistors is positioned in proximity to a converting unit.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: March 31, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Yusuke Onuki, Toru Koizumi
  • Patent number: 10602085
    Abstract: The present disclosure is related to an imaging device, an imaging system, and a moving body. The imaging device according to an exemplary embodiment includes: a plurality of pixels and a connection transistor. Each of the plurality of pixels includes a photoelectric conversion unit, an amplification transistor that outputs a signal based on an electric charge generated in the photoelectric conversion unit, and a selection transistor that connects a source of the amplification transistor and an output line. The connection transistor includes two nodes, a conducting state between the two nodes being controlled by a signal supplied to a gate of the connection transistor. One of the two nodes is connected to the source of the amplification transistor of a first pixel included in the plurality of pixels. The other is connected to the source of the amplification transistor of a second pixel included in the plurality of pixels.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: March 24, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hideo Kobayashi
  • Patent number: 10602088
    Abstract: A solid-state imaging device includes a plurality of pixels and a pixel control circuit. The pixel control circuit is configured to control the signal transfer circuit so that an imaging operation is performed simultaneously in the plurality of pixel group units and a plurality of imaging operations are performed in each of the plurality of pixel group units. In each of the plurality of imaging operations, an imaging signal output from at least one of two or more photoelectric conversion elements included in each of the plurality of pixel group units is transferred to one of two or more memories included in each of the plurality of pixel group units. Each of the two or more memories included in each of the plurality of pixel group units holds the imaging signal in a predetermined order.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: March 24, 2020
    Assignee: OLYMPUS CORPORATION
    Inventor: Yuichi Gomi
  • Patent number: 10574927
    Abstract: An analog-to-digital converter is provided. The analog-to-digital converter is configured to convert an analog signal to a digital signal. The analog-to-digital converter includes a comparison circuit and a processing circuit. The comparison circuit is configured to compare the analog signal with each of a ramp signal and the ramp signal plus a predetermined offset to generate a control signal. The processing circuit, coupled to the comparison circuit, is configured to selectively store a count value of a counter circuit as the digital signal according to the control signal. When the control signal indicates that a signal level of the analog signal is greater than a signal level of the ramp signal and less than the signal level of the ramp signal plus the predetermined offset, the processing circuit is configured to store the count value as the digital signal.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: February 25, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Hsin-Lun Li
  • Patent number: 10574925
    Abstract: A comparator in an AD conversion part, under the control of a reading part, performs a first comparison processing outputting a digitized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to FD1 in an integration period and performs a second comparison processing outputting a digitized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the FD1 after a transfer period after the integration period, and a signal processing part performs combinational processing applying FWC information and joining a first AD conversion transfer curve TC1 corresponding to the first comparison processing and a second AD conversion transfer curve TC2 corresponding to the second comparison processing. Thus, it is possible to smoothly switch (connect) a plurality of signals to be combined and to suppress deterioration of an image.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: February 25, 2020
    Assignee: BRILLNICS INC.
    Inventor: Toshinori Otaka
  • Patent number: 10573676
    Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: February 25, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung Bin Yun, Eun Sub Shim, Kyung Ho Lee, Sung Ho Choi, Jung Hoon Park, Jung Wook Lim, Min Ji Jung
  • Patent number: 10574928
    Abstract: To reduce influence occurring between signals simultaneously outputted from two pixels of the same pixel column via mutually different signal lines as much as possible. A solid-state imaging element including: a pixel column in which a plurality of pixels are juxtaposed in a column form; three or more juxtaposed signal lines each used for an output of a pixel included in the pixel column; and an A/D conversion section configured to convert an analog voltage outputted by the pixel to the signal line to a digital value.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 25, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Norihiro Nikai, Yuusuke Nishida, Hayato Gouji
  • Patent number: 10567690
    Abstract: A capacitance of a first line which transmits a ramp signal having a potential changed by a first changing amount is controlled to be larger than a capacitance of a second line which transmits a ramp signal having a potential changed by a second changing amount which is larger than the first changing amount.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: February 18, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hideo Kobayashi
  • Patent number: 10567679
    Abstract: A dynamic vision sensor (DVS) or change detection sensor reacts to changes in light intensity and in this way monitors how a scene changes. This disclosure covers both single pixel and array architectures. The DVS may contain one pixel or 2-dimensional or 1-dimensional array of pixels. The change of intensities registered by pixels are compared, and pixel addresses where the change is positive or negative are recorded and processed. Analyzing frames based on just three values for pixels, increase, decrease or unchanged, the proposed DVS can process visual information much faster than traditional computer vision systems, which correlate multi-bit color or gray level pixel values between successive frames.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: February 18, 2020
    Assignee: INSIGHTNESS AG
    Inventors: Raphael Berner, Christian Brändli
  • Patent number: 10560078
    Abstract: Provided is an electronic device including a ramp signal generation circuit configured to generate a ramp signal having a second slope that is greater by a first level than a first slope which corresponds to an analog gain, and a slope correction circuit configured to correct the second slope of the ramp signal by the first level to obtain the first slope.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: February 11, 2020
    Assignee: SK hynix Inc.
    Inventor: Jeong-Eun Song
  • Patent number: 10554876
    Abstract: The present technology relates to an image sensor and an electronic apparatus which enable higher-quality images to be obtained. Provided is an image sensor including a plurality of pixels, each pixel including one on-chip lens, and a plurality of photoelectric conversion layers formed below the on-chip lens. Each of at least two of the plurality of photoelectric conversion layers is split, partially formed, or partially shielded from light with respect to a light-receiving surface. The pixels are phase difference detection pixels for performing AF by phase difference detection or imaging pixels for generating an image. The present technology can be applied to a CMOS image sensor, for example.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: February 4, 2020
    Assignee: Sony Corporation
    Inventor: Masashi Nakata
  • Patent number: 10554178
    Abstract: In a preamplifier (amplifier) for the radiation detector, an interconnection layer connected to the bonding pad forms one electrode of a feedback capacitor. Since there is no wiring for connecting the bonding pad and capacitor, a parasitic capacitance caused by the wiring will not be generated. Moreover, the capacitor is arranged below the bonding pad with a conductive layer serving as the other electrode, so that the feedback capacitance of the capacitor is included in the parasitic capacitance between the interconnection layer and the substrate. Compared to the conventional case, an amount of capacitance corresponding to the parasitic capacitance caused by wiring and the feedback capacitance for the capacitor is reduced from the input capacitance. Thus, the input capacitance for the amplifying circuit is reduced.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: February 4, 2020
    Assignees: HORIBA, LTD., POLITECNICO DI MILANO
    Inventors: Carlo Fiorini, Luca Bombelli
  • Patent number: 10545895
    Abstract: Embodiments described herein relate to circuits and techniques for interfacing a microprocessor with memory devices, particularly memory devices such as DDR SDRAM in accordance with protocols such as DDR4 and DDR5. Some embodiments particularly relate to a receiver architecture for a DDR memory interface device that provides AC coupling to memory and includes auto-zeroing functionality. These and other embodiments incorporate equalization functionality such as decision feedback equalization and continuous time linear equalization.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: January 28, 2020
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Aaron Willey, Hari Anand Ravi, H. Md. Shuaeb Fazeel, Thomas Evan Wilson, Moo Sung Chae
  • Patent number: 10537234
    Abstract: Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: January 21, 2020
    Assignee: DePuy Synthes Products, Inc.
    Inventor: Laurent Blanquart
  • Patent number: 10536675
    Abstract: An image capturing apparatus is provided. The apparatus comprises a pixel array, a signal generator that generates a comparison signal whose electric potential changes with time and a converter that converts a pixel signal into a digital signal. The comparison signal starts to change from a first electric potential in accordance with a start of the conversion of the pixel signal by the converter, and changes again, in accordance with inversion of a magnitude relationship between the pixel signal and the comparison signal, from a third electric potential between the first electric potential and a second electric potential at which the magnitude relationship is inverted. The converter includes a counter that holds, as a signal value, a count value obtained by counting from the start of the conversion of the pixel signal until the inversion of the magnitude relationship.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: January 14, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Satoshi Kumaki
  • Patent number: 10536653
    Abstract: A solid-state imaging device includes a photoelectric converter including a photoelectric conversion film, a first electrode arranged on one surface side of the photoelectric conversion film, and a plurality of second electrodes arranged on the other surface side of the photoelectric conversion film, a plurality of charge accumulation portions each connected to corresponding one of the plurality of second electrodes, an output unit that outputs a plurality of signals each corresponding to an amount of charges accumulated in each of the plurality of charge accumulation portions, and a control unit that individually controls a drive voltage applied to each of the plurality of second electrodes. The control unit controls the drive voltage applied to each of the second electrodes such that, in an accumulation period of charges of one frame, each of the second electrodes sequentially becomes the lowest potential relative to the charges of the second electrodes.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: January 14, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hajime Ikeda, Takahiro Yamasaki
  • Patent number: 10535700
    Abstract: A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: January 14, 2020
    Assignee: Sony Corporation
    Inventors: Taku Umebayashi, Keiji Tatani, Hajime Inoue, Ryuichi Kanamura
  • Patent number: 10531036
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: January 7, 2020
    Assignee: Sony Corporation
    Inventors: Koji Ogawa, Yusuke Oike
  • Patent number: 10514526
    Abstract: An image sensor includes a pixel portion in which a plurality of unit pixels each having one micro lens and a plurality of photoelectric conversion portions are arrayed in a matrix, a signal readout portion that reads out signals accumulated in the photoelectric conversion portions and converts the read signals to digital signals, a signal processor that processes signals read out by the signal readout portion and has an image capture signal processor that performs signal processing for generating a captured image on signals read out by the signal readout portion and a focus detection signal processor that performs signal processing for focus detection on signals read out by the signal readout portion, and an output portion that outputs signals processed by the signal processor.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: December 24, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mie Ishii, Ken Sasaki