Including Switching Transistor And Photocell At Each Pixel Site (e.g., "mos-type" Image Sensor) Patents (Class 348/308)
  • Patent number: 10262180
    Abstract: A fingerprint identification circuit includes a plurality of fingerprint identification units arranged in an array form. Each fingerprint identification unit includes: an input module configured to apply a detection signal to a sensing module; the sensing module configured to sense a fingerprint and transmit a sensing signal to a source follower; the source follower configured to amplify the sensing signal and output it to an output module; an output control module configured to apply an operating voltage for the source follower to the source follower; the output module configured to output the amplified sensing signal; a resetting module configured to reset an output end of the source follower and an input end of the output module to be at a first level; and an acquisition module configured to enable the input end and an operating voltage input end of the source follower to be electrically connected to each other.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: April 16, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xiaoxiang He
  • Patent number: 10264200
    Abstract: An example apparatus for random sampling for horizontal noise reduction includes readout circuitry coupled to receive image data from an array of pixels, the readout circuitry including a plurality of sample and hold (S&H) circuits coupled to respective ones of a plurality of bitlines to sample and hold the image data in response to a plurality of S&H control signals, each of the plurality of S&H circuits including an S&H capacitor and an S&H switch. The S&H capacitor samples and holds respective image data, and the S&H switch coupled between a respective bitline and the respective S&H capacitor, and further coupled to receive a respective one of the plurality of S&H control signals to open/close the S&H switch, where each of the plurality of S&H switches are opened to decouple their respective S&H capacitors from the respective bitlines at a different time.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: April 16, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventor: Robert Johansson
  • Patent number: 10264155
    Abstract: A wireless communication apparatus includes a memory device in which data associated with a storage device are stored, wherein the data is acquired through a wireless communication; an image capturing device; a display; and a controller configured to: identify an external storage device corresponding to a code captured by the image capturing device, responsive to identification of the external storage device, generate a display image from the data stored in the memory device if the data stored in the memory device are associated with the identified external storage device, and control the display to display a display image, wherein the data stored in the memory device include thumbnail image data of image data stored in the external storage device, and the display image includes one or more thumbnail images that are generated from the thumbnail image data.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: April 16, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Keisuke Sato
  • Patent number: 10257457
    Abstract: Provided is a solid-state imaging device capable of increasing the speed of an A/D converter. The solid-state imaging device includes a successive approximation A/D converter that performs A/D conversion on an analog pixel signal. The successive approximation A/D converter includes a D/A converter, a comparator, and a successive approximation register. The D/A converter converts a digital reference signal to an analog reference signal. The successive approximation register operates based on the result of comparison by the comparator to generate the digital reference signal in such a manner that the analog reference signal approximates the analog pixel signal. The D/A converter includes a split capacitor, first capacitors, second capacitors, a switch array, a third capacitor, and a multiplexer. The first capacitors each have a first electrode coupled to the output node. The second capacitors are coupled to a second electrode of the split capacitor.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 9, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Osamu Matsumoto, Fukashi Morishita
  • Patent number: 10257446
    Abstract: In a solid-state imaging device, a first substrate has a plurality of pixels and a plurality of first control signal lines. The plurality of first control signal lines are connected to pixels of each row. The second substrate includes a plurality of second control signal lines and a control circuit. The arrangement of each of the plurality of second control signal lines on the second substrate corresponds to the arrangement of a corresponding one of the plurality of first control signal lines on the first substrate. The connection portion has a plurality of control connections and a plurality of readout connections. Each of the plurality of control connections is connected to one of the plurality of first control signal lines and a corresponding one of the plurality of second control signal lines.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: April 9, 2019
    Assignee: OLYMPUS CORPORATION
    Inventor: Kenji Kobayashi
  • Patent number: 10250814
    Abstract: An image signal processor apparatus according to an embodiment is provided with a first image signal processor apparatus configured to receive first image data as input and a second image signal processor apparatus configured to receive second image data as input, in which the second image signal processor apparatus, using a first signal that the first image signal processor apparatus uses for first image processing to adjust pixel values of the first image data, performs the first image processing to adjust pixel values of the second image data.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: April 2, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takanori Tamai
  • Patent number: 10240910
    Abstract: Systems and methods for compressive image sensor techniques based on sparse measurement matrices are disclosed. A method to perform compressive sensing (CS) measurement operations for image sensors limits pixel summation to be within neighboring pixels and hence dramatically simplifies CS image sensor circuits and reduces their power consumption while providing better image quality compared to conventional random measurement matrix based methods. A sparse measurement matrix is applied to pixel data to generate a desired number of summation groups, each summation group consisting of outputs from an equal number of pixel cells. Each pair of summation groups contains the same number of shared outputs from pixel cells. From the summation groups, an image captured by the pixel cells is recovered.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: March 26, 2019
    Assignee: Board of Trustees of Southern Illinois University on Behalf of Southern Illinois University Carbondale
    Inventors: Stefan Leitner, Haibo Wang, Spyros Tragoudas
  • Patent number: 10229943
    Abstract: There is provided a method and system for pixel-wise imaging of a scene. The method including: receiving a pixel-wise pattern, the pixel-wise pattern including a masking value for each pixel in an array of pixels of an image sensor; producing an electronic signal at each pixel when such pixel is exposed to light received from the scene; and directing the electronic signal at each pixel to one or more collection nodes associated with such pixel based on the respective masking value, the one or more collection nodes each capable of integrating the received electronic signal.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: March 12, 2019
    Inventors: Roman Genov, Kiriakos Neoklis Kutulakos, Navid Sarhangnejad, Nikola Katic, Mian Wei
  • Patent number: 10230915
    Abstract: An image capturing apparatus includes a comparison circuit unit including a first comparator and a second comparator. The second comparator is kept in a non-operating state until the signal level of a first comparison result signal from the first comparator changes and is brought into an operating state in correspondence with a change in the signal level of the first comparison result signal.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: March 12, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yu Maehashi
  • Patent number: 10225497
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device for suppressing deterioration of pixel characteristics while guaranteeing the operating range of VSLs. A solid-state imaging device according to a first aspect of this disclosure has multiple pixel sharing units each including multiple photoelectric conversion sections each configured to correspond to a pixel, an accumulation section configured to be shared by the plurality of photoelectric conversion sections and to accumulate charges generated thereby, and multiple transistors configured to control reading of the charges accumulated in the accumulation section. The plurality of transistors in each pixel sharing unit are arranged symmetrically. The plurality of transistors include a transistor that functions as a switch to change conversion efficiency. The present disclosure may be applied to back-illuminated CMOS image sensors, for example.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: March 5, 2019
    Assignee: Sony Corporation
    Inventors: Takuya Sano, Toshifumi Wakano
  • Patent number: 10218928
    Abstract: There is provided an image capturing apparatus capable of controlling focus detecting pixels independently of the remaining image capturing pixels while maintaining the sensitivity of an image sensor and obtaining high image quality. The image capturing apparatus includes a first semiconductor chip, and a second semiconductor chip stacked on the first semiconductor chip. On the first semiconductor chip, the light receiving sections of a first pixel group and second pixel group, and a first pixel driving circuit configured to drive the pixels of the first pixel group are arranged. On the second semiconductor chip, a second pixel driving circuit configured to drive the pixels of the second pixel group is arranged.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: February 26, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mineo Uchida
  • Patent number: 10212369
    Abstract: The present solid-state imaging apparatus includes: a light receiving element with a photoelectric conversion function; a readout circuit that reads out pixel information from the light receiving element, and outputs an output voltage; a CDS circuit that is composed of three-stage common source circuits, and generates a pixel signal based on a difference between an output voltage output from the readout circuit at the time of reset and an output voltage output based on the readout of the pixel information, the three-stage common source circuits being connected in series to one another and provided with direct-current cut elements that are each disposed on a corresponding one of input paths of the three-stage common source circuits; and a bias voltage supply circuit that supplies a direct-current bias voltage to gates of transistors of the three-stage common source circuits.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: February 19, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Shinichi Sekita, Naoki Nomura
  • Patent number: 10205903
    Abstract: A device comprising a pixel and a readout circuit, wherein the pixel is coupled to the readout circuit; wherein the readout circuit comprises a current control circuit and a comparator; wherein the current control circuit is configured to (a) charge the current control circuit to a pixel affected charge using at least a pixel affected current that is indicative of an electrical parameter of the pixel and (b) drain, based on the pixel affected charge, a current control circuit current during a comparison period; wherein the comparator is configured to compare, during the comparison period, between a pixel affected voltage and a reference signal that changes during the comparison period and to provide at least one pulse that has is indicative of a value of the pixel affected voltage.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 12, 2019
    Assignee: ANALOG VALUE LTD.
    Inventors: Vladimir Koifman, Tiberiu Galambos, Anatoli Mordakhay
  • Patent number: 10199410
    Abstract: There is provided a method and system for pixel-wise imaging of a scene. The method including: receiving a pixel-wise pattern, the pixel-wise pattern including a masking value for each pixel in an array of pixels of an image sensor; producing an electronic signal at each pixel when such pixel is exposed to light received from the scene; and directing the electronic signal at each pixel to one or more collection nodes associated with such pixel based on the respective masking value, the one or more collection nodes each capable of integrating the received electronic signal.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: February 5, 2019
    Inventors: Roman Genov, Kiriakos Neoklis Kutulakos, Navid Sarhangnejad, Nikola Katic, Mian Wei
  • Patent number: 10199089
    Abstract: A memory stack comprises at least two memory components. The memory components have a first data link interface and are to transmit signals on a data link coupled to the first data link interface at a first voltage level. A buffer component has a second data link interface coupled to the data link. The buffer component is to receive signals on the second data link interface at the first voltage level. A level shifting latch produces a second voltage level in response to receiving the signals at the second data link interface, where the second voltage level is higher than the first voltage level.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: February 5, 2019
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, John Eric Linstadt, Thomas Vogelsang
  • Patent number: 10186532
    Abstract: An image device transfers charges of a previous frame from the holding units to the amplification units, during a read-out period of each frame, the read-out period includes a period in which a plurality of overflow transistors are in an on-state and a first period in which a plurality of photoelectric conversion units accumulate charges, and, during a second period following the first period, the plurality of photoelectric conversion units of the plurality of pixels accumulate charges while the plurality of holding units of the plurality of pixels hold the charges accumulated during the first period. During the first and second periods, each of the plurality of pixels performs a plurality of times of charge transfers from the photoelectric conversion unit to the holding unit. The plurality of times of charge transfers including a charge transfer performed at the end of the second period.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: January 22, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Takeshi Ichikawa, Yusuke Onuki, Masaaki Minowa, Kazunari Kawabata, Hiroshi Sekine
  • Patent number: 10177192
    Abstract: An image sensor is provides. The image sensor may include first and second photodiodes, a first color filter shared by the first and the second photodiodes, and first and second floating diffusion regions coupled to the first and the second photodiodes, respectively.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: January 8, 2019
    Assignee: SK Hynix Inc.
    Inventor: Won-Jun Lee
  • Patent number: 10157958
    Abstract: A method includes bonding a Backside Illumination (BSI) image sensor chip to a device chip, forming a first via in the BSI image sensor chip to connect to a first integrated circuit device in the BSI image sensor chip, forming a second via penetrating through the BSI image sensor chip to connect to a second integrated circuit device in the device chip, and forming a metal pad to connect the first via to the second via.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Feng-Chi Hung, Dun-Nian Yaung, Jen-Cheng Liu, Szu-Ying Chen, Wen-De Wang, Tzu-Hsuan Hsu
  • Patent number: 10158371
    Abstract: A conditional correlated multiple sampling (CCMS) single slope (SS) analog-to-digital converter (ADC) is provided. The CCMS SS ADC includes a comparator, arranged to compare an analog signal with a ramp signal and generate a comparison result; and a CCMS control circuit, arranged to determine a swing of the ramp signal according to a magnitude of the analog signal. An image sensor system using the CCMS SS ADC and a method of CCMS SS analog-to-digital conversion are also disclosed.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shang-Fu Yeh, Kuo-Yu Chou
  • Patent number: 10129496
    Abstract: An imaging device includes an imaging unit, a reference signal generation unit, m (m is an integer of 3 or more) number of column delay units, and a plurality of column AD conversion units. The plurality of column delay units is arranged so as to correspond to two or more and less than m of the column AD conversion units. Each of the plurality of column delay units includes a first delay circuit. The first delay circuit generates a plurality of first delay clocks. The column AD conversion unit includes a comparison unit, a latch unit, and a counter unit. The comparison unit compares a pixel signal with a reference signal, and outputs a control signal corresponding to a comparison result. The latch unit includes a plurality of latch circuits that latches the plurality of first delay clocks on the basis of a state change of the control signal.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: November 13, 2018
    Assignee: OLYMPUS CORPORATION
    Inventor: Yoshio Hagihara
  • Patent number: 10128301
    Abstract: A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 13, 2018
    Assignee: Sony Corporation
    Inventors: Taku Umebayashi, Keiji Tatani, Hajime Inoue, Ryuichi Kanamura
  • Patent number: 10128295
    Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: November 13, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
  • Patent number: 10116887
    Abstract: A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of unit power supply circuits that generate a second power supply voltage from a first power supply voltage based on a reference voltage and supply the second power supply voltage to amplifier transistors provided in the plurality of pixel circuits; and a regulator circuit that generates the reference voltage that is constant. Each of the unit power supply circuits is provided for a corresponding one of the columns of the plurality of pixel circuits or for a corresponding one of the pixel circuits, and supplies the second power supply voltage to the amplifier transistors in the pixel circuits that belong to the corresponding one of the columns or to the amplifier transistor in the corresponding one of the pixel circuits.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: October 30, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Ikuma, Masaru Kato
  • Patent number: 10110835
    Abstract: An imaging apparatus includes a plurality of groups one of a part of which has a capacitance changing unit configured to change a capacitance value of an input node.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: October 23, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Onuki, Masahiro Kobayashi, Kazunari Kawabata, Hiroshi Sekine
  • Patent number: 10110783
    Abstract: Image sensors with precharge boost are disclosed herein. An example image sensor may include pixels that each include a photodiode to receive image light and produce image charge in response, a floating diffusion to receive the image charge, a transfer gate to couple the photodiode to the floating diffusion in response to a transfer control signal, a reset gate to couple a reset voltage to the floating diffusion in response to a reset control signal, and a boost capacitor coupled between the floating diffusion and a boost voltage source, wherein, during a precharge operation, the boost voltage is provided to the boost capacitor for a portion of time the transfer gate is enabled and while the reset gate is disabled.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: October 23, 2018
    Assignee: OmniVision Technologies, Inc.
    Inventor: Eric A. G. Webster
  • Patent number: 10110839
    Abstract: An image sensor may have an array of pixels that include nested sub-pixels that each have at least one respective photodiode. An inner sub-pixel of a pixel with nested sub-pixels may have a relatively lower effective light collecting area compared to an outer sub-pixel of the pixel within which the inner sub-pixel is nested. A pixel circuit for the nested sub-pixels may include an overflow capacitor and/or a coupled gate circuit used to route charges from the photodiode in the inner sub-pixel. The lower light collecting area of the photodiode in the inner sub-pixel, with optional flicker mitigation charge routing from the coupled gates structure, may reduce the size of the capacitors required to capture photodiode and photodiode overflow charge responses. Flicker mitigation charge routing using a coupled gates structure may allow an adjustable proportion of the overflow charge to be stored in one or more storage capacitors.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: October 23, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Marko Mlinar, Tomas Geurts, Manuel Innocent
  • Patent number: 10104307
    Abstract: Methods and digital imaging devices disclosed herein are adapted to capture images of a specimen in a chemical reaction using a series of short exposures of light emissions from the specimen over a period of time. The series of short exposures is captured using an array of pixels of an image sensor in the digital imaging device that are configured for performing continuous non-destructive read operations to read out a set of non-destructive read images of the specimen from the pixel array. In one embodiment, images are captured by delaying the read out until at or near the end of the chemical reaction to reduce read noise in the images. The signals read out from the image sensor can be continuously monitored and the capturing of images can be discontinued either automatically or based on a command from a user. The captured images can then be displayed in a graphical display.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: October 16, 2018
    Assignee: Bio-Rad Laboratories, Inc.
    Inventors: Steve Swihart, Evan Thrush, Boaz Ran
  • Patent number: 10103187
    Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a plurality of transfer transistors. Individual transfer transistors in the plurality of transfer transistors are coupled to individual photodiodes in the plurality of photodiodes. A floating diffusion is also coupled to the plurality of transfer transistors to receive image charge from the plurality of photodiodes. The floating diffusion is coupled to receive a preset voltage, and the preset voltage is substantially equal a dark condition steady-state read voltage.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: October 16, 2018
    Assignee: OmniVision Technologies, Inc.
    Inventors: Qingfei Chen, Qingwei Shan, Chin-Chang Pai
  • Patent number: 10091446
    Abstract: An exemplary active-matrix system comprises a system substrate with pixel elements disposed in pixel rows and pixel columns, pixel circuits each controlling two or more of the pixel elements, and row and column lines, at least one of each of which is electrically connected to each pixel circuit. The number of row lines is less than the number of pixel rows, the number of column lines is less than the number of pixel columns, or the number of row lines is less than the number of pixel rows and the number of column lines is less than the number of pixel columns.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: October 2, 2018
    Assignee: X-Celeprint Limited
    Inventors: Ronald S. Cok, Christopher Andrew Bower
  • Patent number: 10084006
    Abstract: Provided are an optical receiver that can realize a reduction in the variation of sensitivity in the ultraviolet light region and a reduction in noise in the visible light region and the infrared light region, a portable electronic device, and a method of producing an optical receiver. The first light-receiving device (PD1) and the second light-receiving device (PD2) of the optical receiver (1) are each constituted by forming a second conductivity-type N-type well layer (N_well) on a first conductivity-type P-type substrate (P_sub), forming a first conductivity-type P-type well layer (P_well) in the N-type well layer (N_well), and forming a second conductivity-type N-type diffusion layer (N) in the P-type well layer (P_well). The P-type substrate P_sub, the N-type well layer (N_well), and the P-type well layer (P_well) are electrically at the same potential or are short-circuited.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: September 25, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaaki Uchihashi, Kazuhiro Natsuaki, Masayo Uchida, Takahiro Takimoto
  • Patent number: 10084982
    Abstract: An image sensor and an image processing system including the same are provided. The image sensor includes a pixel array including a plurality of pixels each connected to one of first through m-th column lines to output a pixel signal, where “m” is an integer of at least 2; analog-to-digital converters each configured to receive the pixel signal corresponding to one of the first through m-th column lines, to compare the pixel signal with a ramp signal, and to convert the pixel signal to a digital pixel signal; and a blocking circuit connected to an input terminal of at least one of the analog-to-digital converters to block an influence of an operation of others among the analog-to-digital converters.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: September 25, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae Hong Kim, Seung Hyun Lim, Han Kook Cho, Dong Hun Lee, Seog Heon Ham
  • Patent number: 10079991
    Abstract: An imaging apparatus includes: a light reception unit that receives a light emission signal from a transmission apparatus via a pixel; a detection unit that detects whether or not an output based on the light emission signal received by the light reception unit is a first threshold value or more; and a correction unit that corrects a luminance of the pixel when the output based on the light emission signal is the first threshold value or more based on a result detected by the detection unit.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: September 18, 2018
    Assignee: HONDA MOTOR CO., LTD.
    Inventor: Chiaki Aoyama
  • Patent number: 10070091
    Abstract: An image processing apparatus having a plurality of Bayer arrays each including 4 pixels sharing a common electrode connected to a vertical signal line wherein: each of the pixels has a pixel electrode connected to a horizontal signal line; and the location of each of the horizontal signal lines and the location of each of the pixel electrodes each connected to one of the horizontal signal lines are determined so that the locations in a neighboring Bayer array are a mirror image of counterpart locations in another Bayer array adjacent to the neighboring Bayer array.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: September 4, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Kenichi Okumura
  • Patent number: 10066996
    Abstract: A measuring device includes a first light receiving element that receives measurement light and outputs a first output value, and a second light receiving element that receives the measurement light and outputs a second output value which is different from the first output value. A weighted composition is performed on the first output value and the second output value.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: September 4, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Danjun Zhao, Masanobu Kobayashi
  • Patent number: 10068941
    Abstract: An insulating liner layer has an extra-pixel removal region located outside a pixel region in a region of a vertical angle of at least one of four corners of the pixel region and having the insulating liner layer removed therefrom.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: September 4, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yotaro Goto
  • Patent number: 10062725
    Abstract: The invention concerns active-pixel electronic image sensors. The pixel comprises a photodiode (PH) designed in a semiconductor active layer (12) and maintained at a nil reference potential, and above the active layer an anti-blooming gate (G5) adjacent on one side to the photodiode and on another side to an evacuation drain (22). The sensor comprises means for applying to the anti-blooming gate, during most of the duration of integration, a blocking potential creating beneath the gate a potential barrier of a first height, and, during a series of brief pulses over the duration of integration, an anti-blooming potential creating a potential barrier of a second height, lower than the first. The fact of only applying the anti-blooming voltage during the brief pulses reduces the dark noise induced by tunneling effect by the electric field between gate and photodiode.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: August 28, 2018
    Assignee: TELEDYNE E2V SEMICONDUCTORS SAS
    Inventors: Frédéric Barbier, Frédéric Mayer
  • Patent number: 10057526
    Abstract: A pixel circuit including a photodiode, a first storage capacitor and a second storage capacitor is provided. The first storage capacitor discharges to a first output voltage in a first exposure time and to a third output voltage in a third exposure time. The second storage capacitor discharges to a second output voltage in a second exposure time and to a fourth output voltage in a fourth exposure time. The first and second exposure times are included in a first frame period. The third and fourth exposure times are included in a second frame period. The second frame period is a next frame period of the first frame period. In the first frame period, the first exposure time is subsequent to the second exposure time. In the second frame period, the third exposure time is prior to the fourth exposure time.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: August 21, 2018
    Assignee: PIXART IMAGING INC.
    Inventors: Kwai-Lee Pang, Swee-Lin Thor
  • Patent number: 10057517
    Abstract: An analog-digital converting device includes a comparison block generating at least one first comparison signal by comparing pixel signals with each other, and for generating second comparison signals by comparing each of the plurality of pixel signals with a ramp signal through a single ramping operation; a feedback control unit determining a data conversion sequence according to the at least one first comparison signal received from the comparison block, and outputting a control signal according to the determined data conversion sequence; a selection block selecting two of the plurality of the pixel signals or at least one of the plurality of the pixel signals and the ramp signal to be applied to the comparison block according to the control signal received from the feedback control unit; and a data conversion unit performing a data conversion on the plurality of pixel signals based on the second comparison signal.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: August 21, 2018
    Assignee: SK Hynix Inc.
    Inventor: Tae-Gyu Kim
  • Patent number: 10051216
    Abstract: The present invention relates to an imaging apparatus, including a pixel array comprising a plurality of pixels arranged in rows and columns, wherein at least one of the pixels comprises a capacitor configured to store a reset signal and a pixel signal; and a plurality of column circuits, wherein at least one of the column circuits reads the reset signal and the pixel signal from the capacitor respectively, and generates the difference between the reset signal and the pixel signal, the generation of the pixel signal being later than that of the reset signal.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: August 14, 2018
    Assignee: SmartSens Technology (US) Inc.
    Inventors: Chen Xu, Zexu Shao
  • Patent number: 10044934
    Abstract: The invention relates to a method for capturing an image in an image sensor with a matrix of rows and columns of active pixels, powered between a first power supply terminal at zero potential (Vss) and a second power supply terminal at a positive power supply potential (Vdd). Each pixel comprises a photodiode and a gate for transferring the photogenerated charges to a charge storage node. A negative potential (VNEG) is applied to the transfer gate by a charge pump during the charge integration time and it receives a transfer control signal (TRA) common to all the pixels during a transfer time window.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: August 7, 2018
    Assignee: TELEDYNE E2V SEMICONDUCTORS SAS
    Inventor: Frédéric Barbier
  • Patent number: 10044965
    Abstract: A method for image capture of a Thin Film Transistor (TFT) flat-panel image sensor is provided. The method for image capture includes: driving one of the plurality of scanning lines within a driving time; and collecting signals from the plurality of data lines by the signal readout chip periodically with a first period as a signal capture period; where the first period have a same time duration with the driving time, an end time point of an m-th first period coincides with a start time point of an (m+1)-th first period, where m is a positive integer, and an end time point of an n-th driving time coincides with a start time point of an (n+1)-th driving time, where n is a positive integer. The method for image capture can improve stability of the signal readout chip and reduce design difficulty of the entire circuit system.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: August 7, 2018
    Assignee: Shanghai Oxi Technology Co., Ltd
    Inventors: Yan Ling, Hong Zhu
  • Patent number: 10044958
    Abstract: A method includes correcting for at least one of gain and offset during frame integration for photodetector events. Gain and offset correction is performed separately in each pixel of a digital read-out integrated circuit (DROIC) for a plurality of corresponding pixels in a photodetector array. First and second binary counters respectively use a gain register and an offset register to implement gain and offset correction.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: August 7, 2018
    Assignee: Sensors Unlimited, Inc.
    Inventors: John Liobe, Andrew Eckhardt, Joshua Lund
  • Patent number: 10038866
    Abstract: An image sensor including a comparator configured to generate a comparison signal by comparing a ramp signal and a pixel signal with each other, a counter configured to generate a digital pixel value by counting an input clock signal according to the comparison signal, and a divider configured to control a frequency of the input clock signal according to an analog gain of the image sensor.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: July 31, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeok Jong Lee, Sung Ho Suh
  • Patent number: 10033951
    Abstract: An image capturing apparatus includes: a pixel region in which unit pixels corresponding to colors of color filters having a predetermined color arrangement are arranged in a matrix, each unit pixel having a plurality of photoelectric conversion portions; a first readout unit that performs a first readout operation of reading out a signal of at least one of the plurality of photoelectric conversion portions in each unit pixel, and that includes a merging unit for merging signals of a plurality of pixels corresponding to different colors in the predetermined color arrangement in the first readout operation; and a second readout unit that performs a second readout operation of reading out signals of all of the plurality of photoelectric conversion portions in each unit pixel.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: July 24, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideki Ikedo, Hisataka Hirose
  • Patent number: 10033953
    Abstract: Provided is a solid state imaging device including a plurality of pixels, a signal line on which a pixel signal is transmitted, a load transistor having a drain connected to the signal line, a readout circuit that reads out the pixel signal from the signal line, and a control unit that controls a current flowing in the load transistor in accordance with a potential of a control terminal. When a reference potential of the pixel fluctuates relatively to a reference potential of the readout circuit, a potential of the control terminal relative to a potential of a source of the load transistor is changed in a same phase with a fluctuation of the reference potential of the pixel.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: July 24, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masaaki Minowa, Keisuke Ota, Takahiro Yamasaki, Takamasa Sakuragi, Noriyuki Kaifu
  • Patent number: 10021330
    Abstract: In a solid-state image capturing device, one or more vertical signal lines are disposed along one of columns of a pixel portion, and each of the vertical signal lines is divided into two parts between an upper region and a lower region of the pixel portion. Pixel signals output from a plurality of pixels of the one of the columns are read out to a plurality of column readout circuits through two or more parts of the vertical signal lines including the two parts of the one or more vertical signal lines disposed along the one of the columns. A division position of one vertical signal line among the vertical signal lines disposed in the pixel portion is different from a division position of another vertical signal line among the vertical signal lines in a row direction.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: July 10, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hiroshi Kubo, Hirohisa Ohtsuki, Kunihiko Hara
  • Patent number: 10021335
    Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: July 10, 2018
    Assignee: Sony Corporation
    Inventors: Atsumi Niwa, Yosuke Ueno, Shimon Teshima, Daijiro Anai, Yoshinobu Furusawa, Taishin Yoshida, Takahiro Uchimura, Eiji Hirata
  • Patent number: 10012593
    Abstract: In an example implementation, a method includes illuminating a wafer with excitation light having a wavelength and intensity sufficient to induce photoluminescence in the wafer. The method also includes detecting photoluminescence emitted from a portion of the wafer in response to the illumination, and detecting excitation light reflected from the portion of the wafer. The method also includes comparing the photoluminescence emitted from the portion of the wafer and the excitation light reflected from the portion of the wafer, and identifying one or more defects in the wafer based on the comparison.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: July 3, 2018
    Assignee: SEMILAB Semiconductor Physics Laboratory Co., Ltd.
    Inventors: Zoltan Tamas Kiss, Laszlo Dudas, Zsolt Kovacs, Imre Lajtos, Gyorgy Nadudvari, Nicolas Laurent, Lubomir L. Jastrzebski
  • Patent number: 10009561
    Abstract: In a period in which a pixel signal of another pixel is read out from the pixel, a transistor connected to a floating diffusion region of a pixel not performing reading out of a pixel signal from the pixel is turned off.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: June 26, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hiroki Hiyama, Hiroaki Kameyama, Yasuji Ikeda, Kazuhiro Sonoda, Hideo Kobayashi
  • Patent number: 10007195
    Abstract: An apparatus for establishing a tilt angle of at least one mirror of a lithography installation is disclosed. The apparatus includes a pattern generating device (6) for generating a pattern. The apparatus also includes an image acquisition device for acquiring the generated pattern which was reflected by the mirror. The apparatus further includes a comparator device for providing a comparison result in a manner dependent on a comparison of the acquired pattern with a reference pattern. In addition, the apparatus includes an evaluation device for establishing the tilt angle in a manner dependent on the comparison result. The image acquisition device and the comparator device are provided in the same integrated circuit.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 26, 2018
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Jan Horn, Markus Holz, Joerg Specht