Including Switching Transistor And Photocell At Each Pixel Site (e.g., "mos-type" Image Sensor) Patents (Class 348/308)
  • Patent number: 12040336
    Abstract: In some embodiments, the present disclosure relates to method for forming an image sensor integrated chip. The method includes forming a first photodetector region in a substrate and forming a second photodetector region in the substrate. A floating diffusion node is formed in the substrate between the first photodetector region and the second photodetector region. A pick-up well contact region is formed in the substrate. A first line intersects the floating diffusion node and the pick-up well contact region. One or more transistor gates are formed on the substrate. A second line that is perpendicular to the first line intersects the pick-up well contact region and the one or more transistor gates.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: July 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Patent number: 12024181
    Abstract: A vehicular driving assist system includes a forward viewing camera, a forward sensing non-vision sensor, and an electronic control unit (ECU) disposed at a vehicle equipped with the vehicular driving assist system. Captured image data is transferred from the camera to the ECU and processed at the ECU and captured sensor data is transferred from the non-vision sensor to the ECU and processed at the ECU. An object forward of the equipped vehicle is detected via processing at the ECU of transferred image data and via processing at the ECU of transferred sensor data. The ECU determines a difference between detection of the object via processing at the ECU of transferred image data and detection of the object via processing at the ECU of transferred sensor data. The ECU disables at least part of a driving assist function based on the determined difference being greater than a threshold level.
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: July 2, 2024
    Assignee: Magna Electronics Inc.
    Inventors: William J. Chundrlik, Jr., Dominik Raudszus
  • Patent number: 12028632
    Abstract: An image sensor includes an analog-to-digital conversion circuit that receives pixel signals from column lines, respectively, and converts the pixel signals into first pixel values, respectively. Data buffer clusters correspond to enable signals transferred from a timing controller, respectively, and output second pixel values. Each of the data buffer clusters stores first pixel values, which correspond to some column lines consecutively arranged among the column lines, among the first pixel values and output stored pixel values as some second pixel values among the second pixel values in response to a corresponding enable signal. A digital processing circuit performs digital processing on the second pixel values output from the data buffer clusters.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: July 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Inje Jeong, Jaeha Eom, Sujong Jang, Younghun Han
  • Patent number: 12022202
    Abstract: The present application provides an image sensor, a global shutter control method and a computer storage medium. The image sensor includes a pixel array, where the pixel array includes a plurality of columns of pixels, or the pixel array includes a plurality of groups of sub-pixel arrays, each group of sub-pixel arrays including a plurality of columns/rows of pixels; and a processor module which triggers the pixel array on the basis of an instruction. According to the control method, consistency of an average delay of the columns/rows or groups in the pixel array is achieved by dynamic averaging. In addition, the consistency cannot be affected by external conditions such as a process, a power supply or the temperature. A high instantaneous current caused by using a global shutter manner is avoided, and at the same time, there is no need for a digital processor to perform column-by-column or row-by-row correction at a back end after exposure is not required, so as to reduce hardware cost and test cost.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: June 25, 2024
    Assignee: SHANGHAI JUYOU SMART INTELLIGENCE TECHNOLOGY CO., LTD
    Inventors: Dan Li, Yang Pan
  • Patent number: 12021108
    Abstract: A photoelectric conversion apparatus includes a first and a second multilayer wiring layer. The first or the second multilayer wiring layer is provided with a first electrode supplied with a first voltage from an outside of the photoelectric conversion apparatus. The first electrode is not connected with a second semiconductor layer.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: June 25, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Junji Iwata
  • Patent number: 12005890
    Abstract: A failure detection circuit for an image sensor includes a first input node, an array of second input nodes, and an output stage. The first input node is coupled to a reference voltage. The array of second input nodes has each input node coupled to receive a signal from a bitline of a bitline array in an image sensor that includes an array of pixels with each pixel is coupled to at least one bitline of the bitline array. The output stage is coupled to generate an output voltage indicative of any of the second input nodes being lower than the reference voltage.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: June 11, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Zhenfu Tian, Liang Zuo, Yan Li, Wen He, Satoshi Sakurai
  • Patent number: 12003873
    Abstract: A first and second pixel units that perform FD addition are provided. The first pixel unit includes: a first switch transistor of which one source/drain electrode is connected to an FD; and a reset transistor that is connected between another source/drain electrode of the first switch transistor and a power supply node. The second pixel unit includes: a second switch transistor of which one source/drain electrode is connected to an FD; a third switch transistor of which one source/drain electrode is connected to another source/drain electrode of the second switch transistor; and a capacitive element that is connected between another source/drain electrode of the third switch transistor and a reference potential node. The respective other source/drain electrodes of the first switch transistor and the second switch transistor are electrically connected with each other.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Luonghung Asakura
  • Patent number: 11997408
    Abstract: An image sensor for electronic cameras has a plurality of pixels for generating exposure-dependent signals, wherein a respective pixel at least comprises at least one light-sensitive element; a readout node; a transfer gate; a converter transistor; and a selection switch that is connected to a signal output of the converter transistor to selectively couple the signal output to a column line of the image sensor. The column line is coupled or can be coupled to a negative input of an associated column amplifier via an input capacitor, wherein an amplifier output of the column amplifier is connected to a column readout circuit and to a compensation line. The compensation line is coupled via a respective feedback capacitor to the respective readout node of the associated pixels.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: May 28, 2024
    Assignee: Arnold & Richter Cine Technik GmbH & Co. Betriebs KG
    Inventor: Michael Cieslinski
  • Patent number: 11997403
    Abstract: An image sensor including: a pixel array including a plurality of pixels and a row driver configured to drive the pixel array, wherein each of the plurality of pixels includes at least one photodiode, a transmission transistor, a selection transistor, a device isolation structure, and a bulk area, and the row driver is configured to adjust, for each of preset periods, sizes and application timings of a negative voltage applied to the device isolation structure and a bulk control voltage applied to the bulk area while a first pixel is driven.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: May 28, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Taesub Jung, Kyungho Lee
  • Patent number: 11986160
    Abstract: Pulsed hyperspectral imaging without input clock or data transmission clock is disclosed. A system includes an emitter for emitting pulses of electromagnetic radiation and an image sensor comprising a pixel array for sensing reflected electromagnetic radiation. The system includes a plurality of bidirectional data pads and a controller in communication with the image sensor. The system is such that at least a portion of the pulses of electromagnetic radiation emitted by the emitter comprises one or more of: electromagnetic radiation having a wavelength from about 513 nm to about 545 nm; electromagnetic radiation having a wavelength from about 565 nm to about 585 nm; or electromagnetic radiation having a wavelength from about 900 nm to about 1000 nm.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 21, 2024
    Assignee: Cllag GmbH International
    Inventors: Joshua D. Talbert, Donald M. Wichern
  • Patent number: 11984519
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, an isolation structure may be formed in a ring around the SPAD. The isolation structure may be a hybrid isolation structure with both a metal filler that absorbs light and a low-index filler that reflects light. The isolation structure may be formed as a single trench or may include a backside deep trench isolation portion and a front side deep trench isolation portion. The isolation structure may also include a color filtering material.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: May 14, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Allen Sulfridge
  • Patent number: 11985437
    Abstract: A time-of-flight pixel array includes photodiodes that generate charge in response to incident reflected modulated light. First transfer transistors transfer a first portion of the charge from the photodiodes in response to a first modulation signal and second transfer transistors transfer a second portion of the charge from the photodiodes in response to a second modulation signal, which is an inverted first modulation signal. First floating diffusions are coupled to the first transfer transistors. A binning transistor is coupled between one of the first floating diffusions and another one of the first floating diffusions. A first memory node is coupled to one of the first floating diffusions through a first sample and hold transistor and a second memory node is coupled to another one of the first floating diffusions through a second sample and hold transistor.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: May 14, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Andreas Suess, Zheng Yang
  • Patent number: 11968468
    Abstract: A ramp buffer circuit includes a ramp buffer input device having an input coupled to receive a ramp signal. A current monitor is circuit coupled to a power line and the ramp buffer input device to generate a current monitor signal in response to an input current conducted through the ramp buffer input device. A corner bias circuit is coupled to the current monitor circuit to generate an assist bias voltage in response to the current monitor signal. A bias current source is coupled to an output of the ramp buffer input device. An assist current source is coupled to the corner bias circuit and coupled between the output of the ramp buffer input device and ground to conduct an assist current from the output of the ramp buffer input device to ground in response to the assist bias voltage.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: April 23, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Hiroaki Ebihara, Zhenfu Tian, Peter Bartkovjak, Satoshi Sakurai
  • Patent number: 11968465
    Abstract: A technique capable of improving linearity at a low illuminance is provided. A solid-state sensing image device includes: a pixel array including a plurality pixels arranged in a matrix form and a plurality of pixel signal lines connected to the plurality of pixels and receiving pixel signals supplied from the plurality pixels; a column-parallel A/D converting circuit connected to the plurality of pixel signal lines; and a reference-voltage generating circuit generating ramp-wave reference voltage that linearly changes in accordance with time passage. The column-parallel A/D converting circuit includes a first A/D converter, the first A/D converter includes: a first input terminal connected to the pixel signal line; a second input terminal receiving the reference voltage; and an offset generating circuit connected to the first input terminal and generating an offset voltage for the first input terminal.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: April 23, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Norihito Katou, Fukashi Morishita
  • Patent number: 11955051
    Abstract: A receiver of a display driver and an operating method of the receiver of the display driver are provided. The receiver of the display driver includes an input interface, an operational amplifier and a bias current control circuit. The input interface receives image data. The operational amplifier is coupled to the input interface and includes a bias current circuit. The bias current control circuit adjusts a bias current of the bias current circuit according to a data rate of the image data. The operating method is adapted to the receiver of the display driver.
    Type: Grant
    Filed: March 3, 2023
    Date of Patent: April 9, 2024
    Assignee: Novatek Microelectronics Corp.
    Inventor: Huan-Teng Cheng
  • Patent number: 11956557
    Abstract: A given pixel of a pixel array includes various operation modes with each of the operation modes having a different conversion gain for the charge received from the photodetector of the pixel. When the modes are used in conjunction with one another, the dynamic range of the pixel can be increased. A readout circuit coupled to a photodetector within a given pixel includes a transfer gate between the photodetector and a gain mode select block that includes capacitors of different sizes and one or more switches to control which capacitors are to receive the charge from the photodetector. Depending on the state(s) of the one or more switches, different operation modes with different conversion gains can be selected to increase the dynamic range of the pixel. The adaptability of the readout circuit can allow for a high dynamic range even in extreme temperature environments by lowering the dark current.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: April 9, 2024
    Assignee: BAE Systems Imaging Solutions Inc.
    Inventors: Xianmin Yi, Alexander Lu
  • Patent number: 11948089
    Abstract: In one example, an apparatus comprises: an image sensor comprising a plurality of pixel cells; a frame buffer; and a sensor compute circuit configured to: receive, from the frame buffer, a first image frame comprising first active pixels and first inactive pixels, the first active pixels being generated by a first subset of the pixel cells selected based on first programming data; perform an image-processing operation on a first subset of pixels of the first image frame, whereby a second subset of pixels of the first image frame are excluded from the image-processing operation, to generate a processing output; based on the processing output, generate second programming data; and transmit the second programming data to the image sensor to select a second subset of the pixel cells to generate second active pixels for a second image frame.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: April 2, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Andrew Samuel Berkovich, Reid Pinkham
  • Patent number: 11948963
    Abstract: Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: April 2, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hirofumi Yamashita
  • Patent number: 11930272
    Abstract: The invention performs a processing for improving an image quality of a camera in a state where a sufficient link rate cannot be ensured. A controlling method for a camera includes an imaging sensor configured to acquire an imaging data, a signal processing unit configured to perform an image processing on the imaging data, a buffer into which data subjected to the image processing is written, and a format conversion unit configured to convert a format of data read from the buffer and transmit the data to a transmission path, wherein the controlling method includes a status prediction step of predicting a status of the buffer based on a readout rate of the imaging sensor and a link rate of the transmission path and generating a status prediction information, and an adjustment step of adjusting a content of the image processing according to the status prediction information.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: March 12, 2024
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Hirotake Usami
  • Patent number: 11924403
    Abstract: An imaging element of the present disclosure includes a first substrate on which a pixel circuit connected to a light receiving part is formed and a second substrate on which a pixel control part that controls the pixel circuit is formed, the first substrate and the second substrate being stacked. Then, the first substrate includes a first wiring formed corresponding to a first pixel row or pixel column, a second wiring formed corresponding to a second pixel row or pixel column, a first connection part that connects the first wiring and the pixel control part, a second connection part that connects the second wiring and the pixel control part, a switch part that controls connection between the first wiring and the second wiring, a first electrode connected to the first wiring via the switch part, and a second electrode connected to the second wiring via the switch part.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: March 5, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yoshiaki Inada
  • Patent number: 11917313
    Abstract: According to one embodiment, a solid-state imaging device includes a plurality of pixels, a plurality of sampling switches, a plurality of sample-and-hold circuits, and a plurality of output switches. The plurality of pixels are arranged at least in a column direction. The plurality of sampling switches are configured to sample signals outputted from the pixels belonging to columns in parallel. The plurality of sample-and-hold circuits are configured to sample and hold signals outputted from the plurality of sampling switches. The plurality of output switches are configured to output signals stored in the plurality of sample-and-hold circuits at predetermined timing.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: February 27, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Masakazu Matsuura
  • Patent number: 11910117
    Abstract: The present disclosure relates to a solid-state imaging element and an electronic apparatus that can achieve a higher image quality. The imaging element includes a pixel having a global drive portion in which all rows are driven at a same timing and a rolling drive portion in which each row is driven at a corresponding timing, a pixel array region in which a plurality of the pixels is placed in an array, a global drive circuit configured to supply a drive signal to the global drive portion, and a rolling drive circuit configured to supply a drive signal to the rolling drive portion. Further, the global drive circuit is placed on each of at least three or more sides of four sides surrounding the pixel array region. The present technology is applicable to a stacked CMOS image sensor, for example.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: February 20, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yusaku Sugimori
  • Patent number: 11901391
    Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: February 13, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takeyoshi Komoto, Masahiko Nakamizo, Toshiaki Ono, Tomonori Yamashita
  • Patent number: 11902684
    Abstract: An imaging device includes a first substrate, and a second substrate stacked on the first substrate. A first connection portion and a second connection portion are between the first substrate and the second substrate. A first pixel and a second pixel each include a photoelectric converter that converts incident light into a signal charge, and a detection circuit that detects the signal charge. The first substrate includes the photoelectric converter and the detection circuit. The second substrate includes a first line, and a voltage source that is coupled to the detection circuit of the first pixel, via the first line and the first connection portion, and that is coupled to the detection circuit of the second pixel, via the first line and the second connection portion.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: February 13, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Sanshiro Shishido
  • Patent number: 11902678
    Abstract: The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: February 13, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Fumihiko Koga
  • Patent number: 11895405
    Abstract: The present invention provides a method for performing optical image detection using a camera module comprising a Digital MicroMirror Device, a first point Photo Detector, a second point Photo Detector, a first lens and a second lens.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: February 6, 2024
    Assignee: University College Cork—National University of Ireland, Cork
    Inventor: Nabeel Agha Riza
  • Patent number: 11889210
    Abstract: An electronic device includes a first array of image pixels having inputs coupled to first selection tracks and outputs coupled to first output tracks, a second array of test pixels having inputs coupled to second selection tracks and outputs coupled to the first output tracks, and a third array of test pixels having inputs coupled to the first selection tracks and outputs coupled to second output tracks. A processor is coupled to receive output signals on the first and second output tracks. The output signals from the test pixels of the second and third arrays are fixed at one or the other of only two values in the absence of a defect. The output signals received by the processor over the first and second output tracks are processed to determine presence or absence of a defect.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Jerome Chossat, Mathieu Thivin
  • Patent number: 11888002
    Abstract: In one example, an apparatus comprises: an image sensor comprising an array of pixel cells, each pixel cell including a photodiode and circuits to generate image data, the photodiodes formed in a first semiconductor substrate; and a controller formed in one or more second semiconductor substrates that include the circuits of the array of pixel cells, the first and second semiconductor substrates forming a stack and housed within a semiconductor package. The controller is configured to: determine whether first image data generated by the image sensor contain features of an object; based on whether the first image data contain the features of the object, generate programming signals for the image sensor; and control, based on the programming signals, the image sensor to generate second image data.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: January 30, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Andrew Samuel Berkovich, Xinqiao Liu, Hans Reyserhove
  • Patent number: 11875481
    Abstract: A method and a system for compensating an image having fixed pattern noise are provided. The method is adapted to a 4-cell sensor and can automatically calculate appropriate compensation parameters for fixed pattern noise according to non-uniformity of the sensor and lens. Since the defects in the sensor or the lens may cause non-uniform fixed pattern noise, an image is firstly divided into multiple grids and a pixel average of every channel in the grids is calculated. Afterwards, a fixed pattern noise compensation coefficient of every pixel can be calculated according to characteristics of the image formed by the 4-cell sensor. In one aspect, the compensation coefficient of the current pixel can be calculated by extrapolation or interpolation. The fixed pattern noise in the image can be corrected.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: January 16, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yan-Fong Chen, Wen-Tsung Huang
  • Patent number: 11875989
    Abstract: A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: January 16, 2024
    Assignee: SONY GROUP CORPORATION
    Inventors: Taku Umebayashi, Keiji Tatani, Hajime Inoue, Ryuichi Kanamura
  • Patent number: 11862525
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: January 2, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tsung-Yu Lin, Pei-Yu Wang, Chung-Wei Hsu
  • Patent number: 11863884
    Abstract: Systems and techniques are described for imaging. An imaging system includes an image sensor with a plurality of photodetectors, grouped into a first group of photodetectors and a second group of photodetectors. The imaging system can reset its image sensor. The imaging system exposes its image sensor to light from a scene. The plurality of photodetectors convert the light into charge. The imaging system stores analog photodetector signals corresponding to the charge from each the photodetectors. The imaging system reads first digital pixel data from a first subset of the analog photodetector signals corresponding to the first group of photodetectors without reading second digital pixel data from a second subset of the analog photodetector signals corresponding to the second group of photodetectors. The imaging system generates an image of the scene using the first digital pixel data.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: January 2, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Micha Galor Gluskin, Wesley James Holland, Jiafu Luo, Venkata Ravi Kiran Dayana
  • Patent number: 11863898
    Abstract: A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 2, 2024
    Assignee: Sony Group Corporation
    Inventors: Shoji Kobayashi, Yoshiharu Kudoh, Takuya Sano
  • Patent number: 11856308
    Abstract: An image sensor includes: a pixel unit including pixels configured to generate a first signal corresponding to an amount of received light, and output the first signal; an AD converter configured to convert the first signal into a digital second signal by performing AD conversion processing for the first signal, and output the second signal; a transmitter/receiver configured to transmit and receive, in a time division manner, transmission data including at least the second signal in a first period, and reception data input from an outside in a second period; and a first generator configured to generate a first clock signal synchronized with the clock edge included in the reception data. The transmitter/receiver is configured to switch between the first period and the second period every horizontal line in the pixel unit, and transmit and receive the transmission data and the reception data in a time division manner.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: December 26, 2023
    Assignee: OLYMPUS CORPORATION
    Inventor: Masato Osawa
  • Patent number: 11847790
    Abstract: A camera system. In some embodiments, the camera system includes a first laser, a camera, and a processing circuit connected to the first laser and to the camera. The first laser may be steerable, and the camera may include a pixel including a photodetector and a pixel circuit, the pixel circuit including a first time-measuring circuit.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: December 19, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yibing Michelle Wang, Kwang Oh Kim, Lilong Shi
  • Patent number: 11848337
    Abstract: An imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: December 19, 2023
    Assignee: Depuy Synthes Products, Inc.
    Inventors: Laurent Blanquart, Joshua D. Talbert, Jeremiah D. Henley, Donald M. Wichern
  • Patent number: 11843889
    Abstract: An image sensor may include an image sensor pixel array, row control circuitry, and column readout circuitry. The column readout circuitry may include analog-to-digital converter (ADC) circuitry. The ADC circuitry may have a first portion that selectively converts pixel signals associated with a low light or high conversion gain operating environment and a second portion that converts any pixel signals. As an example, the first portion may be a ramp ADC and the second portion may be a successive approximation register (SAR) ADC.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: December 12, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Brian Young
  • Patent number: 11843887
    Abstract: An apparatus includes a plurality of pixels, a comparator configured to compare an output signal of each of the plurality of pixels with a reference signal, and a counter of K bits (K is a natural number) configured to operate in parallel with operation of the comparator. The apparatus converts the output signal of each of the plurality of pixels into a digital signal using an output of the comparator and an output of the counter. The apparatus includes an addition unit configured to add a plurality of the digital signals. The addition unit includes a serial binary adder of M bits (M is a natural number less than K).
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Noriyuki Shikina
  • Patent number: 11843885
    Abstract: Disclosed is an image sensing device including a pixel array including a plurality of pixels arranged in rows and columns, and suitable for outputting a plurality of pixel signals, and a plurality of readout circuits coupled to the pixel array, and suitable for compensating for readout deviations among the plurality of pixel signals, based on a plurality of bias voltages having different voltage levels, when reading out the plurality of pixel signals.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: December 12, 2023
    Assignee: SK hynix Inc.
    Inventor: Choong Sik Ryu
  • Patent number: 11843859
    Abstract: An image sensor outputs captured image data by discriminating whether to add a result of an imaging plane phase difference AF calculation to a top of the captured image data or whether to add the result to an end of the captured image data, thus reducing a time lag between exposure and focus position movement.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hiroyuki Furumochi
  • Patent number: 11838668
    Abstract: The photoelectric conversion device includes pixels each including photoelectric converters and a floating diffusion to which charges of the photoelectric converters are transferred, a vertical scanning unit for performing readout processing and reset processing on the pixels while switching the photoelectric converter to be processed and the floating diffusion to be processed, and a control unit that controls the vertical scanning unit. The control unit includes a readout row address generation unit and a reset row address generation unit that generate a row address to be processed. A first cycle in which the photoelectric converter is switched is shorter than a second cycle in which the floating diffusion is switched, an update cycle of the row address is equal to the second cycle, and a setting unit of an update timing of the row address is equal to the length of one cycle of the first cycle.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: December 5, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Taichi Kasugai, Shintaro Takenaka
  • Patent number: 11838671
    Abstract: A photoelectric conversion apparatus and the like that enables a predetermined determination in response to the incidence of photons is provided. The photoelectric conversion apparatus comprising a pixel provided with a photoelectric conversion unit that outputs a signal in response to the incidence of a photon; and a plurality of processing units configured to correspond to the pixel, wherein the processing unit has a first counter circuit configured to count an output signal from the pixel during a predetermined time period and a first memory configured to store a count value counted by the first counter circuit as a second count value, and wherein the processing unit outputs a determination result obtained by comparing a first count value output by the first counter circuit and a predetermined threshold that has been set based on the second count value read out from the first memory.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: December 5, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yasuaki Ise
  • Patent number: 11838669
    Abstract: An image sensing device includes a pixel array configured to include a plurality of pixel groups consecutively arranged in row and column directions. Each of the pixel groups includes a plurality of unit pixels and each unit pixel includes a photoelectric conversion element structured to generate photocharges through a conversion of incident light. Each pixel group outputs a first pixel signal corresponding to photocharges generated by a single unit pixel and a second pixel signal corresponding to a sum of photocharges generated by two or more unit pixels.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: December 5, 2023
    Assignee: SK HYNIX INC.
    Inventor: Dong Ho Ha
  • Patent number: 11832013
    Abstract: To further capture an image in a solid-state image sensor that detects an address event. The solid-state image sensor includes a photoelectric conversion element, a charge accumulation unit, a transfer transistor, a detection unit, and a connection transistor. The photoelectric conversion element generates a charge by photoelectric conversion. The charge accumulation unit accumulates the charge and generates a voltage according to an amount of the charge. The transfer transistor transfers the charge from the photoelectric conversion element to the charge accumulation unit. The detection unit detects whether or not a change amount of a photocurrent according to the amount of the charge exceeds a predetermined threshold. The connection transistor connects the charge accumulation unit and the detection unit to cause the photocurrent to flow.
    Type: Grant
    Filed: March 3, 2023
    Date of Patent: November 28, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hongbo Zhu
  • Patent number: 11832006
    Abstract: An image sensor may include an array of image pixels arranged in rows and columns. Each column of pixels may be coupled to current source transistors and capacitance cancellation circuitry. The capacitance cancellation circuitry may include capacitors, a common source amplifier transistor, an autozero switch, a switch for selectively deactivating at least one of the capacitors during sample-and-hold reset and sample-and-hold signal operations.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: November 28, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Shankar Ramakrishnan
  • Patent number: 11832005
    Abstract: The present technology relates to an imaging element that can reduce noise. The imaging element includes: a photoelectric conversion element; a first amplification element that amplifies a signal from the photoelectric conversion element; a second amplification element that amplifies an output from the first amplification element; an offset element provided between the first amplification element and the second amplification element; a first reset element that resets the first amplification element; and a second reset element that resets the second amplification element. The offset element is a capacitor. A charge is accumulated in the offset element via a feedback loop of an output from the second amplification element, and an offset bias is generated. The present technology can be applied to an imaging element.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: November 28, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshiyuki Nishihara, Tomohiro Takahashi, Masao Matsumura, Tsutomu Imoto
  • Patent number: 11830894
    Abstract: An image sensor element includes a transfer transistor TX, a LOFIC select transistor LF, a photodiode PD, and a first overflow path OFP. The transfer transistor TX outputs a readout signal from a first end. The LOFIC select transistor LF includes a first end connected to a second end of the transfer transistor TX, and a second end connected to a capacitor. The photodiode PD is connected in common to a third end of the transfer transistor and a third end of the LOFIC select transistor LF. The first overflow path OFP is formed between the photodiode PD and a second end of the LOFIC select transistor LF. Each of the transfer transistor TX and the LOFIC select transistor LF is configured with a vertical gate transistor.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: November 28, 2023
    Assignee: OmniVision Technologies, Inc.
    Inventor: Yoshiharu Kudo
  • Patent number: 11832010
    Abstract: A conversion apparatus includes a conversion unit, a first transistor configured to receive a charge in the conversion unit at a gate thereof, a second transistor connected to the gate, a signal line configured such that a signal is output from the first transistor thereto, a third transistor provided in a path between the signal line and the first transistor, a first line configured to supply a potential for turning off the second transistor, a second line configured to supply a potential for turning off the third transistor that is a common potential also used as the potential for turning off the second transistor, and an isolator connected to the first line and the second line.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: November 28, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yu Katase, Hideo Kobayashi
  • Patent number: 11818333
    Abstract: An imaging device according to an embodiment of the present disclosure includes a pixel array including a plurality of pixels, a scanning control section that controls scanning of the plurality of pixels, and a readout control section that controls reading of the plurality of pixels. The imaging device further includes a first waveform generation part that generates a plurality of control signals for controlling of at least one of the scanning control section or the readout control section, a second waveform generation part that generates a plurality of reference signals, and a failure detection section that detects a failure of the first waveform generation part or the second waveform generation part on a basis of comparison between the plurality of control signals and the plurality of reference signals.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: November 14, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Keita Sasaki, Naoki Kawazu, Masaki Murozuka, Yuichi Motohashi
  • Patent number: 11818479
    Abstract: A technique is presented for quantizing pixels of an image using Sigma Delta quantization. In one aspect, pixel values for an image are segmented into columns of pixel values; and for each column in the matrix, pixel values of a given column are quantized using sigma delta modulation. The pixel values in a given column are preferably quantized as a whole, thereby minimizing accumulated quantization error from a starting pixel value in the given column to a current pixel value in the given column. In another aspect, the pixels of an image are quantized using a 2D generalization of Sigma Delta modulation.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: November 14, 2023
    Assignee: Board of Trustees of Michigan State University
    Inventors: Rongrong Wang, He Lyu