Abstract: An image sensing device includes a pixel array including a plurality of unit pixel blocks each including a plurality of unit image sensing pixels arranged in the pixel array and structured to convert light into photocharges. Each of the unit pixel blocks includes a first sub-pixel block including a first floating diffusion region structured to hold the photocharges and a plurality of unit image sensing pixels sharing the first floating diffusion region, and a conversion gain capacitor arranged adjacent to one side of the first sub-pixel block. The conversion gain capacitor includes an impurity region coupled to an input node that receives a conversion gain signal, and a gate structured to surround the impurity region and coupled to the first floating diffusion region to change a gain of the first floating diffusion region in response to a change in the conversion gain signal.

Abstract: The binning method of an image sensor includes reading out a plurality of pixel signals from at least two rows of each of a plurality of areas of a pixel array at a time, each of the plurality of areas including a plurality of pixels arranged in a 2n×2n matrix, where n is an integer equal to or greater than 2; generating first image data by performing analog-to-digital conversion on the plurality of pixel signals; generating, based on the first image data, a first summation value of each of a plurality of binning areas based on two pixel values corresponding to a same color in each of the plurality of binning areas, the plurality of binning areas corresponding to the plurality of areas of the pixel array; and generating a second summation value of each of two binning areas based on two first summation values corresponding to a same color in the two binning areas, the two binning areas being adjacent to each other in a column direction among the plurality of binning areas.

Abstract: An optical camera system includes a first lens driving mechanism, a second lens driving mechanism, and a casing. The first lens driving mechanism includes a first outer frame and a first driving assembly. The first driving assembly is configured to drive a first optical component to move relative to the first outer frame. The second lens driving mechanism includes a second outer frame and a second driving assembly. The second driving assembly is configured to drive a second optical component to move relative to the second outer frame. The casing has at least three side walls perpendicular to each other, at least two side walls of the first outer frame face two side walls of the casing, and at least two side walls of the second outer frame face two side walls of the casing.

Abstract: A display panel and a display device are provided. The display panel has a display area and a non-display area. The display panel includes pixels arranged in H columns and H*x data lines arranged in the display area and DEMUX circuits arranged in the non-display area. Each pixel includes x sub-pixels, and the data line is electrically connected to the sub-pixel. Each DEMUX circuit includes signal output terminals electrically connected to the data lines. The DEMUX circuits include M first DEMUX circuits and N second DEMUX circuits. Each first DEMUX circuit includes a first signal input terminal and al first signal output terminals. Each second DEMUX circuit includes a second signal input terminal and b1 second signal output terminals. H*x=M*a1+N*b1, where H, x, M, N, a1, and b1 are positive integers, M>N, a1>2, b1?2, a1>b1, and (M+N) is an even number.

Abstract: A distributed, parallel, image capture and processing architecture provides significant advantages over prior art systems. A very large array of computational circuits—in some embodiments, matching the size of the pixel array—is distributed around, within, or beneath the pixel array of an image sensor. Each computational circuit is dedicated to, and in some embodiments is physically proximal to, one, two, or more associated pixels. Each computational circuit is operative to perform computations on one, two, or more pixel values generated by its associated pixels. The computational circuits all perform the same operation(s), in parallel. In this manner, a very large number of pixel-level operations are performed in parallel, physically and electrically near the pixels.

Abstract: A data receiving device of a memory device comprises a first pre-amplifier configured to receive previous data, a first reference voltage, and input data, and to output differential signals by comparing the input data with the first reference voltage in response to a clock, when the first pre-amplifier is selected in response to the previous data, a second pre-amplifier configured to receive inverted previous data, a second reference voltage, different from the first reference voltage, and the input data, and outputting a common signal in response to the clock, when the second pre-amplifier is unselected in response to the previous data; and an amplifier configured to receive the differential signals and the common signal, and to latch the input data by amplifying the differential signals.

Abstract: A solid-state imaging element according to an embodiment of the present disclosure includes a first electrode including a plurality of electrodes, a second electrode opposed to the first electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode, and the first electrode has, at least in a portion, an overlap section where the plurality of electrodes overlap each other with a first insulation layer interposed therebetween.

Abstract: The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus. A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.

Abstract: In a solid-state imaging element that performs AD conversion for each pixel, image quality degradation when resolution is lowered is suppressed without wastefully consuming power. The solid-state imaging element includes a plurality of pixels. Each of the plurality of pixels is provided with a comparison unit, an addition circuit, and a data storage unit. The comparison unit generates a difference signal obtained by amplifying a difference between an analog pixel signal to which a predetermined coordinate is assigned and a predetermined reference signal. The addition circuit generates an addition signal by performing analog addition of the difference signal and a difference signal regarding another coordinate adjacent to the predetermined coordinate. The data storage unit holds a digital signal indicating a time when an output signal of the comparison unit corresponding to the addition signal is inverted.

Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.

Abstract: An imaging device having a semiconductor substrate that includes a first photoelectric converter, and a second photoelectric converter adjacent to the first photoelectric converter. The imaging device further includes a capacitive element one end of which is coupled to the first photoelectric converter, where the first capacitive element at least partly overlaps, in a plan view, with the second photoelectric converter.

Abstract: A semiconductor device according to an embodiment includes a plurality of element arrays, a signal-processing circuit, and a comparison-voltage generation circuit. Each element array is selectively connected to a vertical signal line and includes an amplification transistor configured to output a first analog signal on the basis of an input analog voltage and an actual value of variation of a characteristic value of each element array included in the plurality of element arrays. The comparison-voltage generation circuit is configured to output a gradually increasing or gradually decreasing comparison voltage. The signal-processing circuit includes a storage circuit and is configured to compare the first analog signal with the comparison voltage and store a timing at which the comparison voltage and a value of a second analog signal generated by adding a predetermined absolute value to the first analog signal match each other onto the storage circuit.

Abstract: A pixel circuit includes a photodiode in semiconductor material to accumulate image charge in response to incident light. A tri-gate charge transfer block coupled includes a single shared channel region the semiconductor material. A transfer gate, shutter gate, and switch gate are disposed proximate to the single shared channel region. The transfer gate transfers image charge accumulated in the photodiode to the single shared channel region in response to a transfer signal. The shutter gate transfers the image charge in the single shared channel region to a floating diffusion in the semiconductor material in response to a shutter signal. The switch gate is configured to couple the single shared channel region to a charge storage structure in the semiconductor material in response to a switch signal.

Abstract: An image sensor, comprising a pixel region in which a plurality of pixel units are arranged, each pixel unit having first and second photoelectric conversion portions, a first output portion that outputs, outside of the image sensor, a first signal based on a signal from the first photoelectric conversion portion of the pixel units, and a second output portion that outputs a second signal based on a signal from the first photoelectric conversion portion and a signal from the second photoelectric conversion portion of the pixel units, wherein output of the first signal from the first output portion and output of the second signal from the second output portion are performed in parallel.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A photoelectric converter comprising a pixel unit and a processor configured to process a pixel signal output from the pixel unit is provided. The processor comprises a ?? AD converter configured to convert the pixel signal into a digital signal. The ?? AD converter comprises a subtracter to which the pixel signal and a subtraction signal are input, an integrator configured to receive an output from the subtracter, a comparator configured to compare an output from the integrator with a predetermined voltage, a decimation filter configured to generate the digital signal based on an output from the comparator, a delay unit configured to delay an output from the comparator, a buffer configured to buffer an output from the delay unit, and a DA converter configured to convert an output from the buffer into an analog signal to generate the subtraction signal.

Abstract: Improvement of noise characteristics is achievable. A solid-state imaging device according to an embodiment includes a plurality of photoelectric conversion elements (333) arranged in a two-dimensional grid shape in a matrix direction and each generating a charge corresponding to a received light amount, and a detection unit (400) that detects a photocurrent produced by the charge generated in each of the plurality of photoelectric conversion elements. A chip (201a) on which the photoelectric conversion elements are disposed and a chip (201b) on which at least a part of the detection unit is disposed are different from each other.

Abstract: An imaging device incudes a pixel array including pixels arranged in columns and rows, one of the columns including a first pixel in a first row and a second pixel in a second row; a first signal line, to which the first pixel is coupled, and a second signal line, to which the second pixel is coupled, extending in a column direction of the pixels; and a first shield line, to which the first pixel is coupled, extending in the column direction. The first signal line, the first shield line, and the second signal line are arranged along a row direction of the pixels in that order.

Abstract: An image sensor may include a shared pixel circuit having multiple photodiodes coupled to a common floating diffusion node via respective charge transfer gates. First, the pixel circuit may be reset, and a sample-and-hold reset (SHR) value may be read out. Charge from a first of the photodiodes may be transferred to the floating diffusion node, and a first sample-and-hold signal (SHS) value may be read out. A first correlated double sampling (CDS) value is obtained by computing the difference between the SHR value and the first SHS value. Without resetting again, charge from a second of the photodiodes may be transferred to the floating diffusion node, and a second SHS value may be read out. A second CDS value is obtained by computing the difference between the first and second SHS values. Reading out the shared pixel circuit in this way substantially reduces power consumption.

Abstract: Sensing pixels each store a sensing voltage level. A method for driving the plurality of sensing pixels includes providing a plurality of readout scan signals to the plurality of sensing pixels, and providing a plurality of reset scan signals to the plurality of sensing pixels. One of the plurality of readout scan signals enables one of the plurality of sensing pixels to output the sensing voltage level stored in the one of the plurality of sensing pixels. One of plurality of reset scan signals resets the sensing voltage level stored in one of the plurality of sensing pixels. One of the plurality of reset scan signals is generated by converting one of the plurality of readout scan signals with a level shift circuit or one of the plurality of readout scan signals is generated by converting one of the plurality of reset scan signals with a level shift circuit.

Abstract: A blur correction device includes: an acquisition unit that acquires an amount of blur correction used to correct blurring of an image obtained through imaging of an imaging element during exposure for one frame in the imaging element; and a correction unit that corrects the blurring by performing image processing on a correction target image, which is an image for one frame included in a moving image obtained through imaging of the imaging element, based on the amount of blur correction acquired by the acquisition unit during exposure necessary to obtain the correction target image.

Abstract: An imaging device includes a pixel array, a first converter, a second converter, a first ramp signal generation circuit that is disposed closer to the first converter than to the second converter and supplies a first ramp signal to the first converter and the second converter, a first connection line having one end connected to an output terminal of the first ramp signal generation circuit and including a portion extending away from an input terminal of the first converter in a path from the one end to the other end of the first connection line, and a second connection line having one end connected to the other end of the first connection line and the other end connected to the input terminal and including a portion extending closer to the input terminal in a path from the one end to the other end of the second connection line.

Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.

Abstract: An imaging device includes an image detector that includes an array of digital pixels, each digital pixel including an output that provides a digital pixel output pulse each time a charge stored in the digital pixel exceeds a threshold and a readout integrated circuit (ROIC) connected to the output of each of the digital pixels to receive the digital pixel output pulse from each pixel, the ROIC including a plurality of accumulators, each of the plurality of accumulators associated with a respective digital pixel. The imaging device also includes a controller that reads the accumulators to determine a number of digital pixel output pulses stored by the accumulators without stopping the generation of digital pixel output pulses.

Abstract: A solid-state image sensor having a first region and a second region adjacent to the first region along a first direction is provided. The solid-state image sensor includes a first unit pattern disposed in the first region. The solid-state image sensor also includes a second unit pattern disposed in the second region and corresponding to the first unit pattern. The first unit pattern and the second unit pattern each includes normal pixels and an auto-focus pixel array. The normal pixels and the auto-focus pixel array in the first unit pattern form a first arrangement, the normal pixels and the auto-focus pixel array in the second unit pattern form a second arrangement, and the first arrangement and the second arrangement are symmetric with respect to the first axis of symmetry.

Abstract: The present invention relates to an image sensor and to an imaging system comprising the same. The present invention particularly relates to X-ray image sensors and imaging systems. The image sensor according to the invention comprises a pixel array that includes a plurality of active pixels arranged in a matrix of rows and columns, and a plurality of column lines to which outputs of pixels in the same column are coupled for the purpose of outputting pixel signals. The image sensor further comprises readout circuitry that includes a plurality of readout units, each readout unit being configured for reading out a respective column line through an input node of the readout unit. The image sensor is characterized in that the image sensor further comprises capacitive units, such as capacitors, for capacitively coupling each input node to its corresponding column line.

Abstract: Provided is a photoelectric conversion device including a pixel array in which pixels, each of the pixels including a photoelectric conversion element, are arranged in columns, a signal line that is arranged corresponding to one of the columns in the pixel array and to which a signal from the pixel is output, a current source configured to supply the signal line with a driving current; a current adjusting unit configured to control the driving current into a current amount including a first current amount and a second current amount greater than the first current amount, and an assisting element configured to assist a change in a current flowing through the signal line when the driving current changes from the first current amount to the second current amount. The first current amount is a current amount in a state where the driving current is disconnected.

Abstract: Disclosed are embodiments of an integrated circuit structure (e.g., a processing chip), which includes an array of integrated pixel and memory cells configured for deep in-sensor, in-memory computing (e.g., of neural networks). Each cell incorporates a memory structure (e.g., DRAM structure or a ROM structure) with a storage node, which stores a first data value (e.g., a binary weight value), and a sensor connected to a sense node, which outputs a second data value (e.g., an analog input value). Each cell is selectively operable in a functional computing mode during which the voltage level on a bit line is adjusted as a function of both the first data value and the second data value. Each cell is further selectively operable in a storage node read mode. Furthermore, depending upon the type of memory structure (e.g., a DRAM structure), each cell is selectively operable in a storage node write mode.

Abstract: An imaging device includes a photodiode array with a first and second photodiodes. First and second floating diffusions are configured to receive charge from the first and second photodiodes, respectively. An analog to digital converter (ADC) is configured to receive simultaneously first and second bitline signals from the first and second floating diffusions, respectively. The ADC is configured to generate a reference readout in response to the first and second bitline signals after a reset operation. The ADC next generates a first half of a phase detection autofocus (PDAF) readout in response to the first and second bitline signals after charge is transferred from the first PDAF photodiode to the first floating diffusion. The ADC then generates a full image readout in response to the first and second bitline signals after charge is transferred from the second photodiode to the second floating diffusion.

Abstract: A display device includes a pixel array unit formed by disposing pixel circuits having a P-channel type drive transistor that drives a light-emitting unit, a sampling transistor that applies a signal voltage, a light emission control transistor that controls emission/non-emission of the light-emitting unit, a storage capacitor that is connected between a gate electrode and a source electrode of the drive transistor and an auxiliary capacitor that is connected to the source electrode, and a drive unit that, during threshold correction, respectively applies a first voltage and a second voltage to the source electrode of the drive transistor and the gate electrode thereof, the difference between the first voltage and the second voltage being less than a threshold voltage of the drive transistor, and subsequently performs driving that applies a standard voltage used in threshold correction to the gate electrode when the source electrode is in a floating state.

Abstract: A pixel includes an array of a plurality of photodiodes. The array of photodiodes includes a plurality of rows of photodiodes and a plurality of columns of photodiodes. The plurality of photodiodes includes a set of first photodiodes that has a first surface area and at least one second photodiode that has a second surface area that is smaller than the first surface area. The first photodiodes are arranged to be symmetric with respect to the at least one second photodiode. Output circuitry is electrically coupled to each of the first photodiodes in the set of first photodiodes. A switch is selectively, operably closed to electrically couple the output circuitry to the second photodiode.

Abstract: Devices and methods of their fabrication for pixels or displays are disclosed. Pixels and displays having redundant subpixels are described. Subpixels are initially isolated by an unprogrammed antifuse. A subpixel is connected to the display by programming the antifuse, electrically connecting it to the pixel or display. Defective subpixels can be determined by photoluminescent testing or electroluminescent testing, or both. A redundant subpixel can replace a defective subpixel before pixel or display fabrication is complete.

Abstract: An analog-digital converter includes a count code generator to receive a code generation clock signal from a clock signal generator and to output a count code according to the code generation clock signal, a latch to latch the count code, an operating circuit to generate a count value of the count code and to output a digital signal based on the count value, and a transfer controller to transfer the count code from the latch to the operating circuit. The transfer controller determines whether to transfer the count code according to a logic level of a count enable clock signal generated from the clock signal generator.

Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to column readout circuitry. A given image pixel may generate a low light signal and a high light signal for a given exposure. A column line may couple the given image pixel to readout circuitry having amplifier circuitry. The column line may be coupled to an autozeroing transistor for reading out the high light signal and a source follower stage for readout out the low light signal. The amplifier circuitry may receive different common mode voltage depending on whether it is amplifying the low or high light signal. The gain and other operating parameters of the amplifier circuitry may be adjusted based on whether it is amplifying the low or high signal. If desired, separate amplifier circuitry may be implemented for the low and high light signals.

Abstract: An imaging device that includes pixels arranged in a matrix having rows and columns, the pixels including first pixels and second pixels different from the first pixels, the first pixels and the second pixels being located in one of the columns, each of the pixels including a photoelectric converter that converts incident light into signal charge, and a first transistor having a first gate, a first source and a first drain, the first gate being coupled to the photoelectric converter. The imaging device further includes a first line coupled to one of the first source and drain of the first pixels; a second line coupled to one of the first source and drain of the second pixels; a third line coupled to the other of the first source and drain of the first pixels; and voltage circuitry coupled to the third line and that supplies a first and second voltage.

Abstract: The present technology relates to an imaging element that can reduce noise. The imaging element includes: a photoelectric conversion element; a first amplification element that amplifies a signal from the photoelectric conversion element; a second amplification element that amplifies an output from the first amplification element; an offset element provided between the first amplification element and the second amplification element; a first reset element that resets the first amplification element; and a second reset element that resets the second amplification element. The offset element is a capacitor. A charge is accumulated in the offset element via a feedback loop of an output from the second amplification element, and an offset bias is generated. The present technology can be applied to an imaging element.

Abstract: A photoelectric conversion device includes: a photoelectric conversion block including two-dimensionally arranged photoelectric converters, each photoelectric converter including a color filter and a photoelectric conversion element configured to perform photoelectric conversion in response to incident light; a signal processing block configured to process data output from the photoelectric conversion block; and a plurality of electrode pads disposed in the signal processing block. The electrode pads are configured to supply power to the photoelectric conversion block and the signal processing block.

Abstract: A driver circuit of an image sensor is provided. The driver circuit includes a row decoder to decode an address of a target row of a pixel array and generate an operation directing signal corresponding to the target row; a digital logic circuit including: a target row logic circuit to generate a pixel control signal based on the operation directing signal; a power switch configured to connect a power supply voltage to the target row logic circuit during a first time and isolate the power supply voltage from the target row logic circuit during a second time, based on the operation directing signal; and an output circuit configured to output a default signal during the second time; and a row driver configured to drive the target row based on the pixel control signal during the first time and drive the target row based on the default signal during the second time.

Abstract: An electronic circuit includes a unit pixel, a first clamp circuit, and a second clamp circuit. The unit pixel outputs a voltage having an output voltage level at a first output voltage level in a first time interval and at a second output voltage level in a second time interval different from the first time interval. The first clamp circuit is configured to clamp the output voltage level from the unit pixel to a first voltage level responsive to the first output voltage level being not greater than the first voltage level in the first time interval. The second clamp circuit is configured to clamp the output voltage level from the unit pixel to a second voltage level responsive to the second output voltage level being not greater than the second voltage level in the second time interval.

Abstract: In a solid-state image sensor that transfers electric charges to a floating diffusion layer, exposure is started before transferring the electric charges to the floating diffusion layer. Electric charges are generated by photoelectric conversion in a photodiode and they are accumulated in an accumulation unit. An exposure end transfer transistor transfers the electric charges from the photodiode to the accumulation unit when a predetermined exposure period ends. A reset transistor initializes a voltage of a floating diffusion layer to a predetermined reset level when the exposure period ends. When a new exposure period is started after the electric charges are transferred to the accumulation unit, a discharge transistor discharges electric charges newly generated in the photodiode. When processing of converting a predetermined reset level into a digital signal ends, a conversion end transistor transfers the electric charges from the accumulation unit to the floating diffusion layer.

Abstract: Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The back side illuminated (BSI) image sensor includes a semiconductive substrate and an interlayer dielectric (ILD) layer at a front side of the semiconductive substrate. The ILD layer includes a dielectric layer over the semiconductive substrate and a contact partially buried inside the semiconductive substrate. The contact includes a silicide layer including a predetermined thickness proximately in a range from about 600 angstroms to about 1200 angstroms.

Abstract: Disclosed is a camera module. The camera module includes an image sensor that captures an image of a target to generate first image data, outputs the first image data, and outputs an interval information signal; an image signal processor that receives the first image data, performs image processing on the first image data to generate second image data and outputs the second image data; and an interface circuit that receives the second image data and the interval information signal and outputs the second image data as third image data. The interface circuit adjusts a timing to output the third image data, based on the interval information signal.

Abstract: A circuit is disclosed, including a sensing unit and first to fifth switching units. The sensing unit generates a sensing voltage to a sensing node. The first switching unit is coupled between the sensing node and a first node. The second switching unit is coupled between the sensing node and a second node and generates a first auxiliary voltage to the second node. The first capacitive unit is coupled to the second node. The third switching unit is coupled between the first and second nodes, and adjusts a first transfer voltage at the first node. The fourth switching unit is coupled between the sensing node and a third node, and generates a second transfer voltage to the third node. The fifth switching unit is coupled between the sensing node and a fourth node and generates a second auxiliary voltage to the fourth node.

Abstract: A LIDAR system includes a receiver configured to receive a reflected light beam from a receiving direction, the reflected light beam having an oblong shape that extends in a lengthwise direction. The LIDAR receiver includes a two-dimensional (2D) photodetector array including a plurality of pixel rows and a plurality of pixel columns, wherein the reflected light beam, incident on the 2D photodetector array, extends in the lengthwise direction along at least one receiving pixel column of the plurality of pixel columns according to the receiving direction; an analog readout circuit including a plurality of output channels configured to read out electrical signals; and a multiplexer configured to, for each reading cycle, selectively couple receiving pixels of the at least one receiving column to the plurality of output channels based on the receiving direction, while decoupling non-receiving pixels from the plurality of output channels based on the receiving direction.

Abstract: An image sensing device is provided. The image sensing device includes a substrate, a plurality of photosensitive elements, a dielectric layer, a reflector, a color filter, and a microlens structure. The substrate has a first pixel and a second pixel adjacent to the first pixel, and the substrate has a front side and a back side opposite the front side. The photosensitive elements are disposed in the substrate. The dielectric layer is disposed on the back side of the substrate. The reflection is disposed on the front side of the substrate and has a parabolic surface. The color filter layer is disposed on the dielectric layer. The microlens structure is disposed on the color filter layer.

Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.

Abstract: The present disclosure provides an image sensor and a method for manufacturing deep trench and through-silicon via of the image sensor, wherein: providing a pixel silicon wafer, performing a silicon wafer thinning on a second side of the pixel silicon wafer; forming a deep trench on the the second side of the pixel silicon wafer; filling the deep trench with organic material; coating photoresist on the second side of the pixel silicon wafer; etching the second side of the pixel silicon wafer to form a through-silicon via according to the through-silicon via pattern; depositing a dielectric protective layer on the surface of the deep trench and the surface of the through-silicon via; filling the deep trench with organic material; coating the photoresist on the second side of the pixel silicon wafer; etching the second side of the pixel silicon wafer to form a contact hole according to the contact hole pattern, depositing a barrier layer on the surface of the deep trench and the surface of the through-silicon v

Abstract: An imaging device includes: pixels each including a photoelectric converter, and an output unit that outputs a pixel signal based on charge in a holding portion; an output line to which signals from the pixels are output; a clip circuit that limits a signal level of the output line to a range whose upper or lower limit is a predetermined clip level; and an amplifier unit that amplifies a signal of the output line. The amplifier unit outputs first and second signals amplified at first and second amplification factors, respectively, for the same pixel signal. The clip circuit limits a signal level of the output line to a first clip level in a first period in which the pixel signal is amplified at a first amplification factor and to a second clip level in a second period in which the pixel signal is amplified at a second amplification factor.

Abstract: A distance measuring apparatus includes an image sensor and an image sensor driver. The image sensor includes a photodiode, a first capacitor and a second capacitor, and a first transfer gate and a second transfer gate configured to transmit an output of the photodiode to the respective first and second capacitors. The image sensor driver is configured to complementarily drive the first transfer gate and the second transfer gate.

Abstract: An electronic device includes a photodiode, a first transistor, a second transistor, a third transistor and a capacitor. The photodiode has a first terminal and a second terminal. The first transistor has a control terminal used to receive a reset signal, a first terminal coupled to the second terminal of the photodiode, and a second terminal. The second transistor has a control terminal coupled to the second terminal of the photodiode, a first terminal and a second terminal. The third transistor has a control terminal used to receive a row selection signal, a first terminal coupled to the second terminal of the second transistor, and a second terminal. The capacitor has a first terminal coupled to the second terminal of the photodiode, and a second terminal coupled to the second terminal of the first transistor.