Abstract: Embodiments of the present disclosure provide an array substrate, a method for fabricating the same, and a display panel. The array substrate comprises a substrate, first signal lines and touch electrode signal lines the substrate. The touch electrode signal lines intersect with the first signal lines. Each of the touch electrode signal lines includes a plurality of first sub-signal lines and a plurality of second sub-signal lines. The first sub-signal lines are arranged in a same layer as and insulated from the first signal line. Each of the second sub-signal lines run across one of the first signal lines and are electrically connected with the first sub-signal lines adjacent to said second sub-signal line through vias. The first sub-signal lines are arranged in a layer different from the second sub-signal lines.

Abstract: A liquid crystal display includes: an active matrix substrate; an opposite substrate facing the active matrix substrate; and a liquid crystal layer provided between the active matrix substrate and the opposite substrate. The liquid crystal display includes a plurality of pixels. The active matrix substrate includes: a first substrate; a base coat layer; a plurality of TFTs; a plurality of scanning wirings; and a plurality of signal wirings. The active matrix substrate further includes a plurality of second light-shielding layers provided between the first substrate and the base coat layer. The base coat layer includes a silicon nitride layer.

Abstract: The present disclosure relates to a display panel and a manufacturing method thereof, a display device. The display panel includes an array substrate and a color film substrate set oppositely, the array substrate includes multiple subpixel units arranged in an array and an orientation layer covering multiple subpixel units, each subpixel unit includes an opening area; the color film substrate is provided with support columns, orthographic projections of the support columns on the subpixel units are outside the opening areas, the orientation layer is formed with support protrusions which protrude from a surface of the orientation layer, orthographic projections of the support protrusions on the subpixel units are outside the opening areas, the support columns contact top ends of the support protrusions to prevent the support columns from contacting the surface of the orientation layer.

Abstract: The present disclosure provides a display panel and a fabricating method thereof. The display panel includes a substrate and a plurality of mutually insulated binding pads disposed on the substrate. Each binding pad includes an upper surface, a lower surface and a side surface. The upper surface and the lower surface are both parallel to a plane of the substrate, the side surface is located between the upper surface and the lower surface, and the side surface connects the upper surface with the lower surface. A first insulating layer is disposed on the side surface of the binding pad, the first insulating layer is in contact with the side surface of the binding pad and is made of an inorganic material. With such a configuration, the side surface of the binding pad will not be damaged by an etching process subsequent to fabrication of the binding pads.

Abstract: A display device includes a first substrate comprising an insulating film, a first organic layer on the insulating film, and a plurality of pixels arranged in a matrix in an active area. The display device further includes a second substrate comprising a black matrix and a second organic layer stacked on the black matrix. The display device also includes a seal material that attaches the first substrate and the second substrate in a circumference area outside the active area. The first organic layer includes a first opening portion which exposes the insulating film, the second organic layer includes a second opening portion which exposes the black matrix, and the first opening portion and the second opening portion overlap the seal material.

Abstract: A display device includes a display area configured to include a plurality of pixels and a plurality of data lines connected to the pixels. A hole area is disposed within the display area. A hole crack detection line is disposed adjacent to the hole area and surrounds the hole area. The device includes first and second detection lines which include first and second detection transfer lines and first and second detection receiving lines, respectively. A test controller electrically connects the first detection receiving line to a first data line and the second detection receiving line to a second data line. Pixels connected to the first data line that is connected to a first bright-line transistor and pixels connected to the second data line that is connected to a second bright-line transistor are configured to emit light when a crack occurs in the hole crack detection line.

Abstract: A display apparatus includes a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction crossing the first direction, and a plurality of pixels connected to the gate lines and the data lines. Each of the pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel disposed in an i-th row and a fourth sub-pixel disposed in an (i+1)-th row. The first, second, and third sub-pixels and the fourth sub-pixel are disposed with the i-th gate line between the fourth sub-pixel and the first, second, and third sub-pixels and connected to the i-th gate line, and the first, second, third, and fourth sub-pixels are connected to different data lines from each other.

Abstract: A display panel includes a substrate and active switches disposed on the substrate. A light-obstructing layer is disposed between the active switches and the substrate. Each of the active switches includes a semiconductor layer. The light-obstructing layer entirely covers the semiconductor layer.

Abstract: A crack detector may include a plurality of crack detection switches for connecting and disconnecting data lines of a display panel to one another. A signal supply may supply a detection control signal for controlling opening/closing of the crack detection switches and supply a crack detection signal to a first data line. A crack determiner may be configured to determine a crack of the display panel by comparing an output signal supplied from a second data line connected to the first data line through one of the crack detection switches, with a preset reference value.

Abstract: A liquid crystal panel of a scanning antenna includes a TFT substrate provided with a first dielectric substrate, a TFT supported by the first dielectric substrate, a gate bus line, a source bus line, and a patch electrode; a slot substrate provided with a second dielectric substrate, and a slot electrode that is formed on a first main surface of the second dielectric substrate and includes a slot arranged so as to correspond to the patch electrode; and a liquid crystal layer provided between the TFT substrate and the slot substrate. One of the TFT substrate and the slot substrate includes a projecting layer formed of resin and disposed on the liquid crystal layer side of the patch electrode or the slot electrode in a region surrounded by a sealing portion. The projecting layer is arranged so as not to overlap the patch electrode or the slot.

Abstract: An electronic modulating device is provided, which includes a first substrate, a second substrate disposed opposing to the first substrate, and a modulating material disposed between the first substrate and the second substrate. The electronic modulating device includes a buffer layer disposed on the first substrate, and a first electrode disposed on the buffer layer. The buffer layer includes a first opening defining a first top edge and a first bottom edge of the buffer layer. The first electrode includes a second opening defining a second top edge and a second bottom edge of the first electrode. The electronic modulating device includes an organic insulating layer disposed on the first electrode and within the first opening and the second opening. The thickness of the organic insulating layer at the second bottom edge is greater than the thickness of the organic insulating layer at the first top edge.

Abstract: A touch display panel including a thin-film transistor substrate comprising a thin-film transistor, a pixel defining layer disposed on the thin-film transistor substrate and including a first opening, a light emitting structure disposed in the first opening, a thin film encapsulation layer covering the light emitting structure and the pixel defining layer, a first metal pattern disposed on the thin film encapsulation layer, a first insulation pattern disposed on the first metal pattern and having a plane area the same as or smaller than that of the first metal pattern, a second metal pattern disposed on the first insulation pattern, and a second insulation layer disposed on the second metal pattern and the thin film encapsulation layer, and contacting the first metal pattern, the first insulation pattern, and the second metal pattern.

Abstract: A touch panel and a manufacturing method thereof are provided. The touch panel includes a backlight module, a first assembly, and a second assembly. The first assembly includes a first polarizer and a color filter substrate. The second assembly includes an array substrate and a second polarizer. The first polarizer, the color filter substrate, the second polarizer, and the array substrate are disposed on an upper surface of the backlight module.

Abstract: A display device according to the present disclosure includes: a color conversion panel; and a display panel overlapping the color conversion panel, wherein the color conversion panel includes a color conversion layer including a nano-crystalline semiconductor and a transmission layer, the display panel includes a first display panel including a first substrate and a thin film transistor disposed on the first substrate, a second display panel including a second substrate and overlapping the first display panel. The first substrate and the second substrate have different thicknesses.

Abstract: The present disclosure relates to a display device including a process key, and more particularly, to a process key with an improved recognition rate in a display device implementing a narrow bezel. The feature of the present disclosure is such that a process key is divided into and formed as a first key pattern made of a metal material and a second key pattern made of a black matrix material, and the process key is positioned in a green pixel area in which a green color filter pattern is provided among pixels positioned at outermost peripheries corresponding to four corners of an active area of a display panel such that a narrow bezel can be implemented and a recognition rate of the process key can also be improved. Consequently, the display panel can be accurately aligned with manufacturing equipment or other objects such that a process defect can be minimized and process efficiency cab also be improved.

Abstract: A display apparatus includes pixel areas and a light blocking area between the pixel areas. The display apparatus includes a first base substrate, a thin film transistor, and first, second, and third color filters. The first color filter has a first color, the second color filter has a second color different from the first color, and the third color filter has a third color different from the first and second colors. In the light blocking area, the thin film transistor, the first color filter, and the third color filter at least partially overlap each other. The second color filter in at least one pixel area is connected to an adjacent second color filter disposed in an adjacent pixel area by a bridge portion, and the bridge portion is formed of the same material as the second color filter and is disposed in the light blocking area.

Abstract: A display device includes the following elements: a pixel electrode; a first data line electrically connected to the pixel electrode; a second data line adjacent to the pixel electrode without being electrically connected to the pixel electrode; a first sensing electrode disposed directly on the same insulating layer as the pixel electrode; a second sensing electrode disposed directly on the same insulating layer as the first sensing electrode and separated from the first sensing electrode by a predetermined distance; and a third sensing electrode disposed directly on the same insulating layer as the first data line and the second data line, partially overlapping the first sensing electrode to form a first sensing capacitor, and partially overlapping the second sensing electrode to form a second sensing capacitor.

Abstract: A curved display panel and a curved display device are disclosed. The curved display panel includes a first substrate, a second substrate disposed opposite to the first substrate, and a plurality of spacers disposed between the first substrate and the second substrate. The plurality of spacers is configured to define a space between the first substrate and the second substrate. The first substrate includes a display area, a frame area, and an array arrangement disposed in the display area. The array arrangement includes a plurality of active switches and a plurality of pixel cells. In a planar state, each spacer is away from a corresponding active switch by a deviation distance; and in a curved state, a position of each spacer overlaps that of the corresponding active switch.

Abstract: A display device includes a substrate, a driving circuit structure and at least one light emitting device. The driving circuit structure is disposed on the substrate and has at least one driving thin film transistor. The at least one light emitting device has a first connecting post and a second connecting post thereby being disposed on the driving circuit structure, and the at least one light emitting device is electrically connected to the at least one driving thin film transistor through the first connecting post. The at least one driving thin film transistor includes a channel layer, and a distance between the first connecting post and the second connecting post is greater than a channel length of the channel layer.

Abstract: This organic EL display device (100) has multiple pixels, and comprises: an element substrate (1) which has a substrate and multiple organic EL elements supported on the substrate and arranged in each of the multiple pixels; and a thin-film sealing structure (10) covering the multiple pixels. The thin-film sealing structure has a first inorganic barrier layer (12) and an organic barrier layer (14) contacting the upper surface or the lower surface of the first inorganic barrier layer. The element substrate further has a bank layer (33) defining each of the multiple pixels and multiple spacers (31) arranged in the gaps between the pixels, and the multiple spacers (31) are covered by the bank layer (33).

Abstract: Provided is pixel including a first transistor including a first drain region electrically connected to a light emitting diode, a first gate electrode, a first channel region overlapping the first gate electrode, and a first source region, a first sub-transistor including a first sub-gate electrode, a first sub-channel region overlapping the first sub-gate electrode, a first sub-drain region connected to the first gate electrode, and a first sub-source region, a second sub-transistor including a second sub-gate electrode, a second sub-channel region overlapping the second sub-gate electrode, a second sub-drain region connected to the first sub-source region, and a second sub-source region, and a shielding pattern overlapping the first sub-source region and the second sub-drain region and not overlapping the first sub-channel region, wherein a width of the first sub-channel region is greater than a width of the second sub-channel region.

Abstract: A liquid crystal display device according to a present disclosure comprises: a thin film transistor substrate including a thin film transistor array; a counter substrate opposed to the thin film transistor substrate; and a liquid crystal layer disposed between the thin film transistor substrate and the counter substrate, wherein the thin film transistor substrate includes: an overlapping part that overlaps with the counter substrate in planar view; and a non-overlapping part that includes a terminal portion and does not overlap with the counter substrate in planar view, and an outer shape of the non-overlapping part has a non-rectangular shape in planar view.

Abstract: A display apparatus and a method of manufacturing a display apparatus, the display apparatus including a first area, the first area including a structure of thin layers on a substrate; a second area, the second area including a structure of thin layers on the substrate; a planarization layer that planarizes the first area and the second area; and a step-height compensation layer, wherein the structure of thin layers of the first area is different from the structure of thin layers of the second area, the step-height compensation layer compensates for a height difference between the first area and the second area due to the different structures of thin layers, and the step-height compensation layer is between the substrate and the planarization layer and in the first area or the second area.

Abstract: A touch display device is provided, which includes a substrate, multiple touch electrodes arranged in an array on the substrate, and multiple touch lines on the substrate. The touch lines are arranged in a layer different from a layer in which the touch electrodes are positioned. The touch electrodes are arranged corresponding to the touch lines respectively. Each touch line is arranged parallel to a column direction of the touch electrodes. Each touch line includes a signal transmission portion. One end of the signal transmission portion of each touch line is connected to a corresponding one of the touch electrodes, another end of the signal transmission portion of each touch line is extended in a same direction to outside an area where the touch electrodes are positioned. Such configuration reduces a risk of short-circuiting between the touch lines and data lines in the same layer to ensure good production yields.

Abstract: According to one embodiment, a display device including an insulating substrate, a first gate driver, a first gate line and a conductive material layer is provided. The first gate line has a first end connected to the first gate driver and a second end opposite to the first end, and extends in a first direction. The conductive material layer is located between the insulating substrate and the first gate line, overlaps the first gate line, and extends in the first direction. In the display device, the second end of the first gate line is electrically connected to the conductive material layer.

Abstract: In various embodiments, etchants featuring (i) mixtures of hydrochloric acid, methanesulfonic acid, and nitric acid, or (ii) mixtures of phosphoric acid, methanesulfonic acid, and nitric acid, are utilized to etch metallic bilayers while minimizing resulting etch discontinuities between the layers of the bilayer.

Abstract: The embodiments of the present disclosure provide an array substrate, a preparation method thereof, and a display device. The preparation method of an array substrate comprises: forming the active layer, a gate insulating layer, the gate metal layer and the patterned photoresist sequentially on a substrate; forming a gate electrode transition pattern by etching a gate metal layer via a patterned photoresist, using a wet etching process and a dry etching process sequentially; and doping an area of the active layer not sheltered by the gate electrode transition pattern with ions to form a heavily doped area of the active layer.

Abstract: A liquid crystal apparatus as an electro-optical device includes a base material as a substrate, a TFT as a transistor, a second scanning line having a light shielding property in a layer between a semiconductor layer of the TFT and the base material, and a light shielding layer disposed between the second scanning line and an adjacent second scanning line adjacent to the second scanning line so as to overlap each of an end portion of the one second scanning line and an end portion of the adjacent second scanning line, in plan view from a normal line direction on one surface of the substrate.

Abstract: A display panel includes a base substrate in which an active area and a peripheral area adjacent to the active area are defined, a pixel disposed in the active area, a first line disposed in the active area and connected to the pixel, a second line disposed in the peripheral area and spaced apart from the first line in a plan view, a linking pattern electrically connecting the first line to the second line and disposed on a layer different from a layer on which each of the first and second lines is disposed, and an inorganic layer disposed between the first line and the linking pattern and between the second line and the linking pattern. The linking pattern is connected to the first line and the second line through contact holes formed in the inorganic layer.

Abstract: An array substrate is provided that includes a plurality of sub-pixels arranged in a matrix. Each of the sub-pixels includes a substrate, a gate, a source and a drain, and a common electrode on the substrate, a passivation layer on a side of the common electrode facing away from the substrate, and a pixel electrode on a side of the passivation layer facing away from the substrate. The array substrate further includes a common electrode line, the common electrode line being formed of a same material in a same layer as the source and the drain. The common electrode is in direct electrical contact with the common electrode line. The pixel electrode and the drain are electrically connected through a via hole in the passivation layer. A display panel and a method for manufacturing an array substrate are further provided.

Abstract: A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

Abstract: A pixel structure is provided. The pixel structure has a first substrate, a scan line, a data line, an active device, a pixel electrode, and a conductive strip-shaped pattern. The scan line and the data line are located on the first substrate. The active device is electrically connected to the scan lines and the data line. The pixel electrode is electrically connected to the active device. The conductive strip-shaped pattern is correspondingly disposed over the data line. The conductive strip-shaped pattern has an opening at least partially overlapped with the data line in a vertical projection at the first substrate.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. The manufacturing method of the display substrate includes: forming a pattern of first transparent conductive layer, forming a passivation layer and forming a second transparent conductive layer on the passivation layer, forming a pattern of second transparent conductive layer, i.e., a slit electrode, the pattern of second transparent conductive layer including a plurality of sub-electrodes arranged at intervals and located in a display region of the display substrate; and removing a portion of the passivation layer which is in the display region and is not covered by the sub-electrodes, forming a pattern of passivation layer. The second transparent conductive layer is polycrystalline ITO.

Abstract: A display substrate has first and second conductive layers separated from one another by an insulation layer. The first and second conductive layers are used to integrally form on the display substrate, pixel units in a relatively central display area of the substrate and integrated gate driving circuitry as well as associated wirings thereof in one or more peripheral areas. The first and second conductive layers are covered by a first protection layer made of a first electrically insulative material. A second and supplementing protection layer is provided on top of the first protection layer. The supplementing protection layer (buffer layer) is formed of a material different from that of the first protection layer so as to provide supplemental resistance against corrosive chemical agents and supplemental resistance against formation of cracks.

Abstract: A lead-frame structure having two faces and exposing a treated silver surface on at least one of said two faces, the treated silver surface(s) serving the wire bonding, which lead-frame structure has a surface which, after applying resin to it, has excellent adhesion even under severe testing conditions, such as the IPC/JEDEC J-STD-20 MSL standard, and a surface mount electronic device comprising a lead-frame or lead-frame entity and at least one semiconductor device mounted thereon, wherein the lead-frame or lead-frame entity exposes a treated silver surface on at least one of the two faces thereof, wherein the treated silver surface(s) serve(s) the wire bonding, and wherein a resin is applied to the lead-frame or lead-frame entity, and which surface mount electronic device has excellent adhesion of the surface of the lead-frame or lead-frame entity even under severe testing conditions.

Abstract: The present disclosure relates to display substrate, display panel, and method for preparing the same. The display substrate comprises: a base substrate; and a common electrode on the base substrate, the common electrode having a hollowed-out portion corresponding to a signal line, wherein the signal line includes at least one of a gate line and a data line. The overlapping area of the common electrode and the signal line can be reduced, the load of the substrate can be reduced, such that the power consumption of the LCD panel can be reduced.

Abstract: A display panel and a display device are provided. The display panel includes: a display region and a non-display region surrounding the display region; multiple gate lines; and multiple data lines. The gate lines include regular gate lines and irregular gate lines. In the display region, the regular gate lines and the irregular gate lines are extended in a first direction, and a length of a part of the regular gate line in the display region is greater than a length of a part of the irregular gate line in the display region. The data lines include regular data lines and irregular data lines, and an extension direction of the regular data lines and the irregular data lines intersects with the first direction.

Abstract: A display panel including a substrate including a transmissive area, a first non-display area surrounding the transmissive area, and a display area that at least partially surrounds the first non-display area; a display element in the display area and including a pixel electrode; a plurality of scan lines extending from the display area, arranged in the first non-display area, and detouring along an edge of the transmissive area; a connection line in the first non-display area, at least partially overlapping the plurality of scan lines, and on a same layer as that of the pixel electrode; and a first line and a second line on a layer different from that of the connection line, wherein the first line and the second line are connected to the connection line through contact holes.

Abstract: An array substrate, a repair method thereof, and a display device are disclosed. The array substrate includes: a substrate including a first electrode and a second electrode, wherein the first electrode and the second electrode are located in different layers, and a projection of the first electrode on the substrate does not overlap a projection of the second electrode on the substrate; a first conductive layer electrically connecting the first electrode and the second electrode through vias; and a repairing component configured to electrically connect the first electrode and the second electrode when an electrical connection between the first electrode and the second electrode fails.

Abstract: To provide a support for supporting a flexible component and a light-emitting device. A first substrate, a second substrate, a rack, a pinion, and a hinge are provided. When the second substrate is moved, the rotational force of the pinion is transmitted to the rack of the first substrate and thus the first substrate is moved in the horizontal direction while being overlapped with one of hinge pieces of the hinge; accordingly, the flexible component can be bent while the flexible component is fixed to the first substrate and the second substrate and the allowable curvature radius is maintained in the vicinity of the hinge.

Abstract: A display panel and a display device, the display panel comprising: a substrate (1); a signal lead-out wire (2) arranged on the substrate, at least one end of the signal lead-out wire being exposed, the material of the signal lead-out wire comprising a metal, the signal lead-out wire being provided with a disconnected area (A); a heavily doped semiconductor material conductive portion (3) connecting the signal lead-out wire at the disconnected area. The present invention prevents poor display panel displaying caused by corrosion of exposed ends of signal lead-out wires.

Abstract: According to one embodiment, a display device includes a first substrate, a second substrate, a sealant, a liquid crystal layer, an organic insulating film, an alignment film and an inorganic insulating film. The second substrate is opposed to the first substrate. The sealant attaches the first substrate and the second substrate to each other. The liquid crystal layer is arranged between the first substrate and the second substrate. The organic insulating film, the alignment film and the inorganic insulating film are provided on the first substrate. The alignment film contacts the liquid crystal layer. The inorganic insulating film is located between the alignment film and the organic insulating film. At least part of the alignment film contacts the organic insulating film.

Abstract: A display device is disclosed, which includes: a substrate; a scan line having an extension direction, disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the gate electrode; source and drain electrodes disposed on the semiconductor layer; an insulating layer including a via hole and disposed on the drain electrode; a first transparent conductive layer disposed on the insulating layer, wherein a part of the first transparent conductive layer electrically connects to the drain electrode through the via hole; and a second transparent conductive layer disposed between the substrate and the first transparent conductive layer and not overlapping the via hole. Herein, the second transparent conductive layer has a first edge, the drain has a second edge, a minimum distance between the first edge and the second edge along a direction substantially perpendicular to the extension direction ranges from 0 ?m to 4 ?m.

Abstract: A display device includes a plurality of pixels arranged in a first direction; a first data line extending along a first edge of the pixel row; a second data line extending along a second edge of the pixel row; a first pixel connected to the first data line; and a second pixel adjacent to the first pixel and connected to the second data line. Each of the first and second pixels includes a light emitting diode, a first transistor to transmit a driving current to the light emitting diode, a second transistor to transmit a data signal to the first transistor, a third transistor to transmit the data signal having a compensated threshold voltage to the first transistor, and a fourth transistor to transmit an initialization voltage signal to the first transistor. The first and second transistors are PMOS transistors. The third and fourth transistors are NMOS transistors.

Abstract: The invention provides an array substrate and a method of making the same, wherein the array substrate includes: a base substrate; a metal layer formed on the base substrate; a passivation layer formed on the base substrate and the metal layer; a planarization layer formed on the passivation layer; a contact hole formed by etching the planarization layer and the passivation layer on the metal layer, to make the metal layer at least partially exposed by the contact hole, wherein a hole wall of the contact hole at the passivation layer is coplanar with the hole wall at the planarization layer or the hole wall of the contact hole at the passivation layer and the hole wall at the planarization layer form an obtuse angle; a continuous pixel electrode layer formed on the planarization layer and the contact hole, wherein the pixel electrode layer is connected to the metal layer.

Abstract: A display panel including a dimming panel and a display panel is provided. The dimming panel includes a light-shielding structure.

Abstract: A backlight module includes a light guide plate, a light source, a prism sheet and a reflective structure. The light guide plate includes a light emitting surface, a bottom surface opposite to the light emitting surface, a light incident surface connected with the light emitting surface and the bottom surface and a plurality of micro structures located on the bottom surface or the light emitting surface. The light source is disposed beside the light incident surface of the light guide plate. The prism sheet is disposed above the light emitting surface of the light guide plate, and includes a plurality of prisms facing the light emitting surface. The reflective structure is disposed under the bottom surface of the light guide plate. The reflective structure has a characteristic of changing its reflectivity according to a control signal applied thereto.

Abstract: A display apparatus includes a display area, in which an image is displayed, and a peripheral area, which is non-display area surrounding the display area. The display apparatus includes a plurality of pixels disposed in the display area, a data integrated circuit (IC) disposed in a first side portion of the peripheral area, the peripheral area is disposed adjacent to the display area, a gate IC disposed in a second side portion of the peripheral area, the display area is disposed between the first and second side portions, a data fan-out part disposed in the first side portion, the data fan-out part extends from the data IC to the display area, the data fan-out part includes a plurality of wires that are spaced apart from each other in a fanned out manner, and a gate connecting part, disposed in the peripheral area, electrically connected to the gate IC.

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

Abstract: The present invention overcomes image defects such as the brightness inclination or smears by reducing the line resistance of a power source bus line which supplies electricity to organic EL elements. A plurality of pixels which are arranged in a matrix array is connected to power source lines, and the plurality of power source lines are connected to a power source bus line. Both ends of the power source bus line are connected to a power source part via a FPC. By supplying electricity to both ends of the power source bus line from the power source part, the line resistance of the power source bus line can be reduced.