Details Of Electrical Connection Means (e.g., Terminal Or Lead) Patents (Class 361/306.1)
  • Patent number: 11056288
    Abstract: A metallic nanodendrite electrode and methods are shown. In one example, the metallic nanodendrite is coated with ruthenium oxide and is used as an electrode in a capacitor.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: July 6, 2021
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Cengiz S. Ozkan, Mihrimah Ozkan, Chueh Liu, Changling Li, Wei Wang
  • Patent number: 11037734
    Abstract: A mounting structure minimizes the influence of displacements, along a length direction of a resistor, in mounting positions of capacitor electrodes on the electrical characteristics of a circuit including a parallel circuit composed of a capacitor and the resistor. The capacitor has first and second electrodes, which respectively include first and second side surface portions disposed in parallel to a length direction of the resistor. The resistor has a first resistance body corresponding to the first side surface portions and a second resistance body corresponding to the second side surface portions that are separately disposed along the length direction and connected in series via a wire, and is mounted so that the first resistance body is positioned directly facing the first side surface portions and the second resistance body is positioned directly facing the second side surface portions.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: June 15, 2021
    Assignee: HIOKI E.E. CORPORATION
    Inventors: Shuhei Yamada, Kazunobu Hayashi, Kenichi Seki, Hajime Yoda, Toshio Heishi
  • Patent number: 11024462
    Abstract: A method of manufacturing a ceramic electronic component includes forming a dielectric layer including a plurality of ceramic nanosheets on a first electrode, treating the dielectric layer with an acid, and forming a second electrode on the dielectric layer, a ceramic electronic component, and an electronic device.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: June 1, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Yoon Chui Son, Minoru Osada, Takayoshi Sasaki, Chan Kwak, Doh Won Jung, Youngjin Cho
  • Patent number: 11017948
    Abstract: A multilayer ceramic electronic component includes a ceramic body including a dielectric layer, and a first internal electrode and a second internal electrode facing each other with the dielectric layer interposed therebetween, and a first external electrode electrically connected to the first internal electrode, and a second external electrode electrically connected to the second internal electrode, disposed in an outer portion of the ceramic body, the first and second external electrodes comprise a first electrode layer including a conductive metal, a first plating layer disposed on the first electrode layer and including nickel (Ni), and a second plating layer disposed on the first plating layer and including tin (Sn), and a ratio (t1/t2) is within a range from 1.0 to 9.0, where t1 is a thickness of the first plating layer including nickel (Ni), and t2 is a thickness of the second plating layer including tin (Sn).
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: May 25, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Woo Song, Min Gon Lee, Sang Soo Park, Jin Man Jung, Woo Chul Shin, Jin Kyung Joo
  • Patent number: 10984953
    Abstract: An electronic device assembly includes a first electronic device, a second electronic device, and a connection member. The first electronic device includes a first metal terminal configured to hold a first chip component. The second electronic device includes a second metal terminal configured to hold a second chip component. The connection member connects the first electronic device and the second electronic device.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 20, 2021
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Sunao Masuda, Masahiro Mori, Kayou Matsunaga, Kosuke Yazawa
  • Patent number: 10930435
    Abstract: A multilayer element includes a multilayer body defined by stacking base layers, inductor electrodes, a capacitor electrode on an outer portion, and outer terminals. Inductors are defined using the inductor electrodes. The inductors are connected between the outer terminals, and the inductors are connected to the capacitor electrode. The multilayer element may be easily used to make an LC filter by placing a metal shield opposite a capacitor electrode to define a capacitance between the capacitor electrode and the metal shield.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: February 23, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hirokazu Yazaki
  • Patent number: 10923277
    Abstract: Relatively low noise capacitors are provided for surface mounted applications. Electro-mechanical vibrations generate audible noise, which are otherwise relatively reduced through modifications to MLCC device structures, and/or their mounting interfaces on substrates such as printed circuit boards (PCBs). Different embodiments variously make use of flexible termination compliance so that surface mounting has reduced amplitude vibrations transmitted to the PCB. In other instances, side terminal and transposer embodiments effectively reduce the size of the mounting pads relative to the case of the capacitor, or a molded enclosure provides standoff, termination compliance and clamping of vibrations.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: February 16, 2021
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Carl L. Eggerding
  • Patent number: 10910320
    Abstract: A shielded metal-oxide-metal (MOM) capacitor includes a substrate, a lower shielding plate disposed on the substrate and in parallel with a major surface of the substrate, an upper shielding plate situated above the lower shielding plate and in parallel with the lower shielding plate, and a middle plate sandwiched between the lower shielding plate and the upper shielding plate. The middle plate includes two parallel first connecting bars extending along a first direction, a plurality of first fingers extending between the two parallel first connecting bars along a second direction, and an electrode strip spaced apart from and surrounded by the two parallel first connecting bars and the first fingers.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: February 2, 2021
    Assignee: MEDIATEK INC.
    Inventor: Shi-Bai Chen
  • Patent number: 10903118
    Abstract: Chamferless via structures and methods of manufacture are provided. The method includes: forming at least one non-self-aligned via within at least dielectric material; plugging the at least one non-self-aligned via with material; forming a protective sacrificial mask over the material which plugs the at least one non-self-aligned via, after a recessing process; forming at least one trench within the dielectric material, with the protective sacrificial mask protecting the material during the trench formation; removing the protective sacrificial mask and the material within the at least one non-self-aligned via to form a wiring via; and filling the wiring via and the at least one trench with conductive material.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: January 26, 2021
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC.
    Inventors: Mark L. Lenhardt, Frank W. Mont, Brown C. Peethala, Shariq Siddiqui, Jessica P. Striss, Douglas M. Trickett
  • Patent number: 10854547
    Abstract: A package and method of manufacturing a package is disclosed. In one example, the package includes an electronic chip and a dielectric structure comprising a highly filled cross-linked thermoplastic material.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: December 1, 2020
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Georg Meyer-Berg, Guenter Tutsch
  • Patent number: 10790092
    Abstract: A multilayer ceramic electronic component includes first and second electronic component bodies and first and second metal terminals. The first and second electronic component bodies are vertically stacked with a gap therebetween. The first metal terminal includes terminal joining portions, a first inter-component extending portion, a first extending portion, and a first mounting portion. The second metal terminal includes terminal joining portions, a second inter-component extending portion, a second extending portion, and a second mounting portion. The first and second inter-component extending portions are disposed in the gap between the first electronic component body and the second electronic component body.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: September 29, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masakazu Itamochi
  • Patent number: 10777353
    Abstract: A method of manufacturing an electronic device includes preparing a chip component with a terminal electrode. A terminal plate is prepared. A connection member is placed between an end surface of the terminal electrode and an inner surface of the terminal plate. The terminal plate and the terminal electrode are joined using the connection member by bringing a press head into contact with an outer surface of the terminal plate and pressing and heating the terminal plate against the terminal electrode.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 15, 2020
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Kenichi Inoue, Sunao Masuda, Masahiro Mori, Kayou Matsunaga, Kosuke Yazawa
  • Patent number: 10770204
    Abstract: An electrical device with a soldered joint is disclosed. In an embodiment, an electrical device includes at least one soldered joint having a first wire soldered at one end to the device, wherein the first wire bears with a bearing surface on the device, and wherein the first wire has at least one bend in a region of the bearing surface of the first wire on the device.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: September 8, 2020
    Assignee: TDK Electronics AG
    Inventors: Gerald Kloiber, Heinz Strallhofer
  • Patent number: 10734142
    Abstract: In a method for manufacturing an electronic component, a step of providing an outer electrode includes a step of providing a sintered layer including a sintered metal, a step of providing a reinforcement layer not containing Sn but including Cu or Ni, a step of providing an insulation layer, and a step of providing a Sn-containing layer. The sintered layer extends from each end surface of an element assembly onto at least one main surface thereof to cover Bich. The reinforcement layer covers the sintered layer entirely. The insulation layer is directly provided on the reinforcement layer at each end surface of the element assembly and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the reinforcement layer except for a portion of the reinforcement layer that is covered by the insulation layer, and defines another portion of the surface of the outer electrode.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: August 4, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Haruhiko Mori, Hiroyuki Otsuna
  • Patent number: 10650967
    Abstract: An electrical storage capacitor provides a primary electrode is in electrical communication with a primary conducting layer having thickness in the range of 20 nm to 100 micron, a secondary electrode is in electrical communication with a secondary conducting layer having thickness in the range of 20 nm to 1 micron, a high energy density dielectric layer having relative dielectric permittivity greater than ?R?70 and thickness less than 1 micron that is formed between the primary electrode and the secondary electrode, wherein the high energy density dielectric has a dielectric polarization response that is determined solely by orbital deformations of the atomic species forming said high energy density dielectric.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: May 12, 2020
    Inventor: L. Pierre de Rochemont
  • Patent number: 10650975
    Abstract: A multilayer electronic component includes: a first frame terminal including a first side frame, a first bottom frame and a first top frame; a second frame terminal including a second side frame, a second bottom frame and a second top frame; an electronic component including first and second external electrodes, and disposed between the first and second side frames; a first conductive adhesive disposed between the first external electrode and an upper portion of the first frame terminal; and a second conductive adhesive disposed between the second external electrode and an upper portion of the second frame terminal, wherein space portions are provided between the first and second external electrodes and lower portions of the first and second side frames and between the first and second external electrodes and the first and second bottom frames, respectively.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: May 12, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Beom Joon Cho
  • Patent number: 10650977
    Abstract: A method of manufacturing a ceramic electronic component includes forming a dielectric layer including a plurality of ceramic nanosheets on a first electrode, treating the dielectric layer with an acid, and forming a second electrode on the dielectric layer, a ceramic electronic component, and an electronic device.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: May 12, 2020
    Assignees: SAMSUNG ELECTRONICS CO., LTD., NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Yoon Chul Son, Minoru Osada, Takayoshi Sasaki, Chan Kwak, Doh Won Jung, Youngjin Cho
  • Patent number: 10593862
    Abstract: The present invention provides a lead-free piezoelectric material having a high piezoelectric constant over a wide operating temperature region. Therefore, the present invention relates to a piezoelectric material including a perovskite-type metal oxide represented by general formula (1) below as a main component, wherein the average valence, of Sn contained in the general formula (1) lies between 2 and 4. (BavCawSnxTiyZrz)O3 (where 0.620?v?0.970,0.010?w?0.200,0.030?x?0.230,0.865?y?0.990,0?z?0.085, and 1.986?v+w+x+y+z?2.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: March 17, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Makoto Kubota, Hisato Yabuta, Shunsuke Murakami, Kaoru Miura, Kanako Oshima
  • Patent number: 10580576
    Abstract: A multilayer ceramic electronic component includes: a body part including dielectric layers and internal electrodes disposed to face each other with respective dielectric layers interposed therebetween; and external electrodes disposed on an outer surface of the body part and electrically connected to the internal electrodes. The dielectric layer includes grains including: a semiconductive or conductive grain core region containing a base material represented by ABO3, where A is at least one of Ba, Sr, and Ca, and B is at least one of Ti, Zr, and Hf, and a doping material including a rare earth element; and an insulating grain shell region enclosing the grain core region.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: March 3, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Woo Kim, Chang Hak Choi, Kang Heon Hur, Seok Hyun Yoon, Seung Ho Lee
  • Patent number: 10559426
    Abstract: An electronic device includes a chip component and an external terminal. The chip component includes a terminal electrode formed on an end surface of a ceramic element body containing an internal electrode. The external terminal includes a first end electrically connected with the terminal electrode and a second end disposed opposite to the first end and connected with a mounting surface. The external terminal includes a first metal and a second metal different from the first metal. The first metal and the second metal are alternately exposed on a surface of the external terminal.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: February 11, 2020
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Sunao Masuda, Masahiro Mori, Kayou Matsunaga, Kosuke Yazawa
  • Patent number: 10553355
    Abstract: An electronic component, a board having the same, and a method of manufacturing a metal frame for the electronic component. The electronic component includes a multilayer ceramic capacitor including a plurality of external electrodes formed on opposing surfaces of a capacitor body, respectively; and metal frames bonded to the external electrodes, respectively, wherein each of the metal frames includes an inner support portion, an outer support portion disposed on an outer surface of the inner support portion, and a connecting portion connecting portions of the inner support portion and the outer support portion to each other.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Jae Young Na
  • Patent number: 10537025
    Abstract: A capacitor includes a body, first and second external electrodes, and first and second auxiliary external electrodes. The body includes first and second internal electrodes each having first and second lead portions exposed to one surface of the body. The first and second external electrodes are disposed on the one surface of the body and electrically connected to the first and second internal electrodes, respectively. The first and second auxiliary external electrodes are electrically connected to the first and second external electrodes, respectively, and cover portions of surfaces of the body connected to the one surface of the body.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: January 14, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Su Youn You, Jae Yeol Choi, Hyun Hee Gu, Byoung-Jin Chun
  • Patent number: 10460874
    Abstract: In an embodiment, an electronic component with metal terminals includes: an electronic component 10 having a component body 11 of roughly rectangular solid shape, as well as external electrodes 12 provided on the ends thereof in the first direction d1, respectively; and metal terminals 20 provided in sets of two on each external electrode 12. Each metal terminal 20 has a first planar part 21 and a second planar part 23 oriented differently from the first planar part 21; the first planar part 21 is connected to each external electrode 12 in a manner facing one face of the component body 11; and the second planar part 23 is positioned in a manner facing at least partially, across a clearance 24, another face adjoining the one face of the component body 11, while being fixed to the component body 11 by an adhesive 40 provided in the clearance 24.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: October 29, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Tetsuo Shimura, Yosuke Nakada
  • Patent number: 10453612
    Abstract: A multilayer ceramic capacitor includes a laminate and first and second external electrodes that each include first and second underlying electrode layers, first and second conductive resin layers, and first and second plating layers. The first underlying electrode layer includes a portion not covered with the first conductive resin layer on an end surface of the laminate, and the first plating layer is disposed on a surface of the portion of the first underlying electrode layer. The second underlying electrode layer includes a portion not covered with the second conductive resin layer on an end surface of the laminate, and the second plating layer is disposed on a surface of the portion of the second underlying electrode layer.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: October 22, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Terashita, Hidetaka Sugiyama
  • Patent number: 10413162
    Abstract: An image sensor includes: a light reception unit; first transfer lines; a constant current source; second transfer lines; a reading unit; a control unit; a dielectric interposed between the first and second transfer lines formed in pairs; a first chip including at least the light reception unit, the plurality of first transfer lines, and the constant current source, each being mounted on the first chip; and a second chip including at least the second transfer lines mounted on the second chip. The first chip is configured such that the second chip is stacked on a back surface of a light receiving surface of the light reception unit, and each of the second transfer lines is arranged at a position facing one of the first transfer lines with the dielectric interposed between the first and second transfer lines.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: September 17, 2019
    Assignee: OLYMPUS CORPORATION
    Inventor: Satoru Adachi
  • Patent number: 10418181
    Abstract: Capacitors having form factors (e.g., dimensions and functionality) comparable with traditional single layer capacitors, but with considerably higher capacitance and methods of their manufacture are provided. Capacitors and methods that implement capacitors where at least one of the dielectric layers is reduced in thickness post firing to produce a device robust enough for automated handling and provide a stable surface for wire-bonding are also provided. Capacitors and methods that implement an internal electrode between at least two layers of pre-fired ceramic dielectric are also provided. Capacitors and methods that implement the integration of multiple dielectric types in a single device producing high frequency performance characteristics are also provided. Capacitors and dielectrics that implement the combination of a multi-layer capacitor with a thin single layer capacitor to further increase operating frequency and capacitance are also provided.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: September 17, 2019
    Assignee: Eulex Components Inc
    Inventors: Ali Moalemi, Euan Patrick Armstrong
  • Patent number: 10403433
    Abstract: A multilayer electronic component includes a first capacitor including a first multilayer body having a structure in which a plurality of internal electrodes and a plurality of dielectric layers are alternately stacked, a second capacitor including a second multilayer body disposed adjacent the first multilayer body, the second multilayer body connected to the first multilayer body in parallel, and the second multilayer body having a structure in which a plurality of internal electrodes and a plurality of dielectric layers are alternately stacked, a fixing member fixing the first and second multilayer bodies, a first lead terminal connected to a first end portion of the fixing member, and a second lead terminal connected to a second end portion of the fixing member.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: September 3, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Woo Jin Choi
  • Patent number: 10347428
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure having an internal electrode and a dielectric layer alternately stacked; external electrodes provided on a first and second faces of the multilayer structure, wherein t12√óL1/N is equal to or more than 0.1, when a distance between a first edge positioned at outermost of edges of the plurality of internal electrodes that are not connected to the first external electrode or the second external electrode in an array direction of the first external electrode and the second external electrode and a second edge positioned at innermost of edges of the plurality of internal electrodes that are not connected to the first external electrode or the second external electrode in the array direction is L1 (mm), each thickness of the plurality of dielectric layers is t1 (?m), and a stack number of the plurality of dielectric layers is N.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: July 9, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masaki Mochigi, Yousuke Nakada, Shinichi Tsunoda, Yasuyuki Mashimo
  • Patent number: 10283277
    Abstract: A substrate module includes capacitors, a first coupling conductor, and a mounting substrate. The first coupling conductor couples two of the capacitors together. The mounting substrate includes a first power supply layer and a second power supply layer. The capacitors each include a first electrode, a second electrode, a first terminal conductor, a second terminal conductor, and a third terminal conductor. The first terminal conductor is coupled to the first electrode and to the first power supply layer. The second terminal conductor is coupled to the second electrode and to the second power supply layer. The third terminal conductor is coupled to the first coupling conductor. The third terminal conductor is coupled to the first electrode at a coupling position that is different from a coupling position of the first terminal conductor.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: May 7, 2019
    Assignee: TDK CORPORATION
    Inventor: Tatsuya Fukunaga
  • Patent number: 10285271
    Abstract: A multilayer ceramic electronic component includes a multilayer ceramic capacitor, first and second metal frames, and an insulating cover. The multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked together and first and second internal electrodes alternately disposed between pairs of adjacent dielectric layers, and external electrodes disposed on two end surfaces of the ceramic body opposite each other in a length direction orthogonal to the stacking direction. The first and second metal frames are each disposed along a respective one of two end surfaces of the multilayer ceramic capacitor opposite each other in the length direction, and are each disposed along upper and lower surfaces of the multilayer ceramic capacitor. The insulating cover is disposed to enclose the multilayer ceramic capacitor and upper surfaces of the first and second metal frames. A board can have the multilayer ceramic electronic component mounted thereon.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Heung Kil Park, Jong Hwan Park, Young Ghyu Ahn
  • Patent number: 10242805
    Abstract: An electronic device includes a plurality of chip components and an external terminal. The chip components are provided with a terminal electrode formed on an end surface of a ceramic element body. The external terminal is electrically connected with the terminal electrodes to support the plurality of chip components adjacently in a first direction. The external terminal includes a terminal electrode connection part arranged to face the terminal electrode and a mounting connection part connectable with a mounting surface. The terminal electrode connection part is provided with a plurality of convex portions protruding toward the terminal electrode. At least one of the plurality of convex portions is respectively connected with each terminal electrode of the plurality of chip components.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: March 26, 2019
    Assignee: TDK CORPORATION
    Inventors: Sunao Masuda, Katsumi Kobayashi
  • Patent number: 10186380
    Abstract: A capacitor component includes a body, a plurality of internal electrodes disposed in the body, connection electrodes extended in a thickness direction of the body and electrically connected to the plurality of internal electrodes, upper electrodes disposed on an upper surface of the body and electrically connected to the connection electrodes, and lower electrodes disposed on a lower surface of the body and electrically connected to the connection electrodes A thickness of the upper electrodes is different from that of the lower electrodes, and an area of contact between the upper electrodes and the body is different from an area of contact between the lower electrodes and the body.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: January 22, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Taek Jung Lee, Hyo Youn Lee, Won Young Lee, Sung Kwon An, Jae Yeol Choi, Jin Kyung Joo
  • Patent number: 10115523
    Abstract: A ceramic electronic component includes a multilayer body, an electronic component main body including first and second outer electrodes on the surface of multilayer body, a first substrate connection terminal bonded to at least one of the first outer electrode and the multilayer body by a bonding material that is electrically insulating, and a first metal terminal electrically connecting the first outer electrode and the first substrate connection terminal, in which, while the first metal terminal maintains an elastically deformed state, a first end portion thereof is bonded to the first outer electrode by an electrically conductive bonding material, and a second end portion thereof is bonded to the first substrate connection terminal by a bonding section with a different melting point from that of the bonding material.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: October 30, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Teppei Akiyoshi
  • Patent number: 10109425
    Abstract: Disclosed herein are a multilayer capacitor, a method for manufacturing the same, and an electronic device using the same. A multilayer capacitor including internal electrodes stacked in a dielectric so as to be spaced apart from each other, alternately connected to external electrodes formed on both sides of the dielectric, and formed so that width sizes of connection sections connected to the external electrodes are decreased as compared with those of overlapped sections overlapped with each other while vertically neighboring to each other in at least portions of a stacked structure is suggested. In addition, an electronic device using the multilayer capacitor and a method for manufacturing the multilayer capacitor are suggested.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: October 23, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Sung Woo Kim
  • Patent number: 10079417
    Abstract: A transmission line portion of a flat cable includes first regions and second regions connected alternately. In the first region, the transmission line portion is a flexible tri-plate transmission line including a dielectric element including a signal conductor, a first ground conductor including opening portions, and a second ground conductor which is a solidly filled conductor. In the second region, the transmission line portion is a hard tri-plate transmission line including a wide dielectric element including a meandering conductor, and a first ground conductor and a second ground conductor which are solidly filled conductors. A variation width of the characteristic impedance in the second region is larger than a variation width of the characteristic impedance in the first region.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: September 18, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Noboru Kato, Satoshi Ishino, Jun Sasaki, Kuniaki Yosui, Takahiro Baba, Nobuo Ikemoto
  • Patent number: 10068707
    Abstract: A stacked MLCC capacitor is provided wherein the capacitor stack comprises multilayered ceramic capacitors wherein each multilayered ceramic capacitor comprises first electrodes and second electrodes in an alternating stack with a dielectric between each first electrode and each adjacent second electrode. The first electrodes terminate at a first side and the second electrodes second side. A first transient liquid phase sintering conductive layer is the first side and in electrical contact with each first electrode; and a second transient liquid phase sintering conductive layer is on the second side and in electrical contact with each second electrode.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: September 4, 2018
    Assignee: KEMET Electronics Corporation
    Inventors: John E. McConnell, Garry L. Renner, John Bultitude, Allen Hill
  • Patent number: 10056320
    Abstract: An electronic component is provided with improved thermal stability. The electronic component comprises at least one capacitive element wherein the capacitive element comprises internal electrodes of alternating polarity separated by a dielectric. External terminations with a first external termination of the external terminations are in electrical contact with internal electrodes of a first polarity and a second external termination of the external terminations are in electrical contact with internal electrodes of a second polarity. A first external lead frame is in electrical contact with the first external termination with a conductive bond there between wherein the first external lead frame comprises at least one feature selected from the group consisting of a perforation, a protrusion and an edge indentation.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: August 21, 2018
    Assignee: KEMET Electronics Corporation
    Inventors: Jeffrey S. Murrell, Lonnie G. Jones, Jeffrey W. Bell
  • Patent number: 10057977
    Abstract: A wiring board includes a first wire, a second wire, a third wire and a fourth wire formed over a substrate and extending in a first direction respectively, the second wire being adjacent to the first wire in the first direction, and the third wire being adjacent to the first wire in a second direction orthogonal to the first direction, and the fourth wire being adjacent to the second wire in the second direction, a pair of fifth wires, a pair of sixth wires, a pair of seventh wires and a pair of eighth wires formed in the substrate and extending in the second direction respectively, a pair of ninth signal vias, a pair of tenth signal vias, a pair of eleventh signal vias and a pair of twelfth signal vias formed in the substrate and extending in a third direction orthogonal to a surface of the substrate respectively.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: August 21, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Kenichi Kawai
  • Patent number: 10056194
    Abstract: A capacitor provides a plurality of selectable capacitance values, by selective connection of six capacitor sections of a capacitive element each having a capacitance value. The capacitor sections are provided in a plurality of wound cylindrical capacitive elements. Two vertically stacked wound cylindrical capacitance elements may each provide three capacitor sections. There may be six separately wound cylindrical capacitive elements each providing a capacitor section. The capacitor sections have a common element terminal.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: August 21, 2018
    Assignee: American Radionic Company, Inc.
    Inventor: Robert M. Stockman
  • Patent number: 9997296
    Abstract: A multilayer ceramic electronic component includes a ceramic body having a stacked plurality of dielectric layers and first and second end portions and a plurality of lateral surfaces. A plurality of internal electrodes stacked in the ceramic body face each other with respective dielectric layers interposed therebetween and exposed to first and second lateral surfaces of the ceramic body opposing each other through respective lead portions thereof. At least two first external electrodes and at least two second external electrodes are provided on the first and second lateral surfaces to be connected to the respective lead portions, respectively. An insulation layer is provided on the first and second lateral surfaces of the ceramic body except for the first and second external electrodes.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: June 12, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Kwon Oh, Jae Wook Lee, Min Sung Choi, Jae Yeol Choi
  • Patent number: 9950965
    Abstract: A ceramic element includes: a ceramic body; a first coating layer disposed on a first part of a front surface of the ceramic body; and a second coating layer disposed on a second part of a back surface of the ceramic body. The first coating layer continuously extends from the front surface to a first region of a side surface of the ceramic body, the side surface being a machined surface, and the first region being a front side region of the side surface. The second coating layer continuously extends from the back surface to a second region of the side surface of the ceramic body, the second region being a back side region of the side surface. In the machined surface, one of the first and second coating layers is disposed at least partially on the other of the first and second coating layers.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: April 24, 2018
    Assignee: NGK Insulators, Ltd.
    Inventors: Masayuki Uetani, Masaki Hattori
  • Patent number: 9916929
    Abstract: A first metal terminal includes a first connection portion connected to an electrode portion of a second external electrode, and a first leg portion extending from the first connection portion. A second metal terminal includes a second connection portion connected to a conductor portion of a connection conductor, and a second leg portion extending from the second connection portion. A multilayer capacitor and an overcurrent protection device are disposed in such a manner that a first principal surface and a third side surface oppose each other. An electrode portion of a first external electrode and an electrode portion of a fourth external electrode are connected to each other.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: March 13, 2018
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Sunao Masuda, Masahiro Mori, Kayou Kusano
  • Patent number: 9842699
    Abstract: A multilayer ceramic capacitor may include: ceramic body including a plurality of dielectric layers and a plurality of internal electrodes, external electrodes including a connecting portion and band portion, terminal electrodes including upper and lower horizontal portion and vertical portion connecting end portion of the upper and lower horizontal portion and the conductive adhesive layers disposed to the upper surface of the band portion and upper horizontal portion.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: December 12, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Heung Kil Park, Sang Soo Park
  • Patent number: 9805865
    Abstract: A ceramic electronic component has a ceramic element assembly, external electrodes, and metal terminals. The external electrodes are arranged on the surface of the ceramic element assembly. The external electrodes contain a sintered metal. The metal terminals are electrically connected to the external electrodes, respectively. The external electrode and the metal terminal are directly diffusion-bonded by diffusion of metal in the metal terminals into the external electrodes. The above arrangement provides a ceramic electronic component having highly reliable metal particle bonding and a method for manufacturing the same.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: October 31, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideki Otsuka, Kazuhiro Yoshida, Jun Sonoyama, Yoji Itagaki, Akihiko Nakata
  • Patent number: 9805866
    Abstract: A laminated ceramic electronic component includes a ceramic body, first and second inner electrodes within the ceramic body and including opposed portions opposed to each other in the thickness direction of the ceramic body, a first terminal electrode electrically connected to the first inner electrode, and a second terminal electrode electrically connected to the second inner electrode. The widthwise distance between first widthwise edges and second widthwise edges of the first and second terminal electrodes are smaller, in plan view, than widths of the first and second inner electrodes at the opposed portions.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: October 31, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shunsuke Takeuchi, Masashi Nishimura
  • Patent number: 9796636
    Abstract: Disclosed herein is a method of: placing between a cooling element and an opposing surface a slurry of: a dielectric powder containing barium titanate, a dispersant, a binder, and water; maintaining the cooling element at a temperature below the opposing surface to cause the formation of ice platelets perpendicular to the surface of the cooling element and having the powder between the platelets; subliming the ice platelets to create voids; sintering the powder to form the dielectric material; and filling the voids with the polymeric material. The process can produce a composite having: a sintered dielectric material of barium titanate and platelets of a polymeric material embedded in the dielectric material. Each of the platelets is perpendicular to a surface of the composite.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: October 24, 2017
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Edward P. Gorzkowski, III, Ming-Jen Pan
  • Patent number: 9666371
    Abstract: A multilayer ceramic capacitor has a laminate comprising dielectric layers stacked alternately with internal electrode layers of different polarities, wherein: the dielectric layers contain ceramic grains whose primary component is BaTiO3; the ceramic grains contain at least one type of donor element (D) selected from the group that includes Nb, Mo, Ta, and W, and at least one type of acceptor element (A) selected from the group that includes Mg and Mn; and the ratio of the concentration of the donor element (D) and that of the acceptor element (A) (D/A) is greater than 1 at the center parts of the ceramic grains, while the D/A ratio is less than 1 at the outer edge parts of the ceramic grains (if A=0, then D/A=? and D=A=0 never occurs).
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: May 30, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Koichiro Morita, Chie Kawamura, Minoru Ryu, Katsuya Taniguchi, Kazumichi Hiroi, Yoshiki Iwazaki
  • Patent number: 9655249
    Abstract: A substrate with a built-in capacitor includes an insulating base material layer, a build-up layer formed on the insulating base material layer and including a conductor layer and an insulating layer, and a multilayer ceramic capacitor positioned in an opening of the base material layer and including internal electrodes, ceramic dielectric layers and a pair of external electrodes. The ceramic capacitor has a cuboid shape having long sides and short sides, the pair of external electrodes is formed on opposing long-side sides such that the external electrodes are separated by a distance in range of 30 ?m to 200 ?m and that each external electrode includes a conductive paste layer connected to a respective group of the internal electrodes and a copper plated layer covering the conductive paste layer, and the conductive paste layer includes Ni paste or Cu paste including glass component in range of 5% to 40%.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: May 16, 2017
    Assignees: IBIDEN CO., LTD., MURATA MANUFACTURING CO., LTD.
    Inventors: Toyotaka Shimabe, Masahiro Kaneko, Toshiki Furutani, Takeshi Tashima, Yasuyuki Shimada, Naoki Shimizu
  • Patent number: 9614522
    Abstract: The operating device, such as a human-machine interface, in particular for a vehicle component, is provided with a front wall having a front side that has several fixed symbol fields and having a rear side, a capacitive sensor system that has individual electrodes associated with the symbol fields, which electrodes are arranged on the rear side of the front wall, and a carrier plate that faces the rear side of the front wall and is arranged at a distance from the front wall.
    Type: Grant
    Filed: September 18, 2012
    Date of Patent: April 4, 2017
    Assignee: Behr-Hella Thermocontrol GmbH
    Inventors: Holger Kleine-Hollenhorst, Bernd Stich, Rainer Siebert
  • Patent number: 9607964
    Abstract: Embodiments describe a semiconductor package that includes a substrate, a die bonded to the substrate, and a solder paste overmold layer formed over a top surface of the die. In an embodiment, the solder paste comprises a high-melting point metal, a solder matrix, intermetallic compounds and a polymer. The overmold layer has a high elastic modulus, a coefficient of thermal expansion similar to the substrate, and reduces the warpage of the package. In an embodiment, interconnects of a semiconductor package are formed with a no-slump solder paste that includes vents. Vents may be formed through a conductive network formed by the high-melting point metal, solder matrix and intermetallic compounds. In an embodiment, vents provide a path through the interconnect that allows for moisture outgassing. In an embodiment, a mold layer may be mechanically anchored to the interconnects by the vents, thereby providing improved mechanical continuity to the mold layer.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 28, 2017
    Assignee: Intel Corporation
    Inventors: Omkar G. Karhade, Nitin A. Deshpande, Jr., Aditya Sundoctor Vaidya, Nachiket R. Raravikar, Eric J. Li