Abstract: A multilayer ceramic capacitor including, a ceramic body; a plurality of first and second internal electrodes disposed to be alternately exposed through first and second side surfaces facing each other in a width direction; and first and second external electrodes formed on the surfaces of the ceramic body in the length and thickness directions, wherein when a length of the ceramic body is defined as L, a width of the ceramic body is defined as W, a thickness of the ceramic body is defined as h, and a length of the first or second external electrode is defined as B, a ratio L/W of the length to the width of the ceramic body satisfies 1.4?L/W?2.1, and a relationship B×h/W between the thickness and the width of the ceramic body and the length of the first or second external electrode satisfies B×h/W?1.27.

Abstract: A monolithic ceramic electronic component includes an outer electrode including a first plating layer formed directly on a component body by electroless plating so as to cover an exposed portion distribution region including exposed portions of a plurality of inner electrodes and a second plating layer formed by electrolytic plating so as to cover the first plating layer. An amount of extension of the first plating E1 and an amount of extension of the second plating E2 satisfy the relationship E1/(E1+E2)?20%, where E1 represents a distance from an edge of the exposed portion distribution region to an edge of the first plating layer, and E2 represents a distance from the edge of the first plating layer to an edge of the second plating layer.

Abstract: The disclosure provides a method for producing a stack of layers on a semiconductor substrate. The method includes producing a substrate a first conductive layer; and producing by ALD a sub-stack of layers on said conductive layer, at least one of said layers of the sub-stack being a TiO2 layer, the other layers of the sub-stack being layers of a dielectric material having a composition suitable to form a cubic perovskite phase upon crystallization of said sub-stack of layers. Crystallization is obtained via heat treatment. When used in a metal-insulator-metal capacitor, the stack of layers can provide improved characteristics as a consequence of the TiO2 layer being present in the sub-stack.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body including a plurality of dielectric layers and having first and second main surfaces opposing each other, first and second side surfaces opposing each other, and first and second end surfaces opposing each other; first internal electrodes each having a first lead part exposed to the first side surface of the ceramic body; second internal electrodes respectively disposed to face the first internal electrodes, having at least one dielectric layer among the plurality of dielectric layers interposed therebetween, and each having a second lead part exposed to the first side surface of the ceramic body; first and second external electrodes connected to the first and second internal electrodes, respectively; a first conductive pattern connected to the second external electrode; and a second conductive pattern connected to the first external electrode.

Abstract: There are provided a multilayer ceramic electronic component and a board for mounting the same. The multilayer ceramic electronic component includes a hexahedral ceramic body including dielectric layers and satisfying T/W>1.0 when a width thereof is defined as W and a thickness thereof is defined as T; an active layer in which capacitance is formed, by including a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, having the dielectric layer interposed therebetween, an upper cover layer formed above the active layer; a lower cover layer formed below the active layer and having a greater thickness than the upper cover layer; and first and second external electrodes covering the end surfaces of the ceramic body, wherein when a thickness of the lower cover layer is defined as Tb, 0.03?Tb/T?0.25 is satisfied.

Abstract: An integrated circuit may include interconnects formed from alternating metal interconnect layers and inter-metal dielectric layers. A metal-insulator-metal capacitor may be formed within a selected inter-metal dielectric layer. The metal-insulator-metal capacitor may include first and second capacitor electrodes. The first capacitor electrode may contact a first conductive interconnect line in an underlying metal interconnect layer. The second capacitor electrode may overlap the first capacitor electrode and a portion of a second conductive interconnect line in the underlying metal layer. A via may be formed between the underlying metal interconnect layer and an additional metal interconnect layer. The via may simultaneously contact the second capacitor electrode and the second conductive interconnect line.

Abstract: In a monolithic ceramic electronic component, given that an interval between outer-layer dummy conductors adjacent to each other in an outer layer portion is d1, and that an interval between first and second inner electrodes adjacent to each other in an inner layer portion is d2, 1.7d2?d1 is satisfied. By reducing a density of the outer-layer dummy conductors in the outer layer portion on that condition, pressing of the inner electrodes through the outer-layer dummy conductors is relieved in a pressing step before firing. As a result, a distance between the inner electrodes can be prevented from being locally shortened. It is hence possible to effectively reduce and prevent degradation of reliability of the monolithic ceramic electronic component, e.g., a reduction of BDV.

Abstract: There is provided a card or token for use in financial transactions. The financial transaction token or card has an onboard energy storage device that enables onboard electronics to operate when the card is not in the proximity of a merchant Point-Of-Service (POS) terminal. In one implementation, the onboard energy storage device includes a capacitor such as a thin-film capacitor that stores sufficient energy to power onboard electronics without the need for an onboard battery. The card may be incorporated within various conventional apparatus such as a see-through and/or protective substrate, an item of clothing, an item of jewelry, a cell phone, a Personal Digital Assistant (PDA), a credit card, an identification card, a money holder, a wallet, a personal organizer, a keychain payment tag, and like personality.

Abstract: A multilayer ceramic capacitor whose external electrodes are each provided with a solder non-adhesion film made of material to which solder does not adhere, in a manner continuously covering the entire surface of the end face, and optionally the entire surface of the curved face thereof. The multilayer ceramic capacitor, with certainty, allows for suppression of noise accompanying electrostriction.

Abstract: An integrated circuit, including at least two integrated circuit portions mutually spaced on a single electrically insulating die and at least one coupling region on the die to provide capacitive coupling between the otherwise mutually isolated integrated circuit portions, the integrated circuit portions being formed by a plurality of layers on the single die, the layers including metal and dielectric layers and at least one semiconductor layer; wherein at least one of the dielectric layers extends from the integrated circuit portions across the coupling region and at least a corresponding one of the metal layers and/or at least one semiconductor layer extends from each of the integrated circuit portions and partially across the coupling region to form capacitors therein and thereby provide the capacitive coupling between the integrated circuit portions.

Abstract: There is provided a multilayer ceramic electronic component, including a ceramic body including dielectric layers, and having first and second main surfaces, first and second side surfaces and first and second end surfaces; first and second internal electrodes having overlap regions forming a capacitance part, the first internal electrodes having a first lead out portion to be exposed to the first side surface, and being alternately laminated with the second internal electrodes while being insulated therefrom, the second internal electrodes having a second lead out portion; first and second external electrodes connected to the first and second lead out portions, respectively; and an insulating layer formed on the first side surface, wherein a length of the first lead out portion is longer than that of the second lead out portion and the capacitance part has different distances from the first side surface.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces, a capacitor part formed in the ceramic body and including a first internal electrode exposed to the first and second end surfaces and a second internal electrode having a lead-out portion exposed to the first main surface, an internal connection conductor formed in the ceramic body and exposed to the first and second main surfaces, and first to fourth external electrodes formed on outer surfaces of the ceramic body and electrically connected to the first and second internal electrodes and the internal connection conductor, wherein the internal connection conductor is connected to the capacitor part in series.

Abstract: Devices and methods are provided for generating electrical power using a capacitor. The capacitor has a catalytic working electrode, a dielectric, and a counter electrode. Power is generated by flowing a fuel (e.g., hydrogen gas) over the working electrode, charging the capacitor (e.g. by applying a voltage), flowing an oxidant (e.g., oxygen gas) over the working electrode, and connecting the electrodes to a resistive load, which allows current to flow through the load, between the electrodes. The inverse device (i.e., oxidant first, then fuel) functions similarly.

Abstract: A multilayer ceramic capacitor may include: a ceramic body including a plurality of dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces; a capacitor part formed in the ceramic body and including first and second internal electrodes, the first internal electrode having a first lead exposed to the second main surface and the second internal electrode having a second lead exposed to the first main surface; resistor parts including first and second internal connection conductors formed on the same dielectric layers among the plurality of dielectric layers in the ceramic body; and first to fourth external electrodes, first and third connection terminals, and second and fourth connection terminals. The capacitor part and the resistor parts may be connected in series to one another.

Abstract: A length of a first-side outer electrode is E1, a length of a second-side outer electrode is E3, a length of a center outer electrode is E2, a distance between the first-side outer electrode and the center outer electrode is ME1, a distance between the center outer electrode and the second-side outer electrode is ME2, a length of a capacitor element is L, a width from an edge of the first side second extending portion closer to a third surface to the third surface is M1L, a width from an edge of the first side second extending portion closer to a fourth surface to an edge of the first-side outer electrode on a first surface is M1R, a width from an edge of the first extending portion closer to the third surface to an edge of the center outer electrode on the first surface closer to the third surface is M2L, and a width from an edge of the first extending portion closer to the fourth surface to an edge of the center outer electrode on the first surface closer to the fourth surface is M2R, such that E1+ME1+E2+ME

Abstract: There is provided a laminated ceramic electronic component, including a ceramic body including a dielectric layer; and first and second internal electrodes disposed to face each other, having the dielectric layer interposed therebetween within the ceramic body, wherein when a value of 1% is set to be D1, a value of 50% is set to be D50, and a value of 99% is set to be D99 in a cumulative distribution of dielectric grains by an average particle diameter thereof within the dielectric layer, 2?D99/D50?3 and 2?D50/D1?3 are satisfied. A high-capacity laminated ceramic electronic component may be implemented with improved adhesion between the dielectric layer and the internal electrode, and improved withstand voltage characteristics and excellent reliability may be implemented.

Abstract: There is provided a multilayer ceramic electronic part, including: a ceramic element having a plurality of dielectric layers laminated therein; a plurality of first and second internal electrodes each formed on at least one surface of each of the plurality of dielectric layers within the ceramic element, the first and second internal electrodes respectively including first and second lead parts extended therefrom to be exposed through one surface of the ceramic element; and first and second external electrodes formed on one surface of the ceramic element, and electrically connected to the first and second internal electrodes through exposed portions of the first and second lead parts, respectively, wherein a ratio of a width of the first or second lead part to a width of the first or second external electrode is 10 to 85%.

Abstract: A stacked leaded array is provided wherein the stacked leaded array allows for increased packing density of electronic components. The stacked leaded array has a multiplicity of electronic components in a stacked array. Each electronic component comprises a first termination and a second termination. A multiplicity of first leads are provided wherein each first lead is in electrical contact with at least one first termination. Second leads are in electrical contact with second terminations.

Abstract: In a method of manufacturing a laminate type electronic component, while the distance between adjacent exposed ends of a plurality of internal electrodes is adjusted preferably to be about 50 ?m or less, a plurality of conductive particles composed of Pd, Pt, Cu, Au, or Ag are provided on the surface of a component main body. The conductive particles have an average particle size of about 0.1 nm to about 100 nm, which are distributed in island-shaped configurations over the entire surface of the component main body, while the average distance between the respective conductive particles is adjusted to fall within the range of about 10 nm to about 100 nm. The component main body is subjected to electrolytic plating such that plating growth develops in and around a region including the respective exposed ends of the plurality of internal electrodes.

Abstract: The semiconductor device includes a capacitor including a plurality of interconnection layers stacked over each other, the plurality of interconnection layers each including a plurality of electrode patterns extended in a first direction, a plurality of via parts provided between the plurality of interconnection layers and electrically interconnecting the plurality of the electrode patterns between the interconnection layers adjacent to each other, and an insulating films formed between the plurality of interconnection layers and the plurality of via parts. Each of the plurality of via parts is laid out, offset from a center of the electrode pattern in a second direction intersecting the first direction, and the plurality of electrode patterns has a larger line width at parts where the via parts are connected to, and a distance between the electrode patterns and the adjacent electrode patterns is reduced at the parts.

Abstract: A laminated ceramic capacitor that includes dielectric layers stacked adjacent one another to form a laminated body; internal electrodes arranged between the dielectric layers; external electrodes along surfaces of the laminated body and connected to the internal electrodes; and a covering layer covering at least portions of sections of the laminated body between the laminated body and edges of the external electrodes. The external electrodes include a silver-containing layer containing at least Ag as its main constituent. The dielectric layers and the covering layer 30 contain, as their main constituent, a perovskite compound represented by a chemical formula ABO3, wherein A is at least one of Ba, Sr, and Ca, and B is at least one of Ti, Zr, and Hf. V is added to only the dielectric layers among the dielectric layers and the covering layer.

Abstract: Methods of forming a capacitor including forming a titanium nitride material within at least one aperture defined by a support material, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The titanium nitride material may be oxidized to a titanium dioxide material. A second conductive material may be formed over a surface of the titanium dioxide material. A semiconductor device may include at least one capacitor, wherein a major longitudinal portion of the at least one capacitor is not surrounded by a solid material. The capacitor may include a first electrode; a ruthenium oxide material laterally adjacent the first electrode; a rutile titanium dioxide material laterally adjacent the ruthenium oxide material; and a second electrode laterally adjacent the rutile titanium dioxide material.

Abstract: A circuit board comprises a signal routing layer, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first ground layer, a second ground layer, and a third ground layer. The signal routing layer includes chip traces, connector traces, and signal traces connected to components. The first dielectric layer, the first ground layer, the second dielectric layer, the second ground layer, the third dielectric layer, and the third ground layer, in that order, are located at gradually increasing distances from the signal routing layer. The first ground layer corresponds to the chip traces, the second ground layer corresponds to the signal traces, and the third ground layer corresponds to the connector traces.

Abstract: There is provided a multilayer ceramic capacitor includes a ceramic body including dielectric layers and having first and second main surfaces facing each other, first and second side surfaces facing each other, and first and second end surfaces facing each other; a capacitor part formed in the ceramic body and including a first internal electrode having a lead exposed to the first side surface and a second internal electrode exposed to the second end surface; first to third internal connecting conductors formed in the ceramic body and having at least one polarity; and first to fourth external electrodes electrically connected to the first and second internal electrodes and the first to third internal connecting conductors, wherein the first and second internal connecting conductors and the third internal connecting conductor are connected in parallel, and the first to third internal connecting conductors and the capacitor part are connected in series.

Abstract: A multilayer ceramic electronic component includes a hexahedral ceramic body including dielectric layers and having first and second main surfaces opposing each other in a thickness direction, first and second end surfaces opposing each other in a length direction, and first and second side surfaces opposing each other in a width direction; first and second internal electrodes stacked to have the dielectric layer interposed therebetween within the ceramic body and alternately exposed through the first and second end surfaces; and first and second external electrodes electrically connected to the first and second internal electrodes, respectively, and including first and second head parts formed on the first and second end surfaces, wherein width of the first and second head parts is less than width of the ceramic body, and when length, width and thickness of the ceramic body are defined as L, W, and T, respectively, T/W>1.0 is satisfied.

Abstract: There are provided a ceramic electronic component and a method of manufacturing the same. The ceramic electronic component includes: a ceramic element; and an internal electrode layer formed within the ceramic element, having a thickness of 0.5 ?m or less, and including a non-electrode region formed therein, wherein an area ratio of the non-electrode region to an electrode region of the internal electrode layer, in a cross section of the internal electrode layer is between 0.1% and 10%, and the non-electrode region includes a ceramic component.

Abstract: A method is used to manufacture a multilayer electronic component including a multilayer composite including internal electrodes having ends that are exposed at a predetermined surface of the multilayer composite. In the method, the exposed ends of the internal electrodes are coated with a metal film primarily composed of at least one metal selected from the group consisting of Pd, Au, Pt and Ag and having a thickness of at least about 0.1 ?m by immersing the multilayer composite in a liquid containing a metal ion or a metal complex. Then, a continuous plating layer is formed by depositing a plating metal on the ends of the internal electrodes exposed at the predetermined surface of the multilayer composite, and subsequently growing the deposits of the plating metal so as to be connected to each other. Thus, exposed ends of the internal electrodes are electrically connected to each other.

Abstract: A zirconium oxide based dielectric material is used in the formation of decoupling capacitors employed in microelectronic logic circuits. In some embodiments, the zirconium oxide based dielectric is doped. In some embodiments, the dopant includes at least one of aluminum, silicon, or yttrium. In some embodiments, the zirconium oxide based dielectric is formed as a nanolaminate of zirconium oxide and a dopant metal oxide.

Abstract: An electromagnetic interference filter for various electronic devices such as implantable medical devices is provided. A plurality of signal electrodes can be configured in an array, where each signal electrode extends vertically from a top surface to a bottom surface of the filter such that the signal electrodes are flush with the top and bottom surface. Ground or common electrodes can have a parallel arrangement and be interposed between the signal electrodes. The ground electrodes can be grounded internally, externally, or both internally and externally. Dielectric material can be disposed between signal electrodes and ground electrodes to act as an insulator between adjacent electrodes.

Abstract: A multilayer ceramic electronic component includes: a ceramic main body; a plurality of internal electrodes laminated within the ceramic main body; and external electrodes formed on outer surfaces of the ceramic main body and electrically connected to the internal electrodes, wherein an average thickness of the external electrodes is 10 ?m or less, and when a thickness of the external electrodes in a central portion of the ceramic main body in a width direction is Tc and a thickness of the external electrodes at a lateral edge of a printed surface region of the internal electrodes is T1, 0.5?|T1/Tc|?1.0 is satisfied.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including dielectric layers, first and second internal electrodes formed within the ceramic body and disposed to face each other, having the dielectric layer interposed therebetween, first and second electrode layers disposed on outer surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively, a conductive resin layer disposed on the first and second electrode layers and containing copper powder, a nickel plating layer disposed on an outer portion of the conductive resin layer, and a copper-nickel alloy layer disposed between the conductive resin layer and the nickel plating layer and having a thickness of 1 to 10 nm.

Abstract: A method for manufacturing a multilayer electronic component includes the steps of preparing a laminate including a plurality of laminated insulating layers and a plurality of internal electrodes disposed along interfaces between the insulating layers, edges of the internal electrodes being exposed at a predetermined surface of the laminate, and forming an external electrode on the predetermined surface to electrically connect exposed the edges of the internal electrodes. The step of forming an external electrode includes a plating step of forming a continuous plating film by depositing plating deposits on the edges of the internal electrodes exposed at the predetermined surface and by performing plating growth to be connected to each other, and a heat treatment step of performing a heat treatment at an oxygen partial pressure of about 5 ppm or less and at a temperature of about 600° C. or more.

Abstract: There is provided a multilayer ceramic electronic component includes: a ceramic body including dielectric layers stacked therein and satisfying T(thickness)/W(width)>1.0; first and second internal electrodes disposed to face each other in the ceramic body, having the dielectric layer disposed therebetween, and alternately exposed through end surfaces of the ceramic body; and first and second external electrodes extended from the end surfaces of the ceramic body to upper and lower main surfaces of the ceramic body wherein, when a height of the ceramic body is defined as a, and a distance from an upper end of the first or second external electrode formed on the upper main surface of the ceramic body to a lower end of the first or second external electrode formed on the lower main surface of the ceramic body is defined as b, 0.990?a/b<1 is satisfied.

Abstract: A ceramic electronic component comprising; including a chip component of approximately rectangular parallelepiped, a first metal terminal portion having a first flat plate portion facing a first end face, at least a pair of first fitting arm portions connected to the first flat plate portion, having a first engagement projection engaging with a first wraparound portion holding the first wraparound portion in between, and a first mounting portion connected to the first flat plate portion and extending approximately parallel to one side face, and a second metal terminal portion having a second flat plate portion facing the second end face, at least a pair of second fitting arm portions connected to the second flat plate portion, having a second engagement projection engaging with a second wraparound portion, holding the second wraparound portion in between, and a second mounting portion extending approximately parallel to one side face.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having first and second side surfaces opposite to each other, and third and fourth end surfaces connecting the first and second side surfaces; a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third or fourth end surface; and first and second side margin parts formed from the first and second side surfaces to respective edges of the internal electrodes, the first and second side margin parts having an average thickness of 18 ?m or less, wherein when a boundary surface between a cover layer and the first or second side margin part in the ceramic body is divided into two regions in a thickness direction of the ceramic body, a region adjacent to the internal electrode is S1, and a porosity of S1 is P1, 1?P1?20 is satisfied.

Abstract: There are provided a multilayer ceramic electronic component and a method of manufacturing the same. Here, an average diameter (Dc) of ceramic grains in a cover area is smaller than an average diameter (Da) of ceramic grains in the active area, and when a thickness of the cover area is expressed by Tc, 9 um?Tc?25 um and Tc/Dc?55 are satisfied. A multilayer ceramic capacitor having excellent moisture-resistance properties may be obtained.

Abstract: A multilayer chip capacitor includes: a capacitor main body; a plurality of first and second inner electrodes; and m (m?3) number of first and second outer electrodes. The plurality of first and second inner electrodes are connected with two outer electrodes positioned on both opposing surfaces and having the same polarity as that of the first and second inner electrodes, and classified into a plurality of groups depending on the locations of the outer electrodes connected to the first and second inner electrodes. At least one of two outer electrodes connected with inner electrodes of each group is different from an outer electrode connected with inner electrodes of a different group having the same polarity, and inner electrodes of one group are connected to outer electrodes connected with at least another one group so that all the inner electrodes belonging to the same polarity can be electrically connected.

Abstract: A multilayer ceramic electronic component includes a ceramic body including dielectric layers stacked in a thickness direction and satisfying T/W>1.0 when a width thereof is W and a thickness thereof is T; first and second internal electrodes; and first and second external electrodes, wherein when the ceramic body is divided into five regions in a width direction and a central region among the five regions is CW1 and regions adjacent to the central region CW1 are CW2 and CW3, a difference between electrode connectivity of the central region CW1 and electrode connectivity of the region CW2 or CW3 satisfies 0.02?(CW2 or CW3)?CW1?0.10.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces facing each other, and third and fourth end surfaces connecting the first and second side surfaces, a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third end surface or the fourth end surface, and a first side margin part and a second side margin part formed such that an average thickness thereof from the first and second side surfaces to edges of the internal electrodes is 18 ?m or less.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces and third and fourth end surfaces, a plurality of internal electrodes and having one ends exposed to the third or fourth end surface, and first and second side margin parts formed so that an average thickness from the first and second side surfaces to edges of the internal electrodes is 18 ?m or less, wherein when the first or second side margin part is divided into two regions by a virtual line obtained by connecting mid points of distances between the edges of the internal electrodes and points at which lines extended from the internal electrodes contact the first or second side surface, when a region adjacent to the internal electrodes is defined as S1 and a porosity of S1 is defined as P1, P1 is in a range of 1 to 20 (1?P1?20).

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body including dielectric layers; and first and second inner electrodes disposed to face each other with the dielectric layer interposed therebetween within the ceramic body, the first and second inner electrodes being alternately laminated with a difference in printing widths therebetween, wherein a difference ratio between the printing widths of the first and second inner electrodes is 20 to 80%. According to embodiments of the present invention, a multilayer ceramic electronic component having excellent reliability and withstand voltage characteristics may be realized, by reducing the occurrence of cracking through a reduction in the influence of step height while securing high capacitance.

Abstract: There is provided a conductive resin composition including 10 to 50 wt % of a gel type silicon rubber such as polydimethylsiloxane (PDMS), and 50 to 90 wt % of conductive metal powder particles.

Abstract: A method for manufacturing a laminated electronic component in which, when first plating layers that respectively connect a plurality of internal electrodes to each other and second plating layers that improves the mountability of a laminated electronic component are formed as external terminal electrodes, the entire component main body is treated with a water repellent agent after the formation of the first plating layers, and the water repellent agent on the first plating layers is then removed before the formation of the second plating layers. The gaps between the end edges of the first plating films on the outer surface of the component main body and the outer surface of the component main body are filled with the water repellent agent.

Abstract: A thin film capacitor and a method of manufacturing the same are provided. The thin film capacitor includes a metal foil, dielectric layers and internal electrode layers alternately disposed on the metal foil, and a top electrode layer on the topmost layer among the two or more dielectric layers. These layers have peripheries that define an outer profile flaring toward the metal foil as viewed from the stacking direction of the thin film capacitor, and at least one dielectric layer of two or more dielectric layers satisfies a relationship B>A>0 wherein A is a gap of the periphery of the internal electrode layer directly below the dielectric layer protruding from the periphery of the dielectric layer, and B is a gap of the periphery of the dielectric layer protruding from the periphery of the internal electrode layer or the top electrode layer directly above the dielectric layer. The thin film capacitor has a structure free from short-circuiting and reducing debris of broken dielectric material.

Abstract: A multilayer ceramic capacitor includes a ceramic body having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another. First and second internal electrodes have an overlap region with lead out portions exposed to the first lateral surface of the ceramic body. An insulating layer is formed to cover the overlap region of the lead out portions exposed to the first lateral surface of the ceramic body; and first and second external electrodes are formed on the first lateral surface of the ceramic body on which the insulating layer is formed and electrically connected to the first and second internal electrodes. Thicknesses of the insulating layer from the first lateral surface and the first and second external electrodes from the first lateral surface are specified.

Abstract: Provided is a multilayer ceramic capacitor including a multilayer ceramic plastic body formed so that a plurality of internal electrode layers intersects; and a plurality of external electrodes, each formed to cover one side or another side of the multilayer ceramic plastic body and connected to the plurality of internal electrode layers. Each of the plurality of external electrodes includes a plurality of conductive layers that is sequentially formed to cover one side or another side of the multilayer ceramic plastic body, and one of the plurality of conductive layers is formed of conductive resin hardened through an irradiation cross-linking method using gamma ray.

Abstract: A ceramic electronic component includes a ceramic body and an outer electrode. The outer electrode is disposed on the ceramic body. The outer electrode includes a first conductive layer and a second conductive layer. The first conductive layer includes a resin, a first metal component, and a second metal component having a higher melting point than the first metal component. The second conductive layer is disposed on the first conductive layer. The second conductive layer is includes a plating film. An alloy particle containing the first metal component and the second metal component protrudes to the second conductive layer side from a surface of the first conductive layer.

Abstract: An improved passive electronic stacked component is described. The component has a stack of individual electronic capacitors and a first lead attached to a first side of the stack. A second lead is attached to a second side of the stack. A foot is attached to the first lead and extends inward towards the second lead. A stability pin is attached to one of the foot or the first lead.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes including respective lead-out portions having an overlapping area, the overlapping area being exposed to one surface of the ceramic body; first and second external electrodes extended from the one surface of the ceramic body to side surfaces thereof in a y-direction, in which the first and second internal electrodes are laminated, and connected to the respective lead-out portions; and an insulation layer formed on the one surface of the ceramic body.

Abstract: There is provided a multilayer ceramic electronic component including: a ceramic main body including a dielectric layer and internal electrodes disposed to face each other, while having the dielectric layer interposed therebetween; and external electrodes electrically connected to the internal electrodes, wherein the external electrodes include first external electrodes formed on outer surfaces of the ceramic main body and second external electrodes formed outwardly of the first external electrodes, and protective layers including one or more of an oxide layer and a glass layer are formed between the first external electrodes and the second external electrodes.