Abstract: A multilayer ceramic electronic component includes external terminal electrodes that are formed by depositing metal plating films on exposed portions of internal conductors embedded in a ceramic body, depositing a copper plating films that cover the metal plating films and make contact with the ceramic body around the metal plating films, and heat-treating the ceramic body to generate a copper liquid phase, an oxygen liquid phase, and a copper solid phase between the copper plating films and the ceramic body. The mixed phase including these phases forms a region at which a copper oxide is present in a discontinuous manner inside the copper plating film at least at the interfaces between the ceramic body and the copper plating films. The copper oxide securely attaches the copper plating films to the ceramic body and enhances the bonding force of the external terminal electrodes.

Abstract: A method of forming a capacitor includes forming a cylindrical lower electrode structure having an internal support structure on a substrate, forming a dielectric layer on the cylindrical lower electrode structure and the support structure, and forming an upper electrode on the dielectric layer.

Abstract: Each of second terminal portions of a first terminal electrode has a wide part a width of which is larger than a first lead width of lead portions in each first internal electrode, and a narrow part a width of which decreases from the wide part toward the second terminal electrode and toward the first or second side face side. In a multilayer capacitor, the wide part causes an electric current to flow in the lead portions of the first internal electrodes in a direction opposite to that of an electric current flowing in the first terminal electrode, so as to cancel magnetic field thereof each other and thereby reduce ESL, and the narrow part prevents a solder bridge from occurring between the first terminal electrode and the second terminal electrode in a work of mounting the terminal electrodes of the multilayer capacitor on a circuit board or the like.

Abstract: A ceramic electronic component that is hardly influenced by a stress generated when an external electrode containing a metal sintered compact is formed at the end of the ceramic component body, and a method for manufacturing the same are provided. A laminated ceramic capacitor includes a ceramic component body and first electrodes to be connected to internal electrodes that are led to the end surfaces are formed. The first external electrodes are arranged so that the ends are spaced apart from the side surfaces of the ceramic component body. Second external electrodes containing a conductive resin are arranged so as to entirely cover the first electrodes and first and second metal layers and are formed thereon. The first external electrodes are formed by supplying a conductive paste containing conductive metal powder and glass frit having a softening point higher than the sintering starting temperature of the conductive metal powder, and heating the same.

Abstract: A capacitor is provided having a capacitor element, with first and second metalized thermoplastic sheets, which are offset and wound together to create common edges at opposite ends, a zinc or zinc-rich conductive coating thermally sprayed on each of the common edges of the capacitor element, and aluminum or aluminum-rich terminals welded to each of the conductive coatings to form a metallurgical bond, having a pull strength of at least 5 pounds, without damaging the capacitor element.

Abstract: An electric element includes a dielectric layers, conductive plates, anode electrodes, and cathode electrodes. The conductive plates and the conductive plates are alternately laminated in the width direction of the electric element. The anode electrodes are connected to each of the conductive plates with a predetermined distance. The cathode electrodes are connected to each of the conductive plates with a predetermined distance. The electric element is mounted on a substrate in a manner where the bottom surface makes contact with the substrate. The anode electrode is connected to a first signal line that has a width substantially equal to that of the electric element disposed on the substrate. The anode electrode is connected to a second signal line that has a width substantially equal to that of the electric element disposed on the substrate.

Abstract: The invention relates to a multilayer capacitor capable of controlling ESR while maintaining the level of ESL low. A multilayer capacitor (10) includes a plurality of first and second internal capacitor electrodes (3, 4) which are formed inside a multilayer body (1) of rectangular parallelepiped shape constructed by stacking a plurality of rectangular dielectric layers (2) on top of one another in a stacking direction; first and second external relay electrodes (13, 14) which are disposed on left-hand and right-hand surfaces of the multilayer body (1); first and second internal relay electrodes (5, 6) which are disposed inside the multilayer body (1) and arranged so as to be opposed to each other with the dielectric layer (2) interposed therebetween; and first and second external terminal electrodes (15, 16) which are disposed on upper and lower surfaces of the multilayer body (1).

Abstract: A method for manufacturing a monolithic ceramic electronic component includes a plating substep of depositing precipitates primarily composed of a specific metal on an end of each of internal electrodes exposed at a predetermined surface of a laminate and growing the precipitates to coalesce into a continuous plated layer, wherein the specific metal is different from that of the internal electrodes, and the same or substantially the same metal that defines the internal electrodes is distributed throughout the plated layer.

Abstract: A filament post used in plasma-enhanced chemical vapor deposition has an outer shell and an inner post. An electrical potential is applied only to the inner post to ensure that there is no impact on the plasma density and the carbon film properties. The inner post and the outer shell are electrically insulated by ceramic insulators, such that no electrical potential is applied to outer shell. The stress generated in the carbon film is directly related to the electrical potential of the surface to which the film is deposited. The carbon film deposited on the outer shell of the post is not highly stressed, which significantly reduces film delamination from the filament post surfaces.

Abstract: A first internal conductor has a first portion. A second internal conductor has a lead portion and a main electrode portion. The second internal conductor is arranged in the same layer as the first internal conductor. A third internal conductor has a lead portion and a main electrode portion. The third internal conductor is arranged so as to be adjacent to the second internal conductor in a laminate direction. A fourth internal conductor has a lead portion and a main electrode portion. The fourth internal conductor is arranged so as to be adjacent to the third internal conductor in the laminate direction. When the laminate body is viewed from the laminate direction, the main electrode portion of the third internal conductor overlaps with the main electrode portions of the second and fourth internal conductors.

Abstract: Various capacitors for use with integrated circuits and other devices and fabrication methods are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first capacitor plate that has at least two non-linear strips and forming a second capacitor plate that has a non-linear strip positioned between the at least two non-linear strips of the first capacitor plate. A dielectric is provided between the non-linear strip of the second capacitor plate and the at least two non-linear strips of the first capacitor plate.

Abstract: A collective component has a first region that intersects a conductive paste film for external terminal electrodes in a break line in which break leading holes are arranged and a second region that does not intersect a conductive paste film for external terminal electrodes in the break line. The first break leading holes are formed in the first region so as not to reach the second region. The second break leading holes are formed only in the second region or from the second region to a portion of the first region. The pitch of the first break leading holes is wider than the pitch of the second break leading holes.

Abstract: An NTC capacitor comprises a capacitor body having a plurality of insulator layers laminated therein, first to third inner electrodes arranged within the capacitor body, and first to third terminal electrodes arranged on outer surfaces of the capacitor body. The first inner electrode is connected to only the first terminal electrode. The second inner electrode is connected to only the second terminal electrode. The third inner electrode is connected to only the third terminal electrode. The third inner electrode opposes none of the first and second inner electrodes in the laminating direction of the insulator layers.

Abstract: A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.

Abstract: A method of manufacturing a multilayer capacitor comprises a first layer forming step, a first electrode forming step, a second layer forming step, a second electrode forming step, a separation step, an element forming step and a terminal forming step. In the first layer forming step, a first ceramic green layer is formed on a supporting body. In the first electrode forming step, a first electrode pattern is formed on the first ceramic green layer. In the second layer forming step, a second ceramic green layer is formed laminated on the first ceramic green layer. In the second electrode forming step, a second electrode pattern is formed at the second ceramic green layer. In the separation step, the support body is separated from the laminated body. In the element forming step, elements are formed by laminating a plurality of the laminated bodies.

Abstract: In an LW-reverse-type monolithic ceramic capacitor including external terminal electrodes each including a resistance component, internal electrodes include nickel or a nickel alloy, and the external terminal electrodes each include a first layer, a second layer provided on the first layer, and a third layer provided on the second layer. The first layer has a wrap-around portion extending from an end surface to principal surfaces and side surfaces of a capacitor main body, and contains a glass component and a compound oxide that reacts with Ni or the Ni alloy. The second layer covers the first layer such that the edge of the wrap-around portion of the first layer remains exposed, and contains a metal. The third layer covers the edge of the wrap-around portion of the first layer and the second layer, and is formed by plating.

Abstract: An electronic component is provided which includes external electrodes having a multilayer structure of first and second sintered electrode layers that are densely sintered and have less possibility of causing poor appearance and decreased reliability in electrical connection. The external electrodes include a first sintered electrode layer and a second sintered electrode layer containing different metals. The first and second sintered electrode layers contain a borosilicate glass containing an alkali metal.

Abstract: A circuit device capable of suppressing reduction of reliability resulting from heat generated in a circuit element is obtained. This circuit device comprises a first insulating layer having a first opening and a second opening, a first conductor filling up the first opening of the first insulating layer, a second conductor, formed along the inner side surface of the second opening of the first insulating layer, having a concave upper surface and a circuit element arranged above a region of the first insulating layer formed with the first opening.

Abstract: A feedthrough multilayer capacitor mounting structure including a capacitor body, at least two each of first and second signal terminal electrodes, and at least one each of first and second grounding terminal electrodes. The capacitor body has a plurality of insulator layers laminated, a first signal inner electrode connected to two first signal terminal electrodes, a second signal inner electrode connected to two second signal terminal electrodes, a first grounding inner electrode connected to one first grounding terminal electrode, and a second grounding inner electrode connected to one second grounding terminal electrode. The first signal inner electrode and second grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the insulator layers. The second signal inner electrode and first grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the insulator layers.

Abstract: A first terminal electrode has a first electrode portion disposed on a first face and connected to a first internal electrode, and a second electrode portion disposed on a third face and connected to the first electrode portion. A second terminal electrode has a first electrode portion disposed on a second face and connected to a second internal electrode, and a second electrode portion disposed on the third face and connected to the first electrode portion. Each of the second electrode portions of the first and second terminal electrodes, when viewed along a second direction perpendicular to the third face, is arranged with a gap in a third direction perpendicular to the second directions so as to sandwich at least a portion of an end in the first direction of an element body region sandwiched between the first internal electrode and the second internal electrode, at an end in the first direction of the second electrode portion.

Abstract: A capacitor comprises m electrode plates that are arranged spaced apart and in parallel, where m is an integer greater than one. Even ones of the m electrode plates comprise x extensions that extend from the first side and that have a first width. Odd ones of the m electrode plates comprise y extensions that extend from the first side and that have a second width that is less than the first width. The x extensions are located between the y extensions when the m electrode plates are arranged in parallel. n first external terminals that are arranged on a first exterior surface of the capacitor. The x extensions are coupled to x of the n first external terminals and wherein the y extensions of the odd ones of the m electrode plates are coupled to y of the n first external terminals.

Abstract: A method of manufacturing a multilayer capacitor comprises a first layer forming step, a first electrode forming step, a second layer forming step, a second electrode forming step, a separation step, an element forming step and a terminal forming step. In the first layer forming step, a first ceramic green layer is formed on a supporting body. In the first electrode forming step, a first electrode pattern is formed on the first ceramic green layer. In the second layer forming step, a second ceramic green layer is formed laminated on the first ceramic green layer. In the second electrode forming step, a second electrode pattern is formed at the second ceramic green layer. In the separation step, the support body is separated from the laminated body. In the element forming step, elements are formed by laminating a plurality of the laminated bodies.

Abstract: A varistor comprises a varistor element body, first and second inner electrodes opposing each other, a first outer electrode connected to the first inner electrode physically and electrically, a second outer electrode connected to the second inner electrode physically and electrically, and an electrically insulating layer. The first and second inner electrodes are arranged within the varistor element body so as to have end portions exposed at two outer surfaces of the varistor element body. The first outer electrode is arranged on one of the two outer surfaces so as to cover a portion of the end portion of the first inner electrode exposed at the one outer surface. The second outer electrode is arranged on the one outer surface so as to cover a portion of the end portion of the second inner electrode exposed at the one outer surface.

Abstract: A multilayer positive temperature coefficient thermistor that has semiconductor ceramic layers containing a BaTiO3-based ceramic material as a primary component, and at least one element selected from the group consisting of Eu, Gd, Tb, Dy, Y, Ho, Er, and Tm as a semiconductor dopant in the range of 0.1 to 0.5 molar parts with respect to 100 molar parts of Ti. The ratio of the Ba site to the Ti site is in the range of 0.998 to 1.006. Accordingly, even when the semiconductor ceramic layers have a low actual-measured sintered density in the range of 65% to 90% of a theoretical sintered density, a multilayer positive temperature coefficient thermistor having a sufficiently high rate of resistance change and a high rising coefficient of resistance at the Curie temperature or more can be realized.

Abstract: An exemplary embodiment providing one or more improvements includes a capacitor with a segmented end electrode and methods for segmenting an end electrode of a capacitor for reducing or eliminating instances of thermally induced damage of the capacitor.

Abstract: A multilayer capacitor comprises a multilayer body in which a plurality of dielectric layers and a plurality of first and second inner electrodes are laminated alternately, and first and second terminal electrodes arranged on the multilayer body. The first terminal electrode is electrically connected to the first inner electrodes. The first terminal electrode includes one or a plurality of resistance layers having a resistivity greater than that of the first inner electrode. The one or a plurality of resistance layers cover end portions of lead portions of the first inner electrodes exposed at the side face. Each resistance layer has a width wider than the lead portion of the first inner electrode but narrower than the width of the side face formed with the first terminal electrode.

Abstract: A multilayer ceramic electronic component includes a multilayer body, a first internal electrode provided in the multilayer body, and a second internal electrode provided in the multilayer body and facing the first internal electrode. The multilayer body includes a first ceramic layer, a second ceramic layer provided on a first surface of the first ceramic layer, and a third ceramic layer provided on a second surface of the first ceramic layer opposite to the first surface. The first and second internal electrodes are connected to the first ceramic layer. The first ceramic layer contains mainly ZnO and 0 to 15 mol % of SiO2. The second ceramic layer contains mainly ZnO and 15 to 50 mol % of SiO2. The third ceramic layer contains mainly ZnO and 15 to 50 mol % of SiO2; The multilayer ceramic component has a low varistor voltage and a small capacitance.

Abstract: A feedthrough multilayer capacitor includes a capacitor body, at least two signal terminal electrodes, and at least one grounding terminal electrode. The capacitor body has a plurality of insulator layers laminated, a signal inner electrode and a first grounding inner electrode which are arranged so as to oppose each other with at least one insulator layer in between, and a second grounding inner electrode arranged so as to oppose the signal inner electrode or first grounding inner electrode with at least one insulator layer in between. The signal inner electrode is connected to two signal terminal electrodes, while the second grounding inner electrode is connected to one grounding terminal electrode. The first grounding inner electrode is connected to only the second grounding inner electrode through a through-hole conductor.

Abstract: A feedthrough multilayer capacitor array having a capacitor body which has a plurality of insulator layers laminated, a first signal inner electrode connected to two first signal terminal electrodes, a second signal inner electrode connected to two second signal terminal electrodes, a first grounding inner electrode connected to one first grounding terminal electrode, and a second grounding inner electrode connected to one second grounding terminal electrode. The first signal inner electrode and second grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the insulator layers. The second signal inner electrode and first grounding inner electrode include respective portions opposing each other while holding therebetween at least one of the insulator layers. The first and second signal inner electrodes include respective portions opposing each other while holding therebetween at least one of the insulator layers.

Abstract: A monolithic ceramic electronic component includes a ceramic laminate provided with ceramic layers and internal electrode layers disposed between the ceramic layers such that a portion of each internal electrode is led to an end surface of the ceramic laminate and the external electrode disposed on the end surface of the ceramic laminate to which the internal electrode layers are led, so as to connect to the internal electrode layers. At least one end portion in a longitudinal direction of an exposed portion of the internal electrode layer led to and exposed at the end surface of the ceramic laminate is covered with a glass film, and the internal electrodes and the external electrode are electrically connected to each other at a portion not covered with the glass film in the exposed portion of the internal electrode layer.

Abstract: A laminated body is prepared, in which at an end surface at which internal electrodes are exposed, the internal electrodes disposed adjacently are electrically isolated from each other, and a distance between the internal electrodes disposed adjacently is about 20 ?m or less when measured along the thickness direction of an insulator layer, and a withdrawn-depth of the internal electrodes is about 1 ?m or less when measured from the end surface. In a step of electroless plating, plating deposits formed at the end portions of the plurality of internal electrodes are increased in size so as to be connected to each other.

Abstract: An electronic component is provided which includes external electrodes having a multilayer structure of first and second sintered electrode layers that are densely sintered and have less possibility of causing poor appearance and decreased reliability in electrical connection. Each external electrode includes a first sintered electrode layer and a second sintered electrode layer. The first sintered electrode layer contains a first borosilicate glass containing an alkali metal in which there is 85% to 95% by weight of silicon and 0.5% to 1.5% by weight of the alkali metal based on 100% by weight of all contained elements other than boron. The second sintered electrode layer contains a second borosilicate glass containing an alkali metal in which there is 65% to 80% by weight of silicon and 3.5% to 8.0% by weight of the alkali metal based on 100% by weight of all contained elements other than boron.

Abstract: A multilayer capacitor having a dielectric body, an internal layer portion, external layer portions a first terminal electrode connected with a first internal conductor layer and a first external conductor layer, formed at least on a first side face of side faces of the dielectric body, and a second terminal electrode connected with a second internal conductor layer and a second external conductor layer, formed on a second side face opposed to the first side face of the dielectric body. The dielectric layer positioned at the external layer portions includes a plurality of pin hole conducting portions connecting a pair of first external conductor layers or a pair of second external conductor layers to each other adjacent to the dielectric layer, in an area of overlapping a pair of the first external conductor layers or a pair of the second external conductor layers adjacent to the dielectric layer.

Abstract: A capacitor array with a multiplicity of capacitors with terminations of alternating polarity wherein the terminations are arranged in M columns and N rows. A circuit is provided with terminations in a grid of L columns and K rows wherein the terminations are of alternating polarity with the proviso that a first terminal with L={acute over (?)}M has the same polarity as a second terminal with L={acute over (?)}M+1 wherein {acute over (?)} is an integer.

Abstract: An electrical multiple-layer component is described herein. The component includes a base body having dielectric layers and internal electrodes. The internal electrodes are of connected to each other electrically between the dielectric layers via at least one external electrode on side surfaces of the base body. The component also includes an electrical connection between the external electrode and a contact surface on a surface of the base body and insulated relative to an outer side of the component.

Abstract: An integrated shunt capacitor comprises a bottom plate (86,88), a capacitor dielectric (92) overlying a portion of the bottom plate, a top plate (62) overlying the capacitor dielectric, a shield (74) overlying a portion of the top plate (62); and a metallization feature (70) disposed about and isolated from at least two sides of the top plate (62), the metallization feature (70) for coupling the bottom plate (86,88) to the shield (74). In one embodiment, an RF power transistor has an impedance matching network including an integrated shunt capacitor as described herein.

Abstract: One inventive aspect relates to a laminated capacitor capable of satisfying higher electrostatic capacitance and lower ESL at the same time. A dielectric chip constituting the laminated capacitor has an integral structure formed by alternately laminating a pair of first inner conductor layer and second inner conductor layer which are positioned on the same plane and are held in a non-contact relation, and a pair of third inner conductor layer and fourth inner conductor layer which are positioned on the same plane and are held in a non-contact relation, while a dielectric layer is interposed between the pair of first and second inner conductor layers and the pair of third and fourth inner conductor layers. Voltage of one polarity is applied to the first and fourth inner conductor layers from a first outer electrode through lead-out portions, and voltage of the other polarity is applied to the second and third inner conductor layers from a second outer electrode through lead-out portions.

Abstract: An exemplary embodiment providing one or more improvements includes a capacitor with a segmented end electrode and methods for segmenting an end electrode of a capacitor for reducing or eliminating instances of thermally induced damage of the capacitor.

Abstract: A laminated ceramic substrate includes a side electrode in which a side edge electrode layer formed on a side edge portion of a ceramic layer overlaps with and connects to a side edge electrode layer formed on a side edge portion of another ceramic layer directly above and/or directly below the former ceramic layer. The side edge electrode layer includes a parallel wall unexposed and approximately parallel to a side surface of the laminated ceramic substrate and a perpendicular wall approximately perpendicular to the side surface of the laminated ceramic substrate. A length La of the parallel wall and a depth Lb of the parallel wall from the side surface of the laminated ceramic substrate have a relationship of La>Lb.

Abstract: A long life double layer capacitor and method of making the same including a case and a first terminal with an electrically insulating hermitic seal interposed between the first terminal and the case. A first current collector foil is electrically coupled to an interior portion of the first terminal and a first electrode comprising carbon which is juxtaposed against the first current collector foil. A porous separator is then juxtaposed against the first electrode comprising carbon and separating the first electrode from a second electrode comprising carbon. A second current collector foil is juxtaposed against a side of the second electrode and is electrically coupled to the second terminal.

Abstract: A semiconductor device has a MIM capacitor including a first insulating film formed on a semiconductor substrate, a lower electrode composed of a first metal film formed on the first insulating film, a capacitor insulating film formed on the lower electrode, and an upper electrode composed of a second metal film formed on the capacitor insulating film. The semiconductor device further has a lower interconnect composed of the first metal film formed on the first insulating film and an upper interconnect composed of the second metal film formed on the lower interconnect. The upper interconnect and the upper electrode are formed integrally.

Abstract: A multilayer capacitor according to the present invention comprises a multilayer body 2 including a plurality of dielectric layers laminated together, first internal electrodes 3 and second internal electrodes 4 that are arranged alternately with the dielectric layers interposed therebetween inside the multilayer body 2, first extension portions 5a extended from the first internal electrodes 3 to one lateral side A of the multilayer body 2 at one or a plural number of locations, and second extension portions 5b extended from the first internal electrodes 3 to another lateral side B of the multilayer body 2 at one or a plural number of locations, wherein the length of the first extension portions 5a is different from the length of the second extension portions 5b.

Abstract: An electronic component having an element body, and a terminal electrode disposed on the element body. The terminal electrode has a first electrode layer, a second electrode layer, and a third electrode layer. The first electrode layer is formed on an external surface of the element body and formed by baking of a conductive paste. The second electrode layer is formed by Ni plating on the first electrode layer. The third electrode layer is formed by Sn plating or Sn alloy plating on the second electrode layer. A thickness of the second electrode layer is set in a range of not less than 5 ?m, and less than 8 ?m.

Abstract: A stacked electronic component includes multiple energy storage units and a fastening device. Each energy storage unit has a first electrode and a second electrode. The fastening device includes first and second fastening member disposed on opposite sides of the energy storage units. Each of the first and second fastening members includes a body plate, at least a clamping structure extending from two edges of the body plate and at least a connecting part electrically connected to the body plate and the circuit board. The energy storage units are clamped by the clamping structures of the first and second fastening members and the first and second electrodes are electrically connected to the body plates of the first and second fastening members, so that the first and second electrodes are electrically connected to the circuit board through the body plates and the connecting parts of the first and second fastening members.

Abstract: A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate, the method including: manufacturing a capacitor part by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part; providing a plurality of low temperature co-fired green sheets each having at least one of a conductive pattern and a conductive via hole thereon; forming a low temperature co-fired ceramic deposition by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition, the embedded capacitor part connected to the one of conductive pattern and conductive via hole of an adjacent one of the green sheets; and firing the low temperature co-fired ceramic deposition having the capacitor part embedded therein. The capacitor-embedded low temperature co-fired ceramic substrate may be beneficially employed in various types of capacitor part such as a deposited chip capacitor and a capacitor layer structure.

Abstract: An integrated shunt capacitor comprises a bottom plate (62), a capacitor dielectric (92) overlying a portion of the bottom plate, a top plate (64) overlying the capacitor dielectric, a shield (74) overlying a portion of the top plate; and a metallization feature (70) disposed about and isolated from at least two sides of the top plate, the metallization feature for coupling the bottom plate to the shield. In one embodiment, an RF power transistor has an impedance matching network including an integrated shunt capacitor as described herein.

Abstract: A laminated ceramic capacitor includes a body having an inner layer portion and an outer layer portion and a plurality of terminal electrodes spaced apart from each other in a length direction of the body. The inner layer portion has a plurality of internal electrodes stacked in a height direction of the body. The internal electrodes have led-out portions led out to a side face of the body. The outer layer portion is disposed on one of opposite faces of the inner layer portion in the height direction. Each terminal electrode extends along the height direction to cover corresponding one of the led-out portions and is provided with an intermediate portion and an end portion. The intermediate portion has a larger electrode width than the led-out portion. The end portion has a smaller electrode width at an edge of the side face than the intermediate portion.

Abstract: Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer is formed above a lower conductor layer and an upper conductor layer is formed above the dielectric layer. The invention then forms an etch stop layer above the upper conductor layer and the dielectric layer, and forms a hardmask (silicon oxide hardmask, a silicon nitride hardmask, etc.) over the etch stop layer. Next, a photoresist is patterned above the hardmask, which allows the hardmask, the etch stop layer, the dielectric layer, and the lower conductor layer to be etched through the photoresist.

Abstract: A multilayer ceramic electronic component includes a skittered laminated body including internal electrodes that have a strength that is greater than that of ceramic layers provided therein. End portions of the internal electrodes protrude from end surfaces of the laminated body and are deformed so as to extend along the end surfaces by a barrel polishing process using balls. When external electrodes are formed on the end surfaces of the laminated body, a large contact area with the internal electrodes can be obtained. Therefore, a reliability of the electrical connection between the electrodes is definitely secured.

Abstract: A method for manufacturing a wiring board, comprising the steps of: forming a first electrode layer having first and second opening portions, forming a dielectric layer formed on the first electrode layer and having third and fourth opening portions, forming a second electrode layer formed on the dielectric layer and having fifth and sixth opening portions, wherein the first electrode layer, the dielectric layer, and the second electrode layer form a capacitor; forming an insulating layer inside a first opening defined by the first, third, and fifth opening portions, and a second opening defined by the second, fourth, and sixth opening portions; using a laser beam having a processing diameter to form first and second via holes extending through the insulating layer formed inside the first and second openings, respectively; and forming first and second via wiring portions in the first and second via holes, respectively.