Abstract: A multilayer ceramic capacitor includes a multilayer body, two external electrodes, and two wall portions. The multilayer body includes a multilayer main body including an inner layer portion in which dielectric layers and internal electrode layers are stacked, and two outer layer portions on opposite sides of the inner layer portion in a stacking direction, two side gap portions on opposite sides of the multilayer main body in a width direction, two main surfaces on opposite sides in the stacking direction, two side surfaces on opposite sides in the width direction, and two end surfaces on opposite sides in a length direction. The two external electrodes each are provided at one of the two end surfaces of the multilayer body, and each extend from the one of the two end surfaces to a portion of the main surface. The wall portions cover portions of the external electrodes at the two end surfaces, and each include a protruding portion that protrudes from the main surface.

Abstract: A mounting structure of a multilayer ceramic capacitor includes a substrate, and a multilayer ceramic capacitor connected to the substrate and including a laminate including dielectric layers and internal electrode layers, and external electrodes on main surfaces of the laminate. The laminate further includes first, second, third, and fourth via conductors connecting the internal electrode layers and the external electrodes. The external electrodes include first, second, third, and fourth external electrodes, each connected to respective end surfaces of the via conductor. Each of the external electrodes does not extend to the side surfaces of the laminate. A ratio W/L of a dimension W in the width direction of the multilayer ceramic capacitor to a dimension L in the length direction of the multilayer ceramic capacitor is about 0.85 or more and about 1 or less.

Abstract: An electronic component includes a multilayer body including inner electrodes and dielectric layers that are alternately stacked, and outer electrodes that are electrically connected to the inner electrodes. The multilayer body includes first and second main surfaces opposite each other in a stacking direction, first and second side surfaces opposite each other in a width direction, and first and second end surfaces opposite each other in a length direction. At least one of the outer electrodes is located on at least one of the first side surface or the second side surface of the multilayer body and is directly connected to the inner electrodes at positions spaced away from the at least one of the first side surface or the second side surface toward the inside of the multilayer body.

Abstract: A method of attaching an integrated circuit (IC) package to a printed circuit board (PCB) with a set of direct current (DC) blocking capacitors includes: applying a conductive attachment material to a first set of attachment pads located on a first planar surface of the IC package; aligning the set of DC blocking capacitors in accordance with corresponding positions of the first set of attachment pads; attaching the set of DC blocking capacitors to the IC package by: positioning the aligned set of DC blocking capacitors so that a first surface of a first DC blocking capacitor of the set of DC blocking capacitors is adjacent to a corresponding attachment pad of the first set of attachment pads; and connecting the conductive attachment material to the IC package and to the first surface of the first DC blocking capacitor to create an IC package assembly.

Abstract: A multilayer ceramic capacitor includes a stacked body and external electrodes. The stacked body includes stacked dielectric layers and internal electrodes. The external electrodes are disposed on lateral surfaces of the stacked body and are connected to the internal electrodes. A ratio of min to max is not less than about 36% and not more than about 90%, where A1, A2, A3, and A4 respectively denote the surface areas of first, second, third, and fourth external electrodes that are located on the first or second main surface of the stacked body.

Abstract: A ceramic electronic device includes a ceramic element body, a terminal electrode, and a lead terminal. The ceramic element body has an end surface and a lateral surface. The terminal electrode is formed on from the end surface to a part of the lateral surface of the ceramic element body. The lead terminal is connected to the terminal electrode by a connection member. The lead terminal includes an electrode facing portion disposed correspondingly to an end-surface electrode of the terminal electrode, an extension unit extending downward from a lower end of the electrode facing portion, and a step surface located between the electrode facing portion and the extension unit. The electrode facing portion has a recess dented in a direction away from the terminal electrode. A center of the recess is located below a center of the electrode facing portion in a height direction.

Abstract: A multilayer ceramic capacitor includes an external electrode including an underlying electrode layer, a lower plating layer on the underlying electrode layer at a first end surface and a second end surface, and an upper plating layer on the lower plating layer. The underlying electrode layer is a thin film electrode including at least one selected from Ni, Cr, Cu, and Ti. The lower plating layer is a Cu plating layer including a lower layer region located closer to the multilayer body and an upper layer region located between the lower layer region and the upper plating layer, and the Cu plating layer in the lower layer region has a metal grain diameter smaller than that of the Cu plating layer located in the upper layer region.

Abstract: A highly reliable surface-mounted resistor, which prevents a problem of disconnection between an electrode and a terminal of a chip resistor when heating during mounting, is disclosed. The surface-mounted resistor includes a chip resistor comprising a plate-shaped substrate, a resistance body formed on an upper surface of the substrate, and an electrode connected the resistance body and drawn from the upper surface of the substrate to a lower surface via an end surface, a plate-shaped lead terminal connected to the electrode of the chip resistor, the plate-shaped lead terminal being fixed to the electrode of the substrate on the lower surface side, and an exterior member covering an entire chip resistor and a part of the lead terminal.

Abstract: A multilayer component is disclosed. In an embodiment, a multilayer component includes a main body with first and second inner electrodes, wherein the first and second electrodes are alternately arranged in an interior of the main body and electrically insulated from one another and an outer contact configured to provide external contact, wherein the outer contact comprises at least two first strip-shaped conductor tracks arranged on a first surface of the main body, wherein each first conductor track is electrically connected to one of the first inner electrodes, wherein the outer contact comprises at least two second strip-shaped conductor tracks arranged on a second surface of the main body, wherein each second conductor track is electrically connected to one of the second inner electrodes, and wherein embossings in adjacent first conductor tracks or second conductor tracks are arranged offset with respect to one another.

Abstract: A multilayer electronic component includes a body including a first internal electrode and a second internal electrode alternately disposed in a first direction with a dielectric layer interposed therebetween, and including a first surface and a second surface opposing each other in the first direction, a third surface and a fourth surface opposing each other in a second direction, and a fifth surface and a sixth surface opposing each other in a third direction. A first external electrode is disposed on the third, fourth, fifth, and sixth surfaces. A second external electrode is disposed on one or more of the first and second surfaces, and a via electrode is exposed through a surface on which the second external electrode is disposed. A ratio W/L is 0.95 or more and 1.05 or less, where L is a length of the body and W is a width of the body.

Abstract: A circuit board assembly includes a circuit board, an electronic surface mount device (SMD), and a spacer that attaches the SMD to the circuit board. A coefficient of thermal expansion (CTE) of the spacer is closer to a CTE of the SMD than a CTE of the circuit board. The circuit board assembly also includes a flexible electrical lead that extends between and that is electrically connected to the SMD and the electrical node of the circuit board. Methods of manufacturing the circuit board assembly include selectively heating joining material at a predetermined heating rate and selectively cooling the joining material at a predetermined cooling rate to attach the flexible electrical leads to the SMD and the circuit board.

Abstract: A multilayer ceramic electronic component includes a first metal terminal including a first terminal joining portion connected to a first end surface, a first extending portion connected to the first terminal joining portion and extending toward a mounting surface, and a first mounting portion connected to the first extending portion and extending in a length direction connecting the first end surface and a second end surface; a second metal terminal including a second terminal joining portion connected to the second end surface, a second extending portion extending from the second terminal joining portion toward the mounting surface, and a second mounting portion connected to the second extending portion and extending in a length direction connecting the first end surface and the second end surface. The first and second mounting portions include protrusions protruding toward the mounting surface.

Abstract: Capacitive energy storage devices (CESDs) are disclosed, along with methods of making and using the CESDs. A CESD includes an array of electrodes with spaces between the electrodes. A dielectric material occupies spaces between the electrodes; regions of the dielectric material located between adjacent electrodes define capacitive elements. The disclosed CESDs are useful as energy storage devices and/or memory storage devices.

Abstract: In an exemplary embodiment, an electronic component with metal terminals includes a multilayer ceramic capacitor 10 having a pair of external electrodes 12, and a pair of metal terminals 20 each having, integrally, a plate-like supporting part 21 and a plate-like connecting part 22, and is constituted so that the supporting part 21 of each of the metal terminals 20 is joined to each of the external electrodes 12 in a manner allowing the connecting parts 22 to face each other, wherein two projecting parts 23 are provided on the connecting face of the connecting part 22 of each of the metal terminals 20.

Abstract: A ceramic electronic device includes a chip component, a pair of metal terminal portions, and a case. The metal terminal portion includes a terminal connection portion and a mount portion. The terminal connection portion faces a chip end surface and is connected with a terminal electrode. The mount portion is electrically connected with the terminal connection portion, extends toward a center substantially vertically to the chip end surface, and faces the chip component with a predetermined space. The case has a pair of case end walls sandwiching the pair of metal terminal portions from both sides and holding the chip component between the pair of metal terminal portions.

Abstract: A film capacitor includes: two adjacent capacitor elements, each of which has end-face electrodes at two end faces, respectively, and an insulating film at a lateral surface, each of the adjacent capacitor elements having dielectric films and metal layers that are alternately disposed; and a bus bar for connecting the end-face electrodes of the adjacent capacitor elements on one side. The lateral surfaces of the adjacent capacitor elements are disposed to be opposite to each other. The bus bar includes a tongue piece. The tongue piece is disposed between the lateral surfaces of the adjacent capacitor elements. With this arrangement, the film capacitor can dissipate heat generated during charging and discharging and thus have improved heat-dissipating performance.

Abstract: A multilayer ceramic capacitor having an external electrode with a glass phase, where an occupation rate of the glass phase is 30% to 60% on an area ratio, and a maximum length c of the glass phase is 5 ?m or less.

Abstract: A capacitor arrangement includes at least one ceramic multilayer capacitor with a main body having ceramic layers and first and second electrode layers arranged therebetween. The capacitor also has a first external contact and a second external contact on mutually opposite side surfaces. The first external contact is electrically conductively connected to the first electrode layers and the second external contact is electrically conductively connected to the second electrode layers. A contact arrangement includes two metallic contact plates, between which the at least one ceramic multilayer capacitor is arranged. The first and second external contacts are electrically conductively connected in each case to one of the metallic contact plates.

Abstract: A connector insert comprising conductive wire and a plurality of layers of conductive and non-conductive elastomers, and methods of fabrication thereof.

Abstract: A proposal is made for a plug device for a circuit board of a control unit for a vehicle transmission. The circuit board has at least one contact hole. The plug device has a housing, at least one contact device arranged in the housing for a cable of a peripheral module fed into the housing and at least one contact plug that is electrically connected with the contact device and that protrudes at least partially from the housing for producing an electrical and mechanical connection with the contact hole of the circuit board.

Abstract: The present invention relates to a multilayer ceramic capacitor and a printed circuit board including the same that can minimize thickness deviations of an external electrode and a multilayer ceramic. A multilayer ceramic capacitor according to an embodiment of the present invention includes a multilayer ceramic and external electrodes formed on both sides of the multilayer ceramic, wherein |Tmax?Tmin| may be less than 10 ?m, and |CTmax?CTmin| may be less than 20 ?m. (Here, Tmax is a maximum thickness of the external electrodes in a via processing area, Tmin is a minimum thickness of the external electrodes in the via processing area, CTmax is a maximum thickness of the multilayer ceramic capacitor in the via processing area, and CTmin is a minimum thickness of the multilayer ceramic capacitor in the via processing area.

Abstract: A multilayer ceramic capacitor may include: a ceramic body in which dielectric layers having an average thickness of 0.2 ?m to 2.0 ?m are stacked; an active layer configured to form capacitance by including first and second internal electrodes alternately exposed to both end surfaces of the ceramic body, having at least one of the dielectric layers interposed therebetween; an upper cover layer formed on the active layer; a lower cover layer formed below the active layer and being thicker than the upper cover layer; and first and second external electrodes covering the end surfaces of the ceramic body. At least one edge of the ceramic body in length, width, and thickness directions may be rounded. When a radius of curvature of the edge is defined as R and a thickness of the upper cover layer is defined as D, R/D may be in a range of 0.1 to 0.7.

Abstract: The invention provides an integral high-voltage capacitor assembly that yields very low self inductance and provides voltage and current multiplication. The capacitor assembly has two or four capacitors connected in series, with each capacitor made up of a stack of capacitor cells (40) also connected in series. Each of the capacitor cells (40) includes an arrangement of a pair of elongate foil electrodes (10) separated by dielectric (20, 30), and multiply-folded in a substantially flat, wound configuration. In the case of the two-capacitor assembly, in one embodiment the adjacent capacitor cells of the first capacitor (11) are connected in series by joining their foil electrodes on only one longitudinal side of the foil electrodes, while the adjacent capacitor cells of the second capacitor (12) are connected in series by joining their foil electrodes on both longitudinal sides of the foil electrodes.

Abstract: A multilayer ceramic capacitor, whose CR product can be prevented from dropping with certainty even at a thickness of 1.0 ?m or less, includes multiple unit capacitors wherein a part constituted by two adjacent internal electrode layers in the laminating direction and one dielectric layer present between the two internal electrode layers is defined as a unit capacitor. The capacitances of the unit capacitors arranged in the laminating direction exhibit a distribution that gradually increases from both ends in the laminating direction toward the inside, while gradually decreasing from the two apexes of increase toward the center in the laminating direction.

Abstract: There is provided a multilayer ceramic electronic part to be embedded in a board, including: a ceramic body including dielectric layers and having first and second main surfaces facing each other, first and second side surfaces facing each other, and first and second end surfaces facing each other; first and second internal electrodes; and first and second external electrodes formed on both end portions of the ceramic body, wherein the first external electrode includes a first base electrode and a first terminal electrode formed on a portion of the first base electrode formed on at least one of the first and second main surfaces of the ceramic body, the second external electrode includes a second base electrode and a second terminal electrode formed on a portion of the second base electrode formed on at least one of the first and second main surfaces of the ceramic body.

Abstract: In a multilayer capacitor, a first dielectric layered product including a first body principal face is formed to be thicker than a second dielectric layered product including a second body principal face in a stacking direction thereof. A first external electrode and a second external electrode extend only to the first body principal face from a first body end face and a second body end face. Alternatively, the first external electrode and the second external electrode extend at least to the first body principal face from the first body end face and the second body end face and extend also to at least one of the second body principal face, a first body lateral face, and a second body lateral face.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body including dielectric layers; and first and second inner electrodes disposed to face each other with the dielectric layer interposed therebetween within the ceramic body, the first and second inner electrodes being alternately laminated with a difference in printing widths therebetween, wherein a difference ratio between the printing widths of the first and second inner electrodes is 20 to 80%. According to embodiments of the present invention, a multilayer ceramic electronic component having excellent reliability and withstand voltage characteristics may be realized, by reducing the occurrence of cracking through a reduction in the influence of step height while securing high capacitance.

Abstract: An improved passive electronic stacked component is described. The component has a stack of individual electronic capacitors and a first lead attached to a first side of the stack. A second lead is attached to a second side of the stack. A foot is attached to the first lead and extends inward towards the second lead. A stability pin is attached to one of the foot or the first lead.

Abstract: A monolithic electronic component includes a laminate including a plurality of stacked insulating layers and a plurality of internal electrodes which extend between the insulating layers and which have end portions exposed at predetermined surfaces of the laminate, first plating layers disposed on the predetermined surfaces of the laminate, and second plating layers disposed on the first plating layer. The first plating layers are made of a metal different from that used to make the internal electrodes. The first plating layers are formed by electroless plating. The second plating layers are formed by electroplating.

Abstract: A design for an improved metal-on-metal capacitor design is described. The design includes a substantially diagonal feedline (411, 412, 413) in each metal layer. Each metal layer (21, 22, 23) comprises two sets of metal fingers which are interleaved. Each set of fingers comprises two subsets of fingers and the subsets of fingers are arranged at right angles to each other. Fingers in a first of the two sets are all connected to the diagonal feedline, while fingers in the other set are connected together via fingers at the periphery of the device. The design is repeated in adjacent layers, where the design may be identical or rotated (e.g by 180°) between adjacent metal layers.

Abstract: There are provided a multilayer ceramic capacitor and a manufacturing method thereof, the multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes; first and second external electrodes; and a first insulating layer.

Abstract: A ceramic electronic component includes a ceramic element assembly and external electrodes. The external electrodes are disposed on the ceramic element assembly. The external electrodes include an underlying electrode layer and a first Cu plating film. The underlying electrode layer is disposed on the ceramic element assembly. The first Cu plating film is disposed on the underlying electrode layer. The underlying electrode layer includes a metal that is diffusible in Cu and a ceramic bonding material. The metal that is diffusible in Cu is diffused in at least a surface layer in the underlying electrode layer side of the first Cu plating film.

Abstract: There is provided a multilayered ceramic electronic component having a reduced thickness and exhibiting hermetic sealing. In multilayered ceramic electronic component, an external electrode includes two layers, that is, first and second layers, and the first and second layers contain glass with different compositions, respectively. Therefore, the multilayered ceramic electronic component having high reliability, such as strong adhesion between the external electrode and the internal electrode, prevention of glass exudation, or the like, may be obtained.

Abstract: An electronic component includes an electronic component body and metal terminals. The electronic component body includes a base member and external electrodes. The base member includes two opposed end surfaces, two opposed side surfaces, and two opposed principal surfaces. The external electrodes are disposed on the end surfaces of the base member. The metal terminals are connected to the external electrodes by bonding with solder. A relationship of about 21?Vc/Vh?about 320 is satisfied where Vc is a volume of the electronic component body and Vh is a volume of the solder provided at one of the pairs of the external electrodes and the metal terminals.

Abstract: An electrical device having at least one functional element that includes a ceramic body, on which a first electrical contact layer and a second electrical contact layer are applied to two opposite-lying side faces, respectively, and the functional element is arranged between a first contact strip and a second contact strip, wherein the first contact strip and the second contact strip comprise several contact pins, respectively, and wherein the first contact layer electrically contacts at least one contact pin of the first contact strip and the second contact layer electrically contacts at least one contact pin of the second contact strip.

Abstract: This capacitor has: a single capacitor block provided with a plurality of capacitor elements electrically connected in parallel, each of said capacitor elements having a terminal part on each end; a first electrode plate that electrically connects the first terminal parts of the capacitor elements; a second electrode plate that electrically connects the second terminal parts of the capacitor elements and continues on to the side where the first terminal parts are; and at least one bypass electrode plate that electrically bypasses the second electrode plate.

Abstract: An electronic component includes a ceramic sintered body, and a plurality of first and second inner electrodes alternately arranged inside the ceramic sintered body to be opposed to each other in a third direction with a ceramic layer interposed between the adjacent first and second inner electrodes. The first and second inner electrodes are each arranged to be exposed to a third or fourth surface without being exposed to fifth and sixth surfaces. Heterogeneous regions, which include solid solutions of metals included in the first and second inner electrodes and the ceramic sintered body, are arranged continuously in opposite end portions of the ceramic sintered body in a first direction to extend from one side end to an opposite side end of a region where the first and second inner electrodes are disposed in a third direction.

Abstract: A laminated electronic component includes outer terminal electrodes including lower plating films including metal particles having an average size of 0.5 ?m or less, the lower plating films being formed by directly plating an outer surface of an electronic component body such that the lower plating films are electrically connected to exposed portions of inner conductors. The outer terminal electrodes may further include upper plating films formed on the lower plating films, the upper plating films being defined by one or more layers. Metal particles defining the upper plating films may have an average size of 0.5 ?m or less. The metal particles defining the lower plating films may be Cu particles.

Abstract: A laminated electronic component includes outer terminal electrodes including lower plating films including metal particles having an average size of 0.5 ?m or less, the lower plating films being formed by directly plating an outer surface of an electronic component body such that the lower plating films are electrically connected to exposed portions of inner conductors. The outer terminal electrodes may further include upper plating films formed on the lower plating films, the upper plating films being defined by one or more layers. Metal particles defining the upper plating films may have an average size of 0.5 ?m or less. The metal particles defining the lower plating films may be Cu particles.

Abstract: A chip-type electronic component with high reliability, which is able to suppress and prevent fatal damage to a ceramic body due to cracking even if a substrate with the chip-type electronic component mounted thereon undergoes a deflection. The chip-type electronic component includes a ceramic body having internal electrodes; resin electrode layers formed in a region including at least end surfaces of the ceramic body, and connected to the internal electrodes directly or indirectly and connected with the ceramic body; and plating metal layers covering the resin electrode layers, wherein the adhesion strength between the ceramic body and the resin electrode layer is higher than the adhesion strength between the resin electrode layer and the plating metal layer.

Abstract: A capacitor module includes a first film capacitor, a second film capacitor, and a bus bar. The first film capacitor has electrodes at both ends thereof. The second film capacitor has electrodes at both ends thereof A lateral face of the second film capacitor is provided adjacent to a lateral face of the first film capacitor. The bus bar electrically connects the first film capacitor and the second film capacitor to an external device. The bus bar is connected to the electrodes on one end side of the first film capacitor and the second film capacitor. The bus bar is extended to the other end side through a gap between the first film capacitor and the second film capacitor.

Abstract: An electronic component with terminal strips joined to end faces of external electrodes via a solder is characterized in that two plate-like supports of each terminal strip are formed by bending two plate-like parts projecting outward in a line-symmetrical manner from both side edges of a plate-like leg in the width direction such that at least tips of the thickness surfaces on the electronic component sides of the two plate-like parts are positioned below an external electrode of the electronic component, and the electronic component is supported from below by the tips of the thickness surfaces on the electronic component sides of the four plate-like supports. Slipping of the electronic component from both terminal strips due to melting of the solder can be suppressed in a reliable manner.

Abstract: A first inner electrode is integrally provided with a first terminal connection part connected to a first terminal electrode and a first linking connection part connected to a first linking electrode. A second inner electrode is integrally provided with a second terminal connection part connected to a second terminal electrode and a second linking connection part connected to a second linking electrode. A third inner electrode is integrally provided with a third linking connection part connected to the first linking electrode. A fourth inner electrode is integrally provided with a fourth linking connection part connected to the second linking electrode. The third inner electrode is adjacent to the first and fourth inner electrodes in a laminating direction of the plurality of dielectric layers. The first and fourth inner electrodes overlap the third inner electrode as seen in the laminating direction of the plurality of dielectric layers.

Abstract: A ceramic electronic component includes a ceramic element assembly and external electrodes. The external electrodes are disposed on the ceramic element assembly. The external electrodes include an underlying electrode layer and a first Cu plating film. The underlying electrode layer is disposed on the ceramic element assembly. The first Cu plating film is disposed on the underlying electrode layer. The underlying electrode layer includes a metal that is diffusible in Cu and a ceramic bonding material. The metal that is diffusible in Cu is diffused in at least a surface layer in the underlying electrode layer side of the first Cu plating film.

Abstract: Capacitive circuits are implemented with desirable quality factors in various implementations. According to an example embodiment, a fringe capacitor includes two capacitive circuits (e.g., plates), respectively having a plurality of capacitive fingers extending from an end structure, and respectively having a connecting pin that is adjacent the connecting pin of the other capacitive circuit, on a common side fringe capacitor. The capacitive fingers are arranged in stacked layers, with vias connecting the fingers in different layers back to the connecting pins.

Abstract: Disclosed herein are a multilayer ceramic electronic component and a method for manufacturing the same. The multilayer ceramic electronic component includes a multilayer body in which dielectric layers and internal electrode layers are alternately stacked and external electrodes, wherein a portion in the internal electrode layers positioned in a marginal portion in which vertically neighboring internal electrode layers in the multilayer body is not overlapped with each other has a thickness thicker than that of a portion of the internal electrode layer positioned in an overlapped portion in which the vertically neighboring internal electrode layers are overlapped with each other, such that an accumulated stepped height difference in the marginal portion is reduced.

Abstract: A ceramic electronic component includes a ceramic element assembly and external electrodes. The external electrodes are disposed on the ceramic element assembly. The external electrodes include an underlying electrode layer and a first Cu plating film. The underlying electrode layer is disposed on the ceramic element assembly. The first Cu plating film is disposed on the underlying electrode layer. The underlying electrode layer includes a metal that is diffusible in Cu and a ceramic bonding material. The metal that is diffusible in Cu is diffused in at least a surface layer in the underlying electrode layer side of the first Cu plating film.

Abstract: A multilayered body includes capacitor conductors and an internal conductor, which together define a capacitor. A first external electrode is connected to one of the capacitor conductors via a set of lead electrodes. A second external electrode is connected to the other capacitor conductor via another set of lead electrodes. The internal conductor faces the capacitor conductors.

Abstract: A ceramic electronic component includes a ceramic element assembly and external electrodes. The external electrodes are disposed on the ceramic element assembly. The external electrodes include an underlying electrode layer and a first Cu plating film. The underlying electrode layer is disposed on the ceramic element assembly. The first Cu plating film is disposed on the underlying electrode layer. The underlying electrode layer includes a metal that is diffusible in Cu and a ceramic bonding material. The metal that is diffusible in Cu is diffused in at least a surface layer in the underlying electrode layer side of the first Cu plating film.

Abstract: A monolithic electronic component includes a laminate including a plurality of stacked insulating layers and a plurality of internal electrodes which extend between the insulating layers and which have end portions exposed at predetermined surfaces of the laminate, first plating layers disposed on the predetermined surfaces of the laminate, and second plating layers disposed on the first plating layer. The first plating layers are made of a metal different from that used to make the internal electrodes. The first plating layers are formed by electroless plating. The second plating layers are formed by electroplating.