Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which dielectric layers and internal electrode layers are alternately stacked; wherein a main component of the dielectric layers is a ceramic material having a main phase having a perovskite structure (ABO3) wherein a B site includes an element solid-solved in the B site and acting as a donor; wherein an A site and the B site of the ceramic material includes a rare earth element, wherein (an amount of the rare earth element substitutionally solid-solved in the A site)/(an amount of the rare earth element substitutionally solid-solved in the B site) is 0.75 or more and 1.25 or less. The amount of the element acting as the donor in the B site is 0.05 to 0.3 atm % relative to a main component element of the B site.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which dielectric layers and internal electrode layers are alternately stacked; wherein a main component of the dielectric layers is a ceramic material having a main phase having a perovskite structure (ABO3) wherein a B site includes an element solid-solved in the B site and acting as a donor; wherein an A site and the B site of the ceramic material includes a rare earth element, wherein (an amount of the rare earth element substitutionally solid-solved in the A site)/(an amount of the rare earth element substitutionally solid-solved in the B site) is 0.75 or more and 1.25 or less. The amount of the element acting as the donor in the B site is 0.05 to 0.3 atm % relative to a main component element of the B site.

Abstract: The invention belongs to the field of electronic ceramics and its manufacturing, in particular to the modified NiO—Ta2O5-based microwave dielectric ceramic material sintered at low temperature and its preparation method. It is guided by ion doping modification, not only considering the substitution of ions with similar radius, such as Zn2+ replacing Ni2+ ions, V5+ replacing Ta5+ ions; Meanwhile, the selected doped oxide still has the property of low melting point. Therefore, the microwave dielectric properties of NiO—Ta2O5-based ceramic material can be improved and the appropriate sintering temperature can be reduced. In the invention, by adjusting the molar content of each raw material, the NiO—Ta2O5-based ceramic material with low-temperature sintering, stable temperature and excellent microwave dielectric property is directly synthesized at one time, which can be widely applied to the technical field of LTCC.

Abstract: A multilayer capacitor includes a capacitor body having an active region, upper and lower cover regions, and width margins on opposing sides of the active region. The width margin includes a first region on an internal side thereof adjacent the first and second internal electrodes and a second region on an external side between the first region and a respective external surface of the capacitor body, and he upper and lower cover regions each include a third region on an internal side thereof adjacent the internal electrodes and a fourth region on an external side between the third region and a respective external surface of the capacitor body. The active region, the second region, and the fourth region have a same dielectric constant A, and the first and third regions have a same dielectric constant B, and A and B are different from each other and satisfy 0.5?B/A.

Abstract: A multilayer ceramic capacitor includes a second alloy portion including one metal element provided in a greatest amount among metal elements of an internal electrode layer, and one or more metal elements among a metal group including Sn, In, Ga, Zn, Bi, Pb, Cu, Ag, Pd, Pt, Ph, Ir, Ru, Os, Fe, V, and Y is provided between a second dielectric ceramic layer and a first internal electrode layer, and between a second dielectric ceramic layer and a second internal electrode layer, respectively.

Abstract: Ceramic raw material powder includes: a main phase having a perovskite structure, wherein elements acting as a donor and an acceptor are solid-solved in B sites of the perovskite structure, wherein a first relationship of value A<value B is satisfied in a center region of each grain of the ceramic raw material powder; a second relationship of value A>value B is satisfied in a circumference region of each grain of the ceramic raw material powder, and value A in the second relationship gradually decreases from the circumference region to the center, wherein value A is a value of (concentration of the element acting as a donor)×(valence of the element acting as a donor?4), and value B is a value of (concentration of the element acting as an acceptor)×(4?valence of the element acting as an acceptor).

Abstract: A ceramic electronic component includes: a body including dielectric layers and internal electrodes; and external electrodes disposed on the body and connected to the internal electrodes, wherein the dielectric layer includes a plurality of dielectric crystal grains, and at least one of the plurality of dielectric crystal grains has a core-double shell structure, the double shell includes a first shell surrounding at least a portion of the core and a second shell surrounding at least a portion of the first shell, the first shell includes a first element, one or more of Sn, Sb, Ge, Si, Ga, In, or Zr, and the second shell includes a second element, one or more of Ca or Sr.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and a plurality of first and second internal electrodes disposed on the dielectric layers to face each other with each of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, wherein the dielectric layer includes a dielectric ceramic composition including a base material main component represented by z(Ba(1-x)CaxTiO3-(1-z)BaTi2O5 including a first main component represented by (Ba(1-x)Cax)TiO3 and a second main component represented by BaTi2O5, 0.7?z?0.8 and 0?x<0.1.

Abstract: A multilayer ceramic capacitor includes first dielectric ceramic layers each with a thickness of about 0.48 ?m or more and about 0.50 ?m or less in the lamination direction, and additional dielectric ceramic layers each with a thickness of about 10 ?m or more and about 15 ?m or less in the width direction. A number of dielectric particles in each first dielectric ceramic layer in a thickness direction is three or more and six or less. A number of dielectric particles in each additional dielectric ceramic layer in a thickness direction is 100 or more and 150 or less. When the number of dielectric particles in each of first dielectric ceramic layer is NT, and the number of dielectric particles in each additional dielectric ceramic layer is NW, a ratio of NT to NW is about 1:23.08 or more and about 1:46.15 or less.

Abstract: Provided are a dielectric material including a compound represented by Formula 1, a device including the same, and a method of preparing the dielectric material: (1?x)KaNabNbO3.xM(AcSbd)O3??[Formula 1] wherein, in Formula 1, M is a Group 2 element, A is a trivalent element, and 0<x<1, 0<a<1, 0<b<1, 0<c<1, 0<d<1, a+b=1, and c+d=1.

Abstract: A dielectric material includes a main component represented by (Ba1-xCax)(Ti1-yZry)O3, (Ba1-xCax)(Ti1-ySny)O3, or (Ba1-xCax)(Ti1-yHfy)O3 (0?x?1 and 0?y?0.05) and a subcomponent. When an angle corresponding to a maximum peak is referred to as ?0 and angles corresponding to a full width at half maximum (FWHM) are respectively referred to as ?1 and ?2 (?1<?2) in the peaks of (002) and (200) plane of an x-ray diffraction (XRD) pattern using Cu K?1 radiation (wavelength ?=1.5406 ?), (?2??0)/(?0??1) is greater than 0.54 to 1.0 or less.

Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which each of dielectric layers and each of internal electrode layers are stacked, wherein a relationship of 8.0?IA/IB>1.40 is satisfied in a TSDC (Thermally Stimulated Depolarization Currents) of temperature elevation rate of 10 degrees C./min under a condition of 130 degrees C., 5 V/?m and a polarization of 30 min, when a peak current value on a lower temperature side in a temperature range of 130 degrees C. to 190 degrees C. is IA and a peak current value on a higher temperature side in a temperature range of 190 degrees C. to 280 degrees C. is IB.

Abstract: A multilayer ceramic capacitor includes a ceramic body including a dielectric layer and having first and second surfaces opposing each other, third and fourth surfaces connecting the first and second surfaces, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other, a plurality of internal electrodes disposed inside the ceramic body, exposed through the first and second surfaces, and having one end portion exposed through the third or fourth surface, and first and second side margin portions disposed on the edges of the plurality of internal electrodes, exposed through the first and second surfaces, in which RGB values of the first and second surfaces on which the first and second side margin portions are disposed are different from RGB values of the fifth and sixth surfaces.

Abstract: An electronic component includes a component body, a base electrode that has a surface exposed from the component body and contains at least one of silver and copper, an alloy layer deposited on the surface of the base electrode, and a nickel layer deposited on a surface of the alloy layer. The material of the alloy layer is an alloy containing nickel and tin.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including an active portion having dielectric layers and first and second internal electrodes and first and second cover portions disposed on opposite surfaces of the active portion in a stacking direction, respectively; wherein when a region of the cover portion in contact with the first or second internal electrode is an inner region of the cover portion and a region of the active portion in contact with the inner region of the cover portion is an outer region of the active portion, 1.00<XA/XB?1.04 in which XA/XB is a ratio of a molar ratio (XA) of barium (Ba) to titanium (Ti) in the inner region of the cover portion to a molar ratio (XB) of barium (Ba) to titanium (Ti) in the outer region of the active portion.

Abstract: A method of producing a core-shell particle includes introducing a barium titanate-based base powder and an additive to a reactor, and exposing the barium titanate-based base powder and the additive to a thermal plasma torch to obtain core-shell particles including a core portion having barium titanate (BaTiO3) and a shell portion including the additive and formed on a surface of the core portion.

Abstract: A multilayer electronic component having a plurality of stacked dielectric layers and a plurality of internal electrode layers. Each of the dielectric layers has a plurality of crystal grains including a perovskite-type compound containing Ba, a first rare earth element and a second rare earth element. A difference between a positive trivalent ion radius of the first rare earth element and a positive divalent ion radius of Ba is smaller than a difference between a positive trivalent ion radius of the second rare earth element and the positive divalent ion radius of Ba. A sum of an amount of the first rare earth element and the second rare earth element in a first region along a grain boundary is larger than a sum of an amount of the first rare earth element and the second rare earth element in a second region in a center portion of the crystal grain.

Abstract: A high energy density dielectric layer having relative dielectric permittivity greater than ?R?70 and thickness less than 1 micron that when formed between a primary electrode and the secondary electrode of a capacitor, wherein the high energy density dielectric has a dielectric polarization response that is determined solely by orbital deformations of the atomic species forming said high energy density dielectric.

Abstract: A multilayer ceramic electronic component includes a ceramic body including dielectric layers and first and second internal electrodes alternately laminated with respective dielectric layers disposed therebetween to be exposed to first and second external surfaces of the ceramic body, and first and second external electrodes disposed on the first and second external surfaces of the ceramic body and connected to corresponding internal electrodes, among the first and second internal electrodes, respectively. The dielectric layer includes a portion, disposed between the first and second external electrodes, having a thickness of 3.5 micrometers or more to 3.7 micrometers or less.

Abstract: A ceramic capacitor includes: a dielectric layer of which a main component is a ceramic grain, wherein one or more pores are formed inside of the ceramic grains; and wherein an area ratio of the one or more pores with respect to a cross section of the ceramic grain is 0.03% to 0.20%, in a cross section of the dielectric layer.

Abstract: A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.

Abstract: The present invention relates to a stacked piezoelectric ceramic element and can provide a stacked piezoelectric ceramic element produced by stacking two or more ceramic green sheets, the stacked piezoelectric ceramic element having a structure in which a ceramic porous or defective part constituting the stacked piezoelectric ceramic element is impregnated with an organic resin, thereby improving waterproof performance capable of preventing the deterioration of insulation resistance in a highly humid environment.

Abstract: There are provided a setting process configured to set in a chamber an aluminum nitride substrate in which a semiconductor layer is formed on a first principal plane, and an oxide film forming process configured to heat an inside of the chamber with a water molecule (H2O) being introduced in the chamber and to form an oxide film including an amorphous oxide film and/or a crystalline oxide film on a second principal plane located on an opposite side to the first principal plane of the aluminum nitride substrate.

Abstract: A glass-ceramic includes glass and crystalline phases, where the crystalline phase includes non-stoichiometric suboxides of titanium, forming ‘bronze’-type solid state defect structures in which vacancies are occupied with dopant cations.

Abstract: A capacitor includes a first conductive plate, a second conductive plate, a floating conductive plate and a dielectric material separating the floating conductive plate from the first conductive plate and from the second conductive plate. The floating conductive plate has a first surface closer to the first conductive plate than to the second conductive plate and has a second surface closer to the second conductive plate than to the first conductive plate. In response to an electric field between the first conductive plate and the second conductive plate, charge separation is induced in the floating conductive plate such that a first charge induced on the first surface has a first polarity and a second charge induced on the second surface has a second polarity, where the second polarity different from the first polarity.

Abstract: A multilayer structure comprising a first layer, a second layer and a third layer, a capacitor comprising at least one multilayer structure, a capacitor comprising at least two two-layer structures, a method of manufacture of the multilayer structure, a method of manufacture of the capacitor, a microelectronic device and an energy storage device comprising the capacitor. The multilayer structure comprises a first layer, a second layer and a third layer, wherein the first layer and the third layer each form at least one of at least two electrodes and comprise one or more pyrolyzed carbon nanomembranes or one or more layers of graphene, and the second layer is a dielectric comprising one or more carbon nanomembranes.

Abstract: A nonlinear resonator is presented that enhances the bandwidth while providing high resonance amplitude. The nonlinear resonance circuit is comprised of an inductor electrically coupled to a capacitor, where either the inductor or capacitor is nonlinear. Response of the nonlinear resonance circuit to an excitation signal is described by a family of second-order differential equations with cubic-order nonlinearity, known as Duffing equations.

Abstract: A multilayer ceramic capacitor includes a body and at least two outer electrodes. The body includes first and second main surfaces, an inner layer portion and first and second outer layer portions. In the inner layer portion, dielectric layers and conductive layers are alternately stacked on each other. The second outer layer portion includes an outer portion and an inner portion. A boundary region adjacent to the inner portion in the outer portion inclines toward the first main surface.

Abstract: A multilayer ceramic capacitor includes a body and at least two outer electrodes. The body includes first and second main surfaces, an inner layer portion and first and second outer layer portions. In the inner layer portion, dielectric layers and conductive layers are alternately stacked on each other. The second outer layer portion includes an outer portion and an inner portion. A boundary region adjacent to the inner portion in the outer portion inclines toward the first main surface.

Abstract: Jitter that becomes a problem in a semiconductor part which performs high-speed signal processing is reduced. A semiconductor device includes a heat-resistant metal plate, a capacitor part having a lower electrode, a sintered dielectric part, and an upper electrode that are formed on one or more surfaces of the heat-resistant metal plate, a semiconductor chip fixed on the capacitor part, a wire for electrically connecting a lead frame to the semiconductor chip and the upper electrode, and a mold part in which at least the capacitor part and the semiconductor chip are buried. The semiconductor chip, the electrode, the metal plate, and the like are electrically connected with each other via first, second, and third wires.

Abstract: A multilayer body includes an inner layer portion having a dimension in a stacking direction greater than a dimension of the inner layer portion in a width direction, a second outer layer portion including an outer portion including a second principle surface and an inner portion disposed adjacent to both of the outer portion and the inner layer portion, a dimension of the outer portion in the stacking direction being greater than a dimension of the inner portion, and a composition ratio of Si relative to Ti in the outer portion is greater than that in the inner portion.

Abstract: A multilayer ceramic capacitor includes a body and at least two outer electrodes. The body includes first and second main surfaces, an inner layer portion and first and second outer layer portions. In the inner layer portion, dielectric layers and conductive layers are alternately stacked on each other. The second outer layer portion includes an outer portion and an inner portion. A boundary region adjacent to the inner portion in the outer portion inclines toward the first main surface.

Abstract: A multilayer body includes an inner layer portion having a dimension in a stacking direction greater than a dimension of the inner layer portion in a width direction, a second outer layer portion including an outer portion including a second principle surface and an inner portion disposed adjacent to both of the outer portion and the inner layer portion, a dimension of the outer portion in the stacking direction being greater than a dimension of the inner portion, and a composition ratio of Si relative to Ti in the outer portion is greater than that in the inner portion.

Abstract: There is provided a multilayer ceramic electronic component including a ceramic body having internal electrodes formed therein, external electrodes formed on external surfaces of the ceramic body and connected to the internal electrodes, and a buffer layer formed on surfaces of contact between the internal electrodes and the external electrodes among external surfaces of the ceramic body, in an interior direction of the ceramic body, wherein when a thickness of the external electrode is denoted by T, a thickness of the buffer layer is denoted by t, a thickness of an active region is denoted by TA, and a thickness of the ceramic body is denoted by Tc, T?10 ?m, TA/TC>0.8, and t?5 ?m, so that a multilayer ceramic electronic component having excellent reliability may be realized.

Abstract: A multilayer electronic component is provided having a structure in which a dielectric layer and an internal electrode layer are alternately laminated. The internal electrode layer includes metal powder and an inhibitor. The inhibitor includes 0.5 to 20 mol % of a Ca component based on 100 mol % of a barium titanate (BT) base material. A method for manufacturing the same is also provided.

Abstract: A composite laminated ceramic electronic component that includes co-fired low dielectric-constant ceramic layers and high dielectric-constant ceramic layers. The low dielectric-constant ceramic layers and the high dielectric-constant ceramic layers are each composed of a glass ceramic containing: a first ceramic composed of MgAl2O4 and/or Mg2SiO4; a second ceramic composed of BaO, RE2O3 (where RE is a rare-earth element), and TiO2; glass containing each of 44.0 to 69.0 weight % of RO (where R is an alkaline-earth metal), 14.2 to 30.0 weight % of SiO2, 10.0 to 20.0 weight % of B2O3, 0.5 to 4.0 weight % of Al2O3, 0.3 to 7.5 weight % of Li2O, and 0.1 to 5.5 weight % of MgO; and MnO. The content ratios of the glass, etc. are varied between the low dielectric-constant ceramic layers and the high dielectric-constant ceramic layers.

Abstract: A multilayer ceramic capacitor includes: a ceramic body having laminated dielectric layers having an average thickness of 0.2-2.0 ?m; an active layer including first and second internal electrodes alternately exposed through end surfaces of the ceramic body having the dielectric layer interposed therebetween and contributing to capacitance formation; upper and lower cover layers respectively formed above and below the active layer, the lower cover layer being thicker than the upper cover layer; first and second external electrodes covering the end surfaces of the ceramic body, wherein a bottommost internal electrode adjacent to the lower cover layer has an oxide layer formed on at least one of top and bottom surfaces thereof, and when lengths and thicknesses of the bottommost internal electrode and the oxide layer are denoted by ‘Le,’ ‘te’ and ‘Lo,’ ‘to’, respectively, in a cross section of the ceramic body taken in length-thickness direction, 50%<Lo/Le×100 and 30%<to/te×100<80% are satisfied.

Abstract: A composite laminate ceramic electronic component that includes co-fired low dielectric constant ceramic layers and high dielectric constant ceramic layers. The low dielectric constant ceramic layers and high dielectric constant ceramic layers are each composed of a glass ceramic containing: a first ceramic composed of at least one of MgAl2O4 and Mg2SiO4; a second ceramic composed of BaO, RE2O3 (RE is a rare earth element), and TiO2; glass containing each of 44.0-69.0 wt % of RO (R is an alkaline-earth metal), 14.2-30.0 wt % of SiO2, 10.0-20.0 wt % of B2O3, 0.5-4.0 wt % of Al2O3, 0.3-7.5 wt % of Li2O, and 0.1-5.5 wt % of MgO; and MnO. The content ratios of the first ceramic, second ceramic, glass, and MnO are varied between the low dielectric constant ceramic layers and the high dielectric constant ceramic layers, wherein the content of MnO in the low dielectric constant ceramic layers is 7.5-18.5 wt % MnO.

Abstract: A multilayer ceramic capacitor includes a ceramic main body including an inner layer portion including third ceramic layers and a plurality of inner electrodes arranged at interfaces between the third ceramic layers, and first and second outer layer portions respectively including first and second ceramic layers, the first and second ceramic layers being arranged vertically so as to sandwich the inner layer portion. The third ceramic layers and the first and second outer layer portions contain a perovskite-type compound represented by ABO3 where A contains one or more of Ba, Sr, and Ca, B contains one or more of Ti, Zr, and Hf, and O represents oxygen) as a main component. Where a rare-earth element concentration (CR) in the third ceramic layers is compared to a rare-earth element concentration (Cr) in outermost layer portions including at least outermost surfaces of the first and second outer layer portions, CR>Cr (inclusive of Cr=0).

Abstract: There is provided a dielectric composition including: a base powder including BaTiO3; a first accessory component including a content (x1) of 0.1 to 1.0 at % of an oxide or a carbonate including transition metals, based on 100 moles of the base powder; a second accessory component including a content (y) of 0.01 to 3.0 at % of oxide or carbonate including a fixed valence acceptor element, based on 100 moles of the base powder; a third accessory component including an oxide or a carbonate including a Ce element (content of z at %) and at least one rare earth element (content of w at %); and a fourth accessory component including a sintering aid, wherein 0.01?z?x1+4y and 0.01?z+w?x1+4y based on 100 moles of the base powder.

Abstract: A dielectric composition containing a crystalline phase represented by a general formula of Bi12SiO20 and a crystalline phase represented by a general formula of Bi2SiO5 as the main components. The dielectric composition contains preferably 5 mass % to 99 mass % of the Bi2SiO5 crystalline phase, and more preferably 30 mass % to 99 mass %.

Abstract: A dielectric ceramic that contains, as its main constituent, a perovskite-type compound containing Ba and Ti, and, with respect to the Ti content of 100 parts by mole, contains Re1 (Re1 is at least one element of La and Nd) in the range of 0.15 to 3 parts by mole, Y in the range of 0.1 to 3 parts by mole, Mg in the range of 0.3 to 13 parts by mole, and Fe in the range of 0.01 to 5 parts by mole.

Abstract: A laminated ceramic capacitor includes multiple dielectric layers, internal electrodes having Cu as the primary component and embedded between the dielectric layers, and external electrodes. The dielectric layers contain a primary component comprised of a CaZrO3 compound and auxiliary components that include Mn, B, Si, and Li wherein a primary phase comprised of the primary component, segregation phases containing Ca and at least one of the auxiliary components, and secondary phases containing at last Ca and Zr are formed. The ratio of Ca to Zr in the secondary phases is smaller than the ratio of Ca to Zr in the primary phase, and the number of secondary phases with a diameter of 100 nm or greater in a cross section of the dielectric layers averages 30 or less per 10 square ?m.

Abstract: A dielectric ceramic which is suitable for use in a laminated ceramic capacitor under a high-temperature environment, such as encountered in, for example, automobile use has a composition represented by the composition formula: (1?x) (Ba1-yCay)mTiO3+xCaTiO3+aRe2O3+bMgO+cMnO+dV2O3+eSiO2 in which Re is Gd, Dy, Y, Ho, and/or Er), 0.001?x?0.02, 0.08?y?0.20, 0.99?m?1.05, 0.01?a?0.04, 0.005?b?0.035, 0?c?0.01, 0?d?0.01, 0.01?e?0.04 when a, b, c, d, and e are each expressed in terms of parts by mol with respect to 1 mol of (1?x) (Ba,Ca)TiO3+xCaTiO3. This dielectric ceramic can constitute the dielectric ceramic layers of a laminated ceramic capacitor.

Abstract: In this process of forming a dielectric thin film, when a dielectric thin film represented by Ba1?xSrxTiyO3 (0.2<x<0.6 and 0.9<y<1.1) is formed by a sol-gel method, the process from coating to baking is carried out 2 to 9 times, the thickness of the thin film formed after the initial baking is 20 nm to 80 nm, the thickness of each thin film formed after the second baking and beyond is 20 nm to less than 200 nm, each baking from the first time to the second to ninth times is carried out by heating to a prescribed temperature within the range of 500° C. to 800° C. at a heating rate of 1° C. to 50° C./minute in an atmosphere at atmospheric pressure, and the total thickness of the dielectric thin film is 100 nm to 600 nm.

Abstract: A capacitor having a dielectric consisting of a glass layer with an alkali metal oxide content of at most 2 wt % and a thickness of at most 50 ?m is provided. The capacitor includes at least two metal layers which are separated by the glass layer. The glass layer is preferably produced by a down-draw method or by an overflow down-draw fusion method.

Abstract: There are provided a conductive paste composition for an internal electrode, a multilayer ceramic capacitor having the same, and a fabrication method thereof. The conductive paste composition for an internal electrode includes a binder, a solvent, and metal powder for an internal electrode, including a nickel particle coated with a nickel nitride.

Abstract: A crystalline perovskite crystalline composite paraelectric material includes nano-regions containing rich N3? anions dispersed in a nano-grain sized matrix of crystalline oxide perovskite material, wherein (ABO3-?)?-(ABO3-?-?N?)1-?. A represents a divalent element, B represents a tetravalent element, ? satisfies 0.005???1.0, 1-? satisfies 0.05?1-??0.9, and 1-? is an area ratio between the regions containing rich N3? anions and the matrix of remaining oxide perovskite material.

Abstract: A capacitor, and methods of its manufacture, having improved capacitance efficiency which results from increasing the effective area of an electrode surface are disclosed. An improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode—dielectric—electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors.

Abstract: Provided is a laminated ceramic capacitor that can suppress the decrease in insulation resistance after a moisture-resistance loading test. It contains ceramic layers which include: main-phase grains that have a perovskite-type compound containing Ba and Ti and optionally containing Ca, Sr, Zr, and Hf; and secondary-phase grains that have an average grain size of 100 nm or more and have a Si content of 50 mol % or more per grain, the average grain boundary number, represented by (Average Thickness for Ceramic Layers 3)/(Average Grain Size for Main Phase Grains)?1, is greater than 0 and 3.0 or less, and the average grain size for the secondary-phase grains is ¼ or more of the average thickness for the ceramic layers 3.